| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | | - * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/ |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms of the GNU General Public License version 2 as |
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| 6 | | - * published by the Free Software Foundation. |
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| 3 | + * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ |
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| 7 | 4 | */ |
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| 8 | 5 | #include "dra72-evm-common.dtsi" |
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| 9 | 6 | #include "dra72x-mmc-iodelay.dtsi" |
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| .. | .. |
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| 13 | 10 | memory@0 { |
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| 14 | 11 | device_type = "memory"; |
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| 15 | 12 | reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */ |
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| 13 | + }; |
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| 14 | + |
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| 15 | + reserved-memory { |
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| 16 | + #address-cells = <2>; |
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| 17 | + #size-cells = <2>; |
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| 18 | + ranges; |
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| 19 | + |
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| 20 | + ipu2_memory_region: ipu2-memory@95800000 { |
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| 21 | + compatible = "shared-dma-pool"; |
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| 22 | + reg = <0x0 0x95800000 0x0 0x3800000>; |
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| 23 | + reusable; |
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| 24 | + status = "okay"; |
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| 25 | + }; |
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| 26 | + |
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| 27 | + dsp1_memory_region: dsp1-memory@99000000 { |
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| 28 | + compatible = "shared-dma-pool"; |
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| 29 | + reg = <0x0 0x99000000 0x0 0x4000000>; |
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| 30 | + reusable; |
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| 31 | + status = "okay"; |
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| 32 | + }; |
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| 33 | + |
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| 34 | + ipu1_memory_region: ipu1-memory@9d000000 { |
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| 35 | + compatible = "shared-dma-pool"; |
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| 36 | + reg = <0x0 0x9d000000 0x0 0x2000000>; |
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| 37 | + reusable; |
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| 38 | + status = "okay"; |
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| 39 | + }; |
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| 16 | 40 | }; |
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| 17 | 41 | |
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| 18 | 42 | evm_1v8_sw: fixedregulator-evm_1v8 { |
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| .. | .. |
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| 45 | 69 | interrupts = <11 IRQ_TYPE_EDGE_FALLING>; |
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| 46 | 70 | }; |
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| 47 | 71 | |
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| 48 | | -&mac { |
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| 49 | | - slaves = <1>; |
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| 72 | +&mac_sw { |
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| 50 | 73 | mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>; |
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| 74 | + status = "okay"; |
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| 51 | 75 | }; |
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| 52 | 76 | |
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| 53 | | -&cpsw_emac0 { |
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| 54 | | - phy_id = <&davinci_mdio>, <3>; |
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| 77 | +&cpsw_port1 { |
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| 78 | + phy-handle = <ðphy0>; |
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| 55 | 79 | phy-mode = "rgmii"; |
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| 80 | + ti,dual-emac-pvid = <1>; |
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| 81 | +}; |
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| 82 | + |
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| 83 | +&cpsw_port2 { |
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| 84 | + status = "disabled"; |
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| 85 | +}; |
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| 86 | + |
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| 87 | +&davinci_mdio_sw { |
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| 88 | + ethphy0: ethernet-phy@3 { |
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| 89 | + reg = <3>; |
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| 90 | + }; |
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| 56 | 91 | }; |
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| 57 | 92 | |
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| 58 | 93 | &mmc1 { |
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| .. | .. |
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| 75 | 110 | pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev10_conf>; |
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| 76 | 111 | vmmc-supply = <&evm_1v8_sw>; |
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| 77 | 112 | }; |
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| 113 | + |
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| 114 | +&ipu2 { |
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| 115 | + status = "okay"; |
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| 116 | + memory-region = <&ipu2_memory_region>; |
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| 117 | +}; |
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| 118 | + |
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| 119 | +&ipu1 { |
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| 120 | + status = "okay"; |
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| 121 | + memory-region = <&ipu1_memory_region>; |
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| 122 | +}; |
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| 123 | + |
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| 124 | +&dsp1 { |
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| 125 | + status = "okay"; |
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| 126 | + memory-region = <&dsp1_memory_region>; |
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| 127 | +}; |
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