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2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/include/misc/ocxl.h
....@@ -16,11 +16,7 @@
1616 
1717 #define OCXL_AFU_NAME_SZ      (24+1)  /* add 1 for NULL termination */
1818 
19
-/*
20
- * The following 2 structures are a fairly generic way of representing
21
- * the configuration data for a function and AFU, as read from the
22
- * configuration space.
23
- */
19
+
2420 struct ocxl_afu_config {
2521 	u8 idx;
2622 	int dvsec_afu_control_pos; /* offset of AFU control DVSEC */
....@@ -36,7 +32,10 @@
3632 	u8 pp_mmio_bar;         /* per-process MMIO area */
3733 	u64 pp_mmio_offset;
3834 	u32 pp_mmio_stride;
39
-	u8 log_mem_size;
35
+	u64 lpc_mem_offset;
36
+	u64 lpc_mem_size;
37
+	u64 special_purpose_mem_offset;
38
+	u64 special_purpose_mem_size;
4039 	u8 pasid_supported_log;
4140 	u16 actag_supported;
4241 };
....@@ -49,35 +48,292 @@
4948 	s8 max_afu_index;
5049 };
5150 
52
-/*
53
- * Read the configuration space of a function and fill in a
54
- * ocxl_fn_config structure with all the function details
55
- */
56
-extern int ocxl_config_read_function(struct pci_dev *dev,
57
-				struct ocxl_fn_config *fn);
51
+enum ocxl_endian {
52
+	OCXL_BIG_ENDIAN = 0,    /**< AFU data is big-endian */
53
+	OCXL_LITTLE_ENDIAN = 1, /**< AFU data is little-endian */
54
+	OCXL_HOST_ENDIAN = 2,   /**< AFU data is the same endianness as the host */
55
+};
5856 
59
-/*
60
- * Check if an AFU index is valid for the given function.
57
+// These are opaque outside the ocxl driver
58
+struct ocxl_afu;
59
+struct ocxl_fn;
60
+struct ocxl_context;
61
+
62
+// Device detection & initialisation
63
+
64
+/**
65
+ * ocxl_function_open() - Open an OpenCAPI function on an OpenCAPI device
66
+ * @dev: The PCI device that contains the function
6167  *
62
- * AFU indexes can be sparse, so a driver should check all indexes up
63
- * to the maximum found in the function description
68
+ * Returns an opaque pointer to the function, or an error pointer (check with IS_ERR)
6469  */
65
-extern int ocxl_config_check_afu_index(struct pci_dev *dev,
66
-				struct ocxl_fn_config *fn, int afu_idx);
70
+struct ocxl_fn *ocxl_function_open(struct pci_dev *dev);
71
+
72
+/**
73
+ * ocxl_function_afu_list() - Get the list of AFUs associated with a PCI function device
74
+ * Returns a list of struct ocxl_afu *
75
+ *
76
+ * @fn: The OpenCAPI function containing the AFUs
77
+ */
78
+struct list_head *ocxl_function_afu_list(struct ocxl_fn *fn);
79
+
80
+/**
81
+ * ocxl_function_fetch_afu() - Fetch an AFU instance from an OpenCAPI function
82
+ * @fn: The OpenCAPI function to get the AFU from
83
+ * @afu_idx: The index of the AFU to get
84
+ *
85
+ * If successful, the AFU should be released with ocxl_afu_put()
86
+ *
87
+ * Returns a pointer to the AFU, or NULL on error
88
+ */
89
+struct ocxl_afu *ocxl_function_fetch_afu(struct ocxl_fn *fn, u8 afu_idx);
90
+
91
+/**
92
+ * ocxl_afu_get() - Take a reference to an AFU
93
+ * @afu: The AFU to increment the reference count on
94
+ */
95
+void ocxl_afu_get(struct ocxl_afu *afu);
96
+
97
+/**
98
+ * ocxl_afu_put() - Release a reference to an AFU
99
+ * @afu: The AFU to decrement the reference count on
100
+ */
101
+void ocxl_afu_put(struct ocxl_afu *afu);
102
+
103
+
104
+/**
105
+ * ocxl_function_config() - Get the configuration information for an OpenCAPI function
106
+ * @fn: The OpenCAPI function to get the config for
107
+ *
108
+ * Returns the function config, or NULL on error
109
+ */
110
+const struct ocxl_fn_config *ocxl_function_config(struct ocxl_fn *fn);
111
+
112
+/**
113
+ * ocxl_function_close() - Close an OpenCAPI function
114
+ * This will free any AFUs previously retrieved from the function, and
115
+ * detach and associated contexts. The contexts must by freed by the caller.
116
+ *
117
+ * @fn: The OpenCAPI function to close
118
+ *
119
+ */
120
+void ocxl_function_close(struct ocxl_fn *fn);
121
+
122
+// Context allocation
123
+
124
+/**
125
+ * ocxl_context_alloc() - Allocate an OpenCAPI context
126
+ * @context: The OpenCAPI context to allocate, must be freed with ocxl_context_free
127
+ * @afu: The AFU the context belongs to
128
+ * @mapping: The mapping to unmap when the context is closed (may be NULL)
129
+ */
130
+int ocxl_context_alloc(struct ocxl_context **context, struct ocxl_afu *afu,
131
+			struct address_space *mapping);
132
+
133
+/**
134
+ * ocxl_context_free() - Free an OpenCAPI context
135
+ * @ctx: The OpenCAPI context to free
136
+ */
137
+void ocxl_context_free(struct ocxl_context *ctx);
138
+
139
+/**
140
+ * ocxl_context_attach() - Grant access to an MM to an OpenCAPI context
141
+ * @ctx: The OpenCAPI context to attach
142
+ * @amr: The value of the AMR register to restrict access
143
+ * @mm: The mm to attach to the context
144
+ *
145
+ * Returns 0 on success, negative on failure
146
+ */
147
+int ocxl_context_attach(struct ocxl_context *ctx, u64 amr,
148
+				struct mm_struct *mm);
149
+
150
+/**
151
+ * ocxl_context_detach() - Detach an MM from an OpenCAPI context
152
+ * @ctx: The OpenCAPI context to attach
153
+ *
154
+ * Returns 0 on success, negative on failure
155
+ */
156
+int ocxl_context_detach(struct ocxl_context *ctx);
157
+
158
+// AFU IRQs
159
+
160
+/**
161
+ * ocxl_afu_irq_alloc() - Allocate an IRQ associated with an AFU context
162
+ * @ctx: the AFU context
163
+ * @irq_id: out, the IRQ ID
164
+ *
165
+ * Returns 0 on success, negative on failure
166
+ */
167
+int ocxl_afu_irq_alloc(struct ocxl_context *ctx, int *irq_id);
168
+
169
+/**
170
+ * ocxl_afu_irq_free() - Frees an IRQ associated with an AFU context
171
+ * @ctx: the AFU context
172
+ * @irq_id: the IRQ ID
173
+ *
174
+ * Returns 0 on success, negative on failure
175
+ */
176
+int ocxl_afu_irq_free(struct ocxl_context *ctx, int irq_id);
177
+
178
+/**
179
+ * ocxl_afu_irq_get_addr() - Gets the address of the trigger page for an IRQ
180
+ * This can then be provided to an AFU which will write to that
181
+ * page to trigger the IRQ.
182
+ * @ctx: The AFU context that the IRQ is associated with
183
+ * @irq_id: The IRQ ID
184
+ *
185
+ * returns the trigger page address, or 0 if the IRQ is not valid
186
+ */
187
+u64 ocxl_afu_irq_get_addr(struct ocxl_context *ctx, int irq_id);
188
+
189
+/**
190
+ * ocxl_irq_set_handler() - Provide a callback to be called when an IRQ is triggered
191
+ * @ctx: The AFU context that the IRQ is associated with
192
+ * @irq_id: The IRQ ID
193
+ * @handler: the callback to be called when the IRQ is triggered
194
+ * @free_private: the callback to be called when the IRQ is freed (may be NULL)
195
+ * @private: Private data to be passed to the callbacks
196
+ *
197
+ * Returns 0 on success, negative on failure
198
+ */
199
+int ocxl_irq_set_handler(struct ocxl_context *ctx, int irq_id,
200
+		irqreturn_t (*handler)(void *private),
201
+		void (*free_private)(void *private),
202
+		void *private);
203
+
204
+// AFU Metadata
205
+
206
+/**
207
+ * ocxl_afu_config() - Get a pointer to the config for an AFU
208
+ * @afu: a pointer to the AFU to get the config for
209
+ *
210
+ * Returns a pointer to the AFU config
211
+ */
212
+struct ocxl_afu_config *ocxl_afu_config(struct ocxl_afu *afu);
213
+
214
+/**
215
+ * ocxl_afu_set_private() - Assign opaque hardware specific information to an OpenCAPI AFU.
216
+ * @afu: The OpenCAPI AFU
217
+ * @private: the opaque hardware specific information to assign to the driver
218
+ */
219
+void ocxl_afu_set_private(struct ocxl_afu *afu, void *private);
220
+
221
+/**
222
+ * ocxl_afu_get_private() - Fetch the hardware specific information associated with
223
+ * an external OpenCAPI AFU. This may be consumed by an external OpenCAPI driver.
224
+ * @afu: The OpenCAPI AFU
225
+ *
226
+ * Returns the opaque pointer associated with the device, or NULL if not set
227
+ */
228
+void *ocxl_afu_get_private(struct ocxl_afu *afu);
229
+
230
+// Global MMIO
231
+/**
232
+ * ocxl_global_mmio_read32() - Read a 32 bit value from global MMIO
233
+ * @afu: The AFU
234
+ * @offset: The Offset from the start of MMIO
235
+ * @endian: the endianness that the MMIO data is in
236
+ * @val: returns the value
237
+ *
238
+ * Returns 0 for success, negative on error
239
+ */
240
+int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset,
241
+			    enum ocxl_endian endian, u32 *val);
242
+
243
+/**
244
+ * ocxl_global_mmio_read64() - Read a 64 bit value from global MMIO
245
+ * @afu: The AFU
246
+ * @offset: The Offset from the start of MMIO
247
+ * @endian: the endianness that the MMIO data is in
248
+ * @val: returns the value
249
+ *
250
+ * Returns 0 for success, negative on error
251
+ */
252
+int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset,
253
+			    enum ocxl_endian endian, u64 *val);
254
+
255
+/**
256
+ * ocxl_global_mmio_write32() - Write a 32 bit value to global MMIO
257
+ * @afu: The AFU
258
+ * @offset: The Offset from the start of MMIO
259
+ * @endian: the endianness that the MMIO data is in
260
+ * @val: The value to write
261
+ *
262
+ * Returns 0 for success, negative on error
263
+ */
264
+int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset,
265
+			     enum ocxl_endian endian, u32 val);
266
+
267
+/**
268
+ * ocxl_global_mmio_write64() - Write a 64 bit value to global MMIO
269
+ * @afu: The AFU
270
+ * @offset: The Offset from the start of MMIO
271
+ * @endian: the endianness that the MMIO data is in
272
+ * @val: The value to write
273
+ *
274
+ * Returns 0 for success, negative on error
275
+ */
276
+int ocxl_global_mmio_write64(struct ocxl_afu *afu, size_t offset,
277
+			     enum ocxl_endian endian, u64 val);
278
+
279
+/**
280
+ * ocxl_global_mmio_set32() - Set bits in a 32 bit global MMIO register
281
+ * @afu: The AFU
282
+ * @offset: The Offset from the start of MMIO
283
+ * @endian: the endianness that the MMIO data is in
284
+ * @mask: a mask of the bits to set
285
+ *
286
+ * Returns 0 for success, negative on error
287
+ */
288
+int ocxl_global_mmio_set32(struct ocxl_afu *afu, size_t offset,
289
+			   enum ocxl_endian endian, u32 mask);
290
+
291
+/**
292
+ * ocxl_global_mmio_set64() - Set bits in a 64 bit global MMIO register
293
+ * @afu: The AFU
294
+ * @offset: The Offset from the start of MMIO
295
+ * @endian: the endianness that the MMIO data is in
296
+ * @mask: a mask of the bits to set
297
+ *
298
+ * Returns 0 for success, negative on error
299
+ */
300
+int ocxl_global_mmio_set64(struct ocxl_afu *afu, size_t offset,
301
+			   enum ocxl_endian endian, u64 mask);
302
+
303
+/**
304
+ * ocxl_global_mmio_clear32() - Set bits in a 32 bit global MMIO register
305
+ * @afu: The AFU
306
+ * @offset: The Offset from the start of MMIO
307
+ * @endian: the endianness that the MMIO data is in
308
+ * @mask: a mask of the bits to set
309
+ *
310
+ * Returns 0 for success, negative on error
311
+ */
312
+int ocxl_global_mmio_clear32(struct ocxl_afu *afu, size_t offset,
313
+			     enum ocxl_endian endian, u32 mask);
314
+
315
+/**
316
+ * ocxl_global_mmio_clear64() - Set bits in a 64 bit global MMIO register
317
+ * @afu: The AFU
318
+ * @offset: The Offset from the start of MMIO
319
+ * @endian: the endianness that the MMIO data is in
320
+ * @mask: a mask of the bits to set
321
+ *
322
+ * Returns 0 for success, negative on error
323
+ */
324
+int ocxl_global_mmio_clear64(struct ocxl_afu *afu, size_t offset,
325
+			     enum ocxl_endian endian, u64 mask);
326
+
327
+// Functions left here are for compatibility with the cxlflash driver
67328 
68329 /*
69330  * Read the configuration space of a function for the AFU specified by
70331  * the index 'afu_idx'. Fills in a ocxl_afu_config structure
71332  */
72
-extern int ocxl_config_read_afu(struct pci_dev *dev,
333
+int ocxl_config_read_afu(struct pci_dev *dev,
73334 				struct ocxl_fn_config *fn,
74335 				struct ocxl_afu_config *afu,
75336 				u8 afu_idx);
76
-
77
-/*
78
- * Get the max PASID value that can be used by the function
79
- */
80
-extern int ocxl_config_get_pasid_info(struct pci_dev *dev, int *count);
81337 
82338 /*
83339  * Tell an AFU, by writing in the configuration space, the PASIDs that
....@@ -87,7 +343,7 @@
87343  * 'afu_control_offset' is the offset of the AFU control DVSEC which
88344  * can be found in the function configuration
89345  */
90
-extern void ocxl_config_set_afu_pasid(struct pci_dev *dev,
346
+void ocxl_config_set_afu_pasid(struct pci_dev *dev,
91347 				int afu_control_offset,
92348 				int pasid_base, u32 pasid_count_log);
93349 
....@@ -98,7 +354,7 @@
98354  * 'supported' is the total number of actags desired by all the AFUs
99355  *             of the function.
100356  */
101
-extern int ocxl_config_get_actag_info(struct pci_dev *dev,
357
+int ocxl_config_get_actag_info(struct pci_dev *dev,
102358 				u16 *base, u16 *enabled, u16 *supported);
103359 
104360 /*
....@@ -108,7 +364,7 @@
108364  * 'func_offset' is the offset of the Function DVSEC that can found in
109365  * the function configuration
110366  */
111
-extern void ocxl_config_set_actag(struct pci_dev *dev, int func_offset,
367
+void ocxl_config_set_actag(struct pci_dev *dev, int func_offset,
112368 				u32 actag_base, u32 actag_count);
113369 
114370 /*
....@@ -118,7 +374,7 @@
118374  * 'afu_control_offset' is the offset of the AFU control DVSEC for the
119375  * desired AFU. It can be found in the AFU configuration
120376  */
121
-extern void ocxl_config_set_afu_actag(struct pci_dev *dev,
377
+void ocxl_config_set_afu_actag(struct pci_dev *dev,
122378 				int afu_control_offset,
123379 				int actag_base, int actag_count);
124380 
....@@ -128,7 +384,7 @@
128384  * 'afu_control_offset' is the offset of the AFU control DVSEC for the
129385  * desired AFU. It can be found in the AFU configuration
130386  */
131
-extern void ocxl_config_set_afu_state(struct pci_dev *dev,
387
+void ocxl_config_set_afu_state(struct pci_dev *dev,
132388 				int afu_control_offset, int enable);
133389 
134390 /*
....@@ -139,7 +395,7 @@
139395  * between the host and device, and set the Transaction Layer on both
140396  * accordingly.
141397  */
142
-extern int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec);
398
+int ocxl_config_set_TL(struct pci_dev *dev, int tl_dvsec);
143399 
144400 /*
145401  * Request an AFU to terminate a PASID.
....@@ -152,8 +408,15 @@
152408  * 'afu_control_offset' is the offset of the AFU control DVSEC for the
153409  * desired AFU. It can be found in the AFU configuration
154410  */
155
-extern int ocxl_config_terminate_pasid(struct pci_dev *dev,
411
+int ocxl_config_terminate_pasid(struct pci_dev *dev,
156412 				int afu_control_offset, int pasid);
413
+
414
+/*
415
+ * Read the configuration space of a function and fill in a
416
+ * ocxl_fn_config structure with all the function details
417
+ */
418
+int ocxl_config_read_function(struct pci_dev *dev,
419
+				struct ocxl_fn_config *fn);
157420 
158421 /*
159422  * Set up the opencapi link for the function.
....@@ -165,13 +428,13 @@
165428  * Returns a 'link handle' that should be used for further calls for
166429  * the link
167430  */
168
-extern int ocxl_link_setup(struct pci_dev *dev, int PE_mask,
431
+int ocxl_link_setup(struct pci_dev *dev, int PE_mask,
169432 			void **link_handle);
170433 
171434 /*
172435  * Remove the association between the function and its link.
173436  */
174
-extern void ocxl_link_release(struct pci_dev *dev, void *link_handle);
437
+void ocxl_link_release(struct pci_dev *dev, void *link_handle);
175438 
176439 /*
177440  * Add a Process Element to the Shared Process Area for a link.
....@@ -183,41 +446,26 @@
183446  * 'xsl_err_data' is an argument passed to the above callback, if
184447  * defined
185448  */
186
-extern int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
449
+int ocxl_link_add_pe(void *link_handle, int pasid, u32 pidr, u32 tidr,
187450 		u64 amr, struct mm_struct *mm,
188451 		void (*xsl_err_cb)(void *data, u64 addr, u64 dsisr),
189452 		void *xsl_err_data);
190453 
191
-/**
192
- * Update values within a Process Element
193
- *
194
- * link_handle: the link handle associated with the process element
195
- * pasid: the PASID for the AFU context
196
- * tid: the new thread id for the process element
197
- */
198
-extern int ocxl_link_update_pe(void *link_handle, int pasid, __u16 tid);
199
-
200454 /*
201455  * Remove a Process Element from the Shared Process Area for a link
202456  */
203
-extern int ocxl_link_remove_pe(void *link_handle, int pasid);
457
+int ocxl_link_remove_pe(void *link_handle, int pasid);
204458 
205459 /*
206460  * Allocate an AFU interrupt associated to the link.
207461  *
208462  * 'hw_irq' is the hardware interrupt number
209
- * 'obj_handle' is the 64-bit object handle to be passed to the AFU to
210
- * trigger the interrupt.
211
- * On P9, 'obj_handle' is an address, which, if written, triggers the
212
- * interrupt. It is an MMIO address which needs to be remapped (one
213
- * page).
214463  */
215
-extern int ocxl_link_irq_alloc(void *link_handle, int *hw_irq,
216
-			u64 *obj_handle);
464
+int ocxl_link_irq_alloc(void *link_handle, int *hw_irq);
217465 
218466 /*
219467  * Free a previously allocated AFU interrupt
220468  */
221
-extern void ocxl_link_free_irq(void *link_handle, int hw_irq);
469
+void ocxl_link_free_irq(void *link_handle, int hw_irq);
222470 
223471 #endif /* _MISC_OCXL_H_ */