add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/drivers/scsi/qla2xxx/qla_tmpl.h
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@@ -1,8 +1,7 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * QLogic Fibre Channel HBA Driver
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  * Copyright (c)  2003-2014 QLogic Corporation
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- *
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- * See LICENSE.qla2xxx for copyright and licensing details.
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  */
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 #ifndef __QLA_DMP27_H__
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@@ -11,23 +10,23 @@
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 #define IOBASE_ADDR	offsetof(struct device_reg_24xx, iobase_addr)
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11
 
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 struct __packed qla27xx_fwdt_template {
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-	uint32_t template_type;
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-	uint32_t entry_offset;
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+	__le32 template_type;
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+	__le32 entry_offset;
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 	__le32 template_size;
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-	uint32_t reserved_1;
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+	uint32_t count;		/* borrow field for running/residual count */
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-	uint32_t entry_count;
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+	__le32 entry_count;
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 	uint32_t template_version;
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-	uint32_t capture_timestamp;
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+	__le32 capture_timestamp;
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 	uint32_t template_checksum;
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 	uint32_t reserved_2;
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-	uint32_t driver_info[3];
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+	__le32 driver_info[3];
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 	uint32_t saved_state[16];
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 	uint32_t reserved_3[8];
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-	uint32_t firmware_version[5];
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+	__le32 firmware_version[5];
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 };
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 #define TEMPLATE_TYPE_FWDUMP		99
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@@ -54,6 +53,9 @@
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 #define ENTRY_TYPE_PCICFG		273
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 #define ENTRY_TYPE_GET_SHADOW		274
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 #define ENTRY_TYPE_WRITE_BUF		275
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+#define ENTRY_TYPE_CONDITIONAL		276
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+#define ENTRY_TYPE_RDPEPREG		277
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+#define ENTRY_TYPE_WRPEPREG		278
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 #define CAPTURE_FLAG_PHYS_ONLY		BIT_0
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 #define CAPTURE_FLAG_PHYS_VIRT		BIT_1
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@@ -62,8 +64,8 @@
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 struct __packed qla27xx_fwdt_entry {
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 	struct __packed {
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-		uint32_t entry_type;
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-		uint32_t entry_size;
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+		__le32 type;
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+		__le32 size;
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 		uint32_t reserved_1;
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 		uint8_t  capture_flags;
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@@ -78,36 +80,36 @@
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 		} t255;
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 		struct __packed {
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-			uint32_t base_addr;
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+			__le32 base_addr;
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 			uint8_t  reg_width;
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-			uint16_t reg_count;
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+			__le16 reg_count;
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 			uint8_t  pci_offset;
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 		} t256;
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 		struct __packed {
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-			uint32_t base_addr;
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-			uint32_t write_data;
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+			__le32 base_addr;
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+			__le32 write_data;
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 			uint8_t  pci_offset;
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 			uint8_t  reserved[3];
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 		} t257;
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 		struct __packed {
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-			uint32_t base_addr;
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+			__le32 base_addr;
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 			uint8_t  reg_width;
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-			uint16_t reg_count;
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+			__le16 reg_count;
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 			uint8_t  pci_offset;
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 			uint8_t  banksel_offset;
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 			uint8_t  reserved[3];
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-			uint32_t bank;
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+			__le32 bank;
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 		} t258;
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 		struct __packed {
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-			uint32_t base_addr;
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-			uint32_t write_data;
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+			__le32 base_addr;
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+			__le32 write_data;
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 			uint8_t  reserved[2];
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 			uint8_t  pci_offset;
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 			uint8_t  banksel_offset;
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-			uint32_t bank;
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+			__le32 bank;
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 		} t259;
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 		struct __packed {
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@@ -118,14 +120,14 @@
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 		struct __packed {
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 			uint8_t pci_offset;
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 			uint8_t reserved[3];
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-			uint32_t write_data;
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+			__le32 write_data;
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 		} t261;
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 		struct __packed {
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 			uint8_t  ram_area;
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 			uint8_t  reserved[3];
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-			uint32_t start_addr;
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-			uint32_t end_addr;
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+			__le32 start_addr;
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+			__le32 end_addr;
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 		} t262;
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 		struct __packed {
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@@ -155,7 +157,7 @@
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 		struct __packed {
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 			uint8_t  pci_offset;
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 			uint8_t  reserved[3];
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-			uint32_t data;
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+			__le32 data;
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 		} t267;
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 		struct __packed {
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@@ -170,23 +172,23 @@
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 		} t269;
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 		struct __packed {
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-			uint32_t addr;
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-			uint32_t count;
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+			__le32 addr;
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+			__le32 count;
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 		} t270;
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 		struct __packed {
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-			uint32_t addr;
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-			uint32_t data;
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+			__le32 addr;
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+			__le32 data;
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 		} t271;
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 		struct __packed {
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-			uint32_t addr;
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-			uint32_t count;
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+			__le32 addr;
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+			__le32 count;
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 		} t272;
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 		struct __packed {
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-			uint32_t addr;
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-			uint32_t count;
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+			__le32 addr;
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+			__le32 count;
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 		} t273;
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 		struct __packed {
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@@ -196,9 +198,27 @@
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 		} t274;
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 		struct __packed {
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-			uint32_t length;
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+			__le32 length;
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 			uint8_t  buffer[];
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 		} t275;
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+
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+		struct __packed {
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+			__le32 cond1;
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+			__le32 cond2;
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+		} t276;
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+
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+		struct __packed {
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+			__le32 cmd_addr;
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+			__le32 wr_cmd_data;
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+			__le32 data_addr;
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+		} t277;
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+
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+		struct __packed {
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+			__le32 cmd_addr;
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+			__le32 wr_cmd_data;
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+			__le32 data_addr;
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+			__le32 wr_data;
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+		} t278;
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 	};
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 };
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@@ -206,6 +226,7 @@
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 #define T262_RAM_AREA_EXTERNAL_RAM	2
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 #define T262_RAM_AREA_SHARED_RAM	3
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 #define T262_RAM_AREA_DDR_RAM		4
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+#define T262_RAM_AREA_MISC		5
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 #define T263_QUEUE_TYPE_REQ		1
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 #define T263_QUEUE_TYPE_RSP		2