hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2
kernel/drivers/rtc/rtc-pcf2123.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * An SPI driver for the Philips PCF2123 RTC
34 * Copyright 2009 Cyber Switching, Inc.
....@@ -9,10 +10,6 @@
910 *
1011 * Thanks to Christian Pellegrin <chripell@fsfe.org> for
1112 * the sysfs contributions to this driver.
12
- *
13
- * This program is free software; you can redistribute it and/or modify
14
- * it under the terms of the GNU General Public License version 2 as
15
- * published by the Free Software Foundation.
1613 *
1714 * Please note that the CS is active high, so platform data
1815 * should look something like:
....@@ -29,7 +26,6 @@
2926 * },
3027 * ...
3128 *};
32
- *
3329 */
3430
3531 #include <linux/bcd.h>
....@@ -44,7 +40,7 @@
4440 #include <linux/rtc.h>
4541 #include <linux/spi/spi.h>
4642 #include <linux/module.h>
47
-#include <linux/sysfs.h>
43
+#include <linux/regmap.h>
4844
4945 /* REGISTERS */
5046 #define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */
....@@ -86,7 +82,7 @@
8682 #define OSC_HAS_STOPPED BIT(7) /* Clock has been stopped */
8783
8884 /* PCF2123_REG_ALRM_XX BITS */
89
-#define ALRM_ENABLE BIT(7) /* MN, HR, DM, or DW alarm enable */
85
+#define ALRM_DISABLE BIT(7) /* MN, HR, DM, or DW alarm matching */
9086
9187 /* PCF2123_REG_TMR_CLKOUT BITS */
9288 #define CD_TMR_4096KHZ (0) /* 4096 KHz countdown timer */
....@@ -99,6 +95,7 @@
9995 #define OFFSET_SIGN_BIT 6 /* 2's complement sign bit */
10096 #define OFFSET_COARSE BIT(7) /* Coarse mode offset */
10197 #define OFFSET_STEP (2170) /* Offset step in parts per billion */
98
+#define OFFSET_MASK GENMASK(6, 0) /* Offset value */
10299
103100 /* READ/WRITE ADDRESS BITS */
104101 #define PCF2123_WRITE BIT(4)
....@@ -107,120 +104,35 @@
107104
108105 static struct spi_driver pcf2123_driver;
109106
110
-struct pcf2123_sysfs_reg {
111
- struct device_attribute attr;
112
- char name[2];
113
-};
114
-
115
-struct pcf2123_plat_data {
107
+struct pcf2123_data {
116108 struct rtc_device *rtc;
117
- struct pcf2123_sysfs_reg regs[16];
109
+ struct regmap *map;
118110 };
119111
120
-/*
121
- * Causes a 30 nanosecond delay to ensure that the PCF2123 chip select
122
- * is released properly after an SPI write. This function should be
123
- * called after EVERY read/write call over SPI.
124
- */
125
-static inline void pcf2123_delay_trec(void)
126
-{
127
- ndelay(30);
128
-}
129
-
130
-static int pcf2123_read(struct device *dev, u8 reg, u8 *rxbuf, size_t size)
131
-{
132
- struct spi_device *spi = to_spi_device(dev);
133
- int ret;
134
-
135
- reg |= PCF2123_READ;
136
- ret = spi_write_then_read(spi, &reg, 1, rxbuf, size);
137
- pcf2123_delay_trec();
138
-
139
- return ret;
140
-}
141
-
142
-static int pcf2123_write(struct device *dev, u8 *txbuf, size_t size)
143
-{
144
- struct spi_device *spi = to_spi_device(dev);
145
- int ret;
146
-
147
- txbuf[0] |= PCF2123_WRITE;
148
- ret = spi_write(spi, txbuf, size);
149
- pcf2123_delay_trec();
150
-
151
- return ret;
152
-}
153
-
154
-static int pcf2123_write_reg(struct device *dev, u8 reg, u8 val)
155
-{
156
- u8 txbuf[2];
157
-
158
- txbuf[0] = reg;
159
- txbuf[1] = val;
160
- return pcf2123_write(dev, txbuf, sizeof(txbuf));
161
-}
162
-
163
-static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr,
164
- char *buffer)
165
-{
166
- struct pcf2123_sysfs_reg *r;
167
- u8 rxbuf[1];
168
- unsigned long reg;
169
- int ret;
170
-
171
- r = container_of(attr, struct pcf2123_sysfs_reg, attr);
172
-
173
- ret = kstrtoul(r->name, 16, &reg);
174
- if (ret)
175
- return ret;
176
-
177
- ret = pcf2123_read(dev, reg, rxbuf, 1);
178
- if (ret < 0)
179
- return -EIO;
180
-
181
- return sprintf(buffer, "0x%x\n", rxbuf[0]);
182
-}
183
-
184
-static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr,
185
- const char *buffer, size_t count)
186
-{
187
- struct pcf2123_sysfs_reg *r;
188
- unsigned long reg;
189
- unsigned long val;
190
-
191
- int ret;
192
-
193
- r = container_of(attr, struct pcf2123_sysfs_reg, attr);
194
-
195
- ret = kstrtoul(r->name, 16, &reg);
196
- if (ret)
197
- return ret;
198
-
199
- ret = kstrtoul(buffer, 10, &val);
200
- if (ret)
201
- return ret;
202
-
203
- ret = pcf2123_write_reg(dev, reg, val);
204
- if (ret < 0)
205
- return -EIO;
206
- return count;
207
-}
112
+static const struct regmap_config pcf2123_regmap_config = {
113
+ .reg_bits = 8,
114
+ .val_bits = 8,
115
+ .read_flag_mask = PCF2123_READ,
116
+ .write_flag_mask = PCF2123_WRITE,
117
+ .max_register = PCF2123_REG_CTDWN_TMR,
118
+};
208119
209120 static int pcf2123_read_offset(struct device *dev, long *offset)
210121 {
211
- int ret;
212
- s8 reg;
122
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
123
+ int ret, val;
124
+ unsigned int reg;
213125
214
- ret = pcf2123_read(dev, PCF2123_REG_OFFSET, &reg, 1);
215
- if (ret < 0)
126
+ ret = regmap_read(pcf2123->map, PCF2123_REG_OFFSET, &reg);
127
+ if (ret)
216128 return ret;
217129
218
- if (reg & OFFSET_COARSE)
219
- reg <<= 1; /* multiply by 2 and sign extend */
220
- else
221
- reg = sign_extend32(reg, OFFSET_SIGN_BIT);
130
+ val = sign_extend32((reg & OFFSET_MASK), OFFSET_SIGN_BIT);
222131
223
- *offset = ((long)reg) * OFFSET_STEP;
132
+ if (reg & OFFSET_COARSE)
133
+ val *= 2;
134
+
135
+ *offset = ((long)val) * OFFSET_STEP;
224136
225137 return 0;
226138 }
....@@ -237,6 +149,7 @@
237149 */
238150 static int pcf2123_set_offset(struct device *dev, long offset)
239151 {
152
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
240153 s8 reg;
241154
242155 if (offset > OFFSET_STEP * 127)
....@@ -244,7 +157,7 @@
244157 else if (offset < OFFSET_STEP * -128)
245158 reg = -128;
246159 else
247
- reg = (s8)((offset + (OFFSET_STEP >> 1)) / OFFSET_STEP);
160
+ reg = DIV_ROUND_CLOSEST(offset, OFFSET_STEP);
248161
249162 /* choose fine offset only for odd values in the normal range */
250163 if (reg & 1 && reg <= 63 && reg >= -64) {
....@@ -256,16 +169,18 @@
256169 reg |= OFFSET_COARSE;
257170 }
258171
259
- return pcf2123_write_reg(dev, PCF2123_REG_OFFSET, reg);
172
+ return regmap_write(pcf2123->map, PCF2123_REG_OFFSET, (unsigned int)reg);
260173 }
261174
262175 static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
263176 {
177
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
264178 u8 rxbuf[7];
265179 int ret;
266180
267
- ret = pcf2123_read(dev, PCF2123_REG_SC, rxbuf, sizeof(rxbuf));
268
- if (ret < 0)
181
+ ret = regmap_bulk_read(pcf2123->map, PCF2123_REG_SC, rxbuf,
182
+ sizeof(rxbuf));
183
+ if (ret)
269184 return ret;
270185
271186 if (rxbuf[0] & OSC_HAS_STOPPED) {
....@@ -279,86 +194,170 @@
279194 tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F);
280195 tm->tm_wday = rxbuf[4] & 0x07;
281196 tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */
282
- tm->tm_year = bcd2bin(rxbuf[6]);
283
- if (tm->tm_year < 70)
284
- tm->tm_year += 100; /* assume we are in 1970...2069 */
197
+ tm->tm_year = bcd2bin(rxbuf[6]) + 100;
285198
286
- dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
287
- "mday=%d, mon=%d, year=%d, wday=%d\n",
288
- __func__,
289
- tm->tm_sec, tm->tm_min, tm->tm_hour,
290
- tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
199
+ dev_dbg(dev, "%s: tm is %ptR\n", __func__, tm);
291200
292201 return 0;
293202 }
294203
295204 static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
296205 {
297
- u8 txbuf[8];
206
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
207
+ u8 txbuf[7];
298208 int ret;
299209
300
- dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
301
- "mday=%d, mon=%d, year=%d, wday=%d\n",
302
- __func__,
303
- tm->tm_sec, tm->tm_min, tm->tm_hour,
304
- tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
210
+ dev_dbg(dev, "%s: tm is %ptR\n", __func__, tm);
305211
306212 /* Stop the counter first */
307
- ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP);
308
- if (ret < 0)
213
+ ret = regmap_write(pcf2123->map, PCF2123_REG_CTRL1, CTRL1_STOP);
214
+ if (ret)
309215 return ret;
310216
311217 /* Set the new time */
312
- txbuf[0] = PCF2123_REG_SC;
313
- txbuf[1] = bin2bcd(tm->tm_sec & 0x7F);
314
- txbuf[2] = bin2bcd(tm->tm_min & 0x7F);
315
- txbuf[3] = bin2bcd(tm->tm_hour & 0x3F);
316
- txbuf[4] = bin2bcd(tm->tm_mday & 0x3F);
317
- txbuf[5] = tm->tm_wday & 0x07;
318
- txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */
319
- txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100);
218
+ txbuf[0] = bin2bcd(tm->tm_sec & 0x7F);
219
+ txbuf[1] = bin2bcd(tm->tm_min & 0x7F);
220
+ txbuf[2] = bin2bcd(tm->tm_hour & 0x3F);
221
+ txbuf[3] = bin2bcd(tm->tm_mday & 0x3F);
222
+ txbuf[4] = tm->tm_wday & 0x07;
223
+ txbuf[5] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */
224
+ txbuf[6] = bin2bcd(tm->tm_year - 100);
320225
321
- ret = pcf2123_write(dev, txbuf, sizeof(txbuf));
322
- if (ret < 0)
226
+ ret = regmap_bulk_write(pcf2123->map, PCF2123_REG_SC, txbuf,
227
+ sizeof(txbuf));
228
+ if (ret)
323229 return ret;
324230
325231 /* Start the counter */
326
- ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR);
327
- if (ret < 0)
232
+ ret = regmap_write(pcf2123->map, PCF2123_REG_CTRL1, CTRL1_CLEAR);
233
+ if (ret)
328234 return ret;
329235
330236 return 0;
331237 }
332238
239
+static int pcf2123_rtc_alarm_irq_enable(struct device *dev, unsigned int en)
240
+{
241
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
242
+
243
+ return regmap_update_bits(pcf2123->map, PCF2123_REG_CTRL2, CTRL2_AIE,
244
+ en ? CTRL2_AIE : 0);
245
+}
246
+
247
+static int pcf2123_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
248
+{
249
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
250
+ u8 rxbuf[4];
251
+ int ret;
252
+ unsigned int val = 0;
253
+
254
+ ret = regmap_bulk_read(pcf2123->map, PCF2123_REG_ALRM_MN, rxbuf,
255
+ sizeof(rxbuf));
256
+ if (ret)
257
+ return ret;
258
+
259
+ alm->time.tm_min = bcd2bin(rxbuf[0] & 0x7F);
260
+ alm->time.tm_hour = bcd2bin(rxbuf[1] & 0x3F);
261
+ alm->time.tm_mday = bcd2bin(rxbuf[2] & 0x3F);
262
+ alm->time.tm_wday = bcd2bin(rxbuf[3] & 0x07);
263
+
264
+ dev_dbg(dev, "%s: alm is %ptR\n", __func__, &alm->time);
265
+
266
+ ret = regmap_read(pcf2123->map, PCF2123_REG_CTRL2, &val);
267
+ if (ret)
268
+ return ret;
269
+
270
+ alm->enabled = !!(val & CTRL2_AIE);
271
+
272
+ return 0;
273
+}
274
+
275
+static int pcf2123_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
276
+{
277
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
278
+ u8 txbuf[4];
279
+ int ret;
280
+
281
+ dev_dbg(dev, "%s: alm is %ptR\n", __func__, &alm->time);
282
+
283
+ /* Disable alarm interrupt */
284
+ ret = regmap_update_bits(pcf2123->map, PCF2123_REG_CTRL2, CTRL2_AIE, 0);
285
+ if (ret)
286
+ return ret;
287
+
288
+ /* Ensure alarm flag is clear */
289
+ ret = regmap_update_bits(pcf2123->map, PCF2123_REG_CTRL2, CTRL2_AF, 0);
290
+ if (ret)
291
+ return ret;
292
+
293
+ /* Set new alarm */
294
+ txbuf[0] = bin2bcd(alm->time.tm_min & 0x7F);
295
+ txbuf[1] = bin2bcd(alm->time.tm_hour & 0x3F);
296
+ txbuf[2] = bin2bcd(alm->time.tm_mday & 0x3F);
297
+ txbuf[3] = ALRM_DISABLE;
298
+
299
+ ret = regmap_bulk_write(pcf2123->map, PCF2123_REG_ALRM_MN, txbuf,
300
+ sizeof(txbuf));
301
+ if (ret)
302
+ return ret;
303
+
304
+ return pcf2123_rtc_alarm_irq_enable(dev, alm->enabled);
305
+}
306
+
307
+static irqreturn_t pcf2123_rtc_irq(int irq, void *dev)
308
+{
309
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
310
+ struct mutex *lock = &pcf2123->rtc->ops_lock;
311
+ unsigned int val = 0;
312
+ int ret = IRQ_NONE;
313
+
314
+ mutex_lock(lock);
315
+ regmap_read(pcf2123->map, PCF2123_REG_CTRL2, &val);
316
+
317
+ /* Alarm? */
318
+ if (val & CTRL2_AF) {
319
+ ret = IRQ_HANDLED;
320
+
321
+ /* Clear alarm flag */
322
+ regmap_update_bits(pcf2123->map, PCF2123_REG_CTRL2, CTRL2_AF, 0);
323
+
324
+ rtc_update_irq(pcf2123->rtc, 1, RTC_IRQF | RTC_AF);
325
+ }
326
+
327
+ mutex_unlock(lock);
328
+
329
+ return ret;
330
+}
331
+
333332 static int pcf2123_reset(struct device *dev)
334333 {
334
+ struct pcf2123_data *pcf2123 = dev_get_drvdata(dev);
335335 int ret;
336
- u8 rxbuf[2];
336
+ unsigned int val = 0;
337337
338
- ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_SW_RESET);
339
- if (ret < 0)
338
+ ret = regmap_write(pcf2123->map, PCF2123_REG_CTRL1, CTRL1_SW_RESET);
339
+ if (ret)
340340 return ret;
341341
342342 /* Stop the counter */
343343 dev_dbg(dev, "stopping RTC\n");
344
- ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_STOP);
345
- if (ret < 0)
344
+ ret = regmap_write(pcf2123->map, PCF2123_REG_CTRL1, CTRL1_STOP);
345
+ if (ret)
346346 return ret;
347347
348348 /* See if the counter was actually stopped */
349349 dev_dbg(dev, "checking for presence of RTC\n");
350
- ret = pcf2123_read(dev, PCF2123_REG_CTRL1, rxbuf, sizeof(rxbuf));
351
- if (ret < 0)
350
+ ret = regmap_read(pcf2123->map, PCF2123_REG_CTRL1, &val);
351
+ if (ret)
352352 return ret;
353353
354
- dev_dbg(dev, "received data from RTC (0x%02X 0x%02X)\n",
355
- rxbuf[0], rxbuf[1]);
356
- if (!(rxbuf[0] & CTRL1_STOP))
354
+ dev_dbg(dev, "received data from RTC (0x%08X)\n", val);
355
+ if (!(val & CTRL1_STOP))
357356 return -ENODEV;
358357
359358 /* Start the counter */
360
- ret = pcf2123_write_reg(dev, PCF2123_REG_CTRL1, CTRL1_CLEAR);
361
- if (ret < 0)
359
+ ret = regmap_write(pcf2123->map, PCF2123_REG_CTRL1, CTRL1_CLEAR);
360
+ if (ret)
362361 return ret;
363362
364363 return 0;
....@@ -369,28 +368,37 @@
369368 .set_time = pcf2123_rtc_set_time,
370369 .read_offset = pcf2123_read_offset,
371370 .set_offset = pcf2123_set_offset,
372
-
371
+ .read_alarm = pcf2123_rtc_read_alarm,
372
+ .set_alarm = pcf2123_rtc_set_alarm,
373
+ .alarm_irq_enable = pcf2123_rtc_alarm_irq_enable,
373374 };
374375
375376 static int pcf2123_probe(struct spi_device *spi)
376377 {
377378 struct rtc_device *rtc;
378379 struct rtc_time tm;
379
- struct pcf2123_plat_data *pdata;
380
- int ret, i;
380
+ struct pcf2123_data *pcf2123;
381
+ int ret = 0;
381382
382
- pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data),
383
+ pcf2123 = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_data),
383384 GFP_KERNEL);
384
- if (!pdata)
385
+ if (!pcf2123)
385386 return -ENOMEM;
386
- spi->dev.platform_data = pdata;
387
+
388
+ dev_set_drvdata(&spi->dev, pcf2123);
389
+
390
+ pcf2123->map = devm_regmap_init_spi(spi, &pcf2123_regmap_config);
391
+ if (IS_ERR(pcf2123->map)) {
392
+ dev_err(&spi->dev, "regmap init failed.\n");
393
+ return PTR_ERR(pcf2123->map);
394
+ }
387395
388396 ret = pcf2123_rtc_read_time(&spi->dev, &tm);
389397 if (ret < 0) {
390398 ret = pcf2123_reset(&spi->dev);
391399 if (ret < 0) {
392400 dev_err(&spi->dev, "chip not found\n");
393
- goto kfree_exit;
401
+ return ret;
394402 }
395403 }
396404
....@@ -398,60 +406,46 @@
398406 (spi->max_speed_hz + 500) / 1000);
399407
400408 /* Finalize the initialization */
401
- rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name,
402
- &pcf2123_rtc_ops, THIS_MODULE);
409
+ rtc = devm_rtc_allocate_device(&spi->dev);
410
+ if (IS_ERR(rtc))
411
+ return PTR_ERR(rtc);
403412
404
- if (IS_ERR(rtc)) {
405
- dev_err(&spi->dev, "failed to register.\n");
406
- ret = PTR_ERR(rtc);
407
- goto kfree_exit;
413
+ pcf2123->rtc = rtc;
414
+
415
+ /* Register alarm irq */
416
+ if (spi->irq > 0) {
417
+ ret = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
418
+ pcf2123_rtc_irq,
419
+ IRQF_TRIGGER_LOW | IRQF_ONESHOT,
420
+ pcf2123_driver.driver.name, &spi->dev);
421
+ if (!ret)
422
+ device_init_wakeup(&spi->dev, true);
423
+ else
424
+ dev_err(&spi->dev, "could not request irq.\n");
408425 }
409426
410
- pdata->rtc = rtc;
427
+ /* The PCF2123's alarm only has minute accuracy. Must add timer
428
+ * support to this driver to generate interrupts more than once
429
+ * per minute.
430
+ */
431
+ rtc->uie_unsupported = 1;
432
+ rtc->ops = &pcf2123_rtc_ops;
433
+ rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
434
+ rtc->range_max = RTC_TIMESTAMP_END_2099;
435
+ rtc->set_start_time = true;
411436
412
- for (i = 0; i < 16; i++) {
413
- sysfs_attr_init(&pdata->regs[i].attr.attr);
414
- sprintf(pdata->regs[i].name, "%1x", i);
415
- pdata->regs[i].attr.attr.mode = S_IRUGO | S_IWUSR;
416
- pdata->regs[i].attr.attr.name = pdata->regs[i].name;
417
- pdata->regs[i].attr.show = pcf2123_show;
418
- pdata->regs[i].attr.store = pcf2123_store;
419
- ret = device_create_file(&spi->dev, &pdata->regs[i].attr);
420
- if (ret) {
421
- dev_err(&spi->dev, "Unable to create sysfs %s\n",
422
- pdata->regs[i].name);
423
- goto sysfs_exit;
424
- }
425
- }
426
-
427
- return 0;
428
-
429
-sysfs_exit:
430
- for (i--; i >= 0; i--)
431
- device_remove_file(&spi->dev, &pdata->regs[i].attr);
432
-
433
-kfree_exit:
434
- spi->dev.platform_data = NULL;
435
- return ret;
436
-}
437
-
438
-static int pcf2123_remove(struct spi_device *spi)
439
-{
440
- struct pcf2123_plat_data *pdata = dev_get_platdata(&spi->dev);
441
- int i;
442
-
443
- if (pdata) {
444
- for (i = 0; i < 16; i++)
445
- if (pdata->regs[i].name[0])
446
- device_remove_file(&spi->dev,
447
- &pdata->regs[i].attr);
448
- }
437
+ ret = rtc_register_device(rtc);
438
+ if (ret)
439
+ return ret;
449440
450441 return 0;
451442 }
452443
453444 #ifdef CONFIG_OF
454445 static const struct of_device_id pcf2123_dt_ids[] = {
446
+ { .compatible = "nxp,pcf2123", },
447
+ { .compatible = "microcrystal,rv2123", },
448
+ /* Deprecated, do not use */
455449 { .compatible = "nxp,rtc-pcf2123", },
456450 { /* sentinel */ }
457451 };
....@@ -464,7 +458,6 @@
464458 .of_match_table = of_match_ptr(pcf2123_dt_ids),
465459 },
466460 .probe = pcf2123_probe,
467
- .remove = pcf2123_remove,
468461 };
469462
470463 module_spi_driver(pcf2123_driver);