add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/drivers/pinctrl/bcm/pinctrl-bcm281xx.c
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@@ -59,7 +59,7 @@
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 #define BCM281XX_HDMI_PIN_REG_MODE_MASK		0x0010
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 #define BCM281XX_HDMI_PIN_REG_MODE_SHIFT	4
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-/**
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+/*
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  * bcm281xx_pin_type - types of pin register
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  */
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 enum bcm281xx_pin_type {
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@@ -73,7 +73,7 @@
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 static enum bcm281xx_pin_type i2c_pin = BCM281XX_PIN_TYPE_I2C;
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 static enum bcm281xx_pin_type hdmi_pin = BCM281XX_PIN_TYPE_HDMI;
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-/**
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+/*
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  * bcm281xx_pin_function- define pin function
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  */
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 struct bcm281xx_pin_function {
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@@ -82,7 +82,7 @@
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 	const unsigned ngroups;
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 };
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-/**
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+/*
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  * bcm281xx_pinctrl_data - Broadcom-specific pinctrl data
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  * @reg_base - base of pinctrl registers
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  */
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@@ -1400,15 +1400,13 @@
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 static int __init bcm281xx_pinctrl_probe(struct platform_device *pdev)
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 {
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 	struct bcm281xx_pinctrl_data *pdata = &bcm281xx_pinctrl;
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-	struct resource *res;
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 	struct pinctrl_dev *pctl;
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 	/* So far We can assume there is only 1 bank of registers */
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-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	pdata->reg_base = devm_ioremap_resource(&pdev->dev, res);
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+	pdata->reg_base = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(pdata->reg_base)) {
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 		dev_err(&pdev->dev, "Failed to ioremap MEM resource\n");
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-		return -ENODEV;
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+		return PTR_ERR(pdata->reg_base);
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 	}
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 	/* Initialize the dynamic part of pinctrl_desc */