forked from ~ljy/RK356X_SDK_RELEASE

blame | history | patch | commit | commitdiff
hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/drivers/pci/controller/pcie-rockchip-host.c
....@@ -102,16 +102,13 @@
102102 static int rockchip_pcie_valid_device(struct rockchip_pcie *rockchip,
103103 				      struct pci_bus *bus, int dev)
104104 {
105
-	/* access only one slot on each root port */
106
-	if (bus->number == rockchip->root_bus_nr && dev > 0)
107
-		return 0;
108
-
109105 	/*
110
-	 * do not read more than one device on the bus directly attached
106
+	 * Access only one slot on each root port.
107
+	 * Do not read more than one device on the bus directly attached
111108 	 * to RC's downstream side.
112109 	 */
113
-	if (bus->primary == rockchip->root_bus_nr && dev > 0)
114
-		return 0;
110
+	if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent))
111
+		return dev == 0;
115112 
116113 	return 1;
117114 }
....@@ -204,7 +201,7 @@
204201 		return PCIBIOS_BAD_REGISTER_NUMBER;
205202 	}
206203 
207
-	if (bus->parent->number == rockchip->root_bus_nr)
204
+	if (pci_is_root_bus(bus->parent))
208205 		rockchip_pcie_cfg_configuration_accesses(rockchip,
209206 						AXI_WRAPPER_TYPE0_CFG);
210207 	else
....@@ -238,7 +235,7 @@
238235 	if (!IS_ALIGNED(busdev, size))
239236 		return PCIBIOS_BAD_REGISTER_NUMBER;
240237 
241
-	if (bus->parent->number == rockchip->root_bus_nr)
238
+	if (pci_is_root_bus(bus->parent))
242239 		rockchip_pcie_cfg_configuration_accesses(rockchip,
243240 						AXI_WRAPPER_TYPE0_CFG);
244241 	else
....@@ -267,7 +264,7 @@
267264 		return PCIBIOS_DEVICE_NOT_FOUND;
268265 	}
269266 
270
-	if (bus->number == rockchip->root_bus_nr)
267
+	if (pci_is_root_bus(bus))
271268 		return rockchip_pcie_rd_own_conf(rockchip, where, size, val);
272269 
273270 	return rockchip_pcie_rd_other_conf(rockchip, bus, devfn, where, size,
....@@ -282,7 +279,7 @@
282279 	if (!rockchip_pcie_valid_device(rockchip, bus, PCI_SLOT(devfn)))
283280 		return PCIBIOS_DEVICE_NOT_FOUND;
284281 
285
-	if (bus->number == rockchip->root_bus_nr)
282
+	if (pci_is_root_bus(bus))
286283 		return rockchip_pcie_wr_own_conf(rockchip, where, size, val);
287284 
288285 	return rockchip_pcie_wr_other_conf(rockchip, bus, devfn, where, size,
....@@ -444,6 +441,11 @@
444441 		status &= ~PCIE_RC_CONFIG_LINK_CAP_L0S;
445442 		rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_LINK_CAP);
446443 	}
444
+
445
+	status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_DCSR);
446
+	status &= ~PCIE_RC_CONFIG_DCSR_MPS_MASK;
447
+	status |= PCIE_RC_CONFIG_DCSR_MPS_256;
448
+	rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_DCSR);
447449 
448450 	return 0;
449451 err_power_off_phy:
....@@ -632,10 +634,8 @@
632634 	struct platform_device *pdev = to_platform_device(dev);
633635 
634636 	irq = platform_get_irq_byname(pdev, "sys");
635
-	if (irq < 0) {
636
-		dev_err(dev, "missing sys IRQ resource\n");
637
+	if (irq < 0)
637638 		return irq;
638
-	}
639639 
640640 	err = devm_request_irq(dev, irq, rockchip_pcie_subsys_irq_handler,
641641 			       IRQF_SHARED, "pcie-sys", rockchip);
....@@ -645,20 +645,16 @@
645645 	}
646646 
647647 	irq = platform_get_irq_byname(pdev, "legacy");
648
-	if (irq < 0) {
649
-		dev_err(dev, "missing legacy IRQ resource\n");
648
+	if (irq < 0)
650649 		return irq;
651
-	}
652650 
653651 	irq_set_chained_handler_and_data(irq,
654652 					 rockchip_pcie_legacy_int_handler,
655653 					 rockchip);
656654 
657655 	irq = platform_get_irq_byname(pdev, "client");
658
-	if (irq < 0) {
659
-		dev_err(dev, "missing client IRQ resource\n");
656
+	if (irq < 0)
660657 		return irq;
661
-	}
662658 
663659 	err = devm_request_irq(dev, irq, rockchip_pcie_client_irq_handler,
664660 			       IRQF_SHARED, "pcie-client", rockchip);
....@@ -685,10 +681,6 @@
685681 	if (err)
686682 		return err;
687683 
688
-	err = rockchip_pcie_setup_irq(rockchip);
689
-	if (err)
690
-		return err;
691
-
692684 	rockchip->vpcie12v = devm_regulator_get_optional(dev, "vpcie12v");
693685 	if (IS_ERR(rockchip->vpcie12v)) {
694686 		if (PTR_ERR(rockchip->vpcie12v) != -ENODEV)
....@@ -703,19 +695,13 @@
703695 		dev_info(dev, "no vpcie3v3 regulator found\n");
704696 	}
705697 
706
-	rockchip->vpcie1v8 = devm_regulator_get_optional(dev, "vpcie1v8");
707
-	if (IS_ERR(rockchip->vpcie1v8)) {
708
-		if (PTR_ERR(rockchip->vpcie1v8) != -ENODEV)
709
-			return PTR_ERR(rockchip->vpcie1v8);
710
-		dev_info(dev, "no vpcie1v8 regulator found\n");
711
-	}
698
+	rockchip->vpcie1v8 = devm_regulator_get(dev, "vpcie1v8");
699
+	if (IS_ERR(rockchip->vpcie1v8))
700
+		return PTR_ERR(rockchip->vpcie1v8);
712701 
713
-	rockchip->vpcie0v9 = devm_regulator_get_optional(dev, "vpcie0v9");
714
-	if (IS_ERR(rockchip->vpcie0v9)) {
715
-		if (PTR_ERR(rockchip->vpcie0v9) != -ENODEV)
716
-			return PTR_ERR(rockchip->vpcie0v9);
717
-		dev_info(dev, "no vpcie0v9 regulator found\n");
718
-	}
702
+	rockchip->vpcie0v9 = devm_regulator_get(dev, "vpcie0v9");
703
+	if (IS_ERR(rockchip->vpcie0v9))
704
+		return PTR_ERR(rockchip->vpcie0v9);
719705 
720706 	return 0;
721707 }
....@@ -741,27 +727,22 @@
741727 		}
742728 	}
743729 
744
-	if (!IS_ERR(rockchip->vpcie1v8)) {
745
-		err = regulator_enable(rockchip->vpcie1v8);
746
-		if (err) {
747
-			dev_err(dev, "fail to enable vpcie1v8 regulator\n");
748
-			goto err_disable_3v3;
749
-		}
730
+	err = regulator_enable(rockchip->vpcie1v8);
731
+	if (err) {
732
+		dev_err(dev, "fail to enable vpcie1v8 regulator\n");
733
+		goto err_disable_3v3;
750734 	}
751735 
752
-	if (!IS_ERR(rockchip->vpcie0v9)) {
753
-		err = regulator_enable(rockchip->vpcie0v9);
754
-		if (err) {
755
-			dev_err(dev, "fail to enable vpcie0v9 regulator\n");
756
-			goto err_disable_1v8;
757
-		}
736
+	err = regulator_enable(rockchip->vpcie0v9);
737
+	if (err) {
738
+		dev_err(dev, "fail to enable vpcie0v9 regulator\n");
739
+		goto err_disable_1v8;
758740 	}
759741 
760742 	return 0;
761743 
762744 err_disable_1v8:
763
-	if (!IS_ERR(rockchip->vpcie1v8))
764
-		regulator_disable(rockchip->vpcie1v8);
745
+	regulator_disable(rockchip->vpcie1v8);
765746 err_disable_3v3:
766747 	if (!IS_ERR(rockchip->vpcie3v3))
767748 		regulator_disable(rockchip->vpcie3v3);
....@@ -809,6 +790,7 @@
809790 
810791 	rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX,
811792 						    &intx_domain_ops, rockchip);
793
+	of_node_put(intc);
812794 	if (!rockchip->irq_domain) {
813795 		dev_err(dev, "failed to get a INTx IRQ domain\n");
814796 		return -EINVAL;
....@@ -890,19 +872,28 @@
890872 static int rockchip_pcie_cfg_atu(struct rockchip_pcie *rockchip)
891873 {
892874 	struct device *dev = rockchip->dev;
875
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
876
+	struct resource_entry *entry;
877
+	u64 pci_addr, size;
893878 	int offset;
894879 	int err;
895880 	int reg_no;
896881 
897882 	rockchip_pcie_cfg_configuration_accesses(rockchip,
898883 						 AXI_WRAPPER_TYPE0_CFG);
884
+	entry = resource_list_first_type(&bridge->windows, IORESOURCE_MEM);
885
+	if (!entry)
886
+		return -ENODEV;
899887 
900
-	for (reg_no = 0; reg_no < (rockchip->mem_size >> 20); reg_no++) {
888
+	size = resource_size(entry->res);
889
+	pci_addr = entry->res->start - entry->offset;
890
+	rockchip->msg_bus_addr = pci_addr;
891
+
892
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
901893 		err = rockchip_pcie_prog_ob_atu(rockchip, reg_no + 1,
902894 						AXI_WRAPPER_MEM_WRITE,
903895 						20 - 1,
904
-						rockchip->mem_bus_addr +
905
-						(reg_no << 20),
896
+						pci_addr + (reg_no << 20),
906897 						0);
907898 		if (err) {
908899 			dev_err(dev, "program RC mem outbound ATU failed\n");
....@@ -922,14 +913,22 @@
922913 		return err;
923914 	}
924915 
925
-	offset = rockchip->mem_size >> 20;
926
-	for (reg_no = 0; reg_no < (rockchip->io_size >> 20); reg_no++) {
916
+	entry = resource_list_first_type(&bridge->windows, IORESOURCE_IO);
917
+	if (!entry)
918
+		return -ENODEV;
919
+
920
+	/* store the register number offset to program RC io outbound ATU */
921
+	offset = size >> 20;
922
+
923
+	size = resource_size(entry->res);
924
+	pci_addr = entry->res->start - entry->offset;
925
+
926
+	for (reg_no = 0; reg_no < (size >> 20); reg_no++) {
927927 		err = rockchip_pcie_prog_ob_atu(rockchip,
928928 						reg_no + 1 + offset,
929929 						AXI_WRAPPER_IO_WRITE,
930930 						20 - 1,
931
-						rockchip->io_bus_addr +
932
-						(reg_no << 20),
931
+						pci_addr + (reg_no << 20),
933932 						0);
934933 		if (err) {
935934 			dev_err(dev, "program RC io outbound ATU failed\n");
....@@ -942,13 +941,10 @@
942941 				  AXI_WRAPPER_NOR_MSG,
943942 				  20 - 1, 0, 0);
944943 
945
-	rockchip->msg_bus_addr = rockchip->mem_bus_addr +
946
-					((reg_no + offset) << 20);
947
-
944
+	rockchip->msg_bus_addr += ((reg_no + offset) << 20);
948945 	rockchip->msg_region = devm_ioremap(dev, rockchip->msg_bus_addr, SZ_1M);
949946 	if (!rockchip->msg_region)
950947 		err = -ENOMEM;
951
-
952948 	return err;
953949 }
954950 
....@@ -1031,8 +1027,7 @@
10311027 
10321028 	rockchip_pcie_disable_clocks(rockchip);
10331029 
1034
-	if (!IS_ERR(rockchip->vpcie0v9))
1035
-		regulator_disable(rockchip->vpcie0v9);
1030
+	regulator_disable(rockchip->vpcie0v9);
10361031 
10371032 	return ret;
10381033 }
....@@ -1042,12 +1037,10 @@
10421037 	struct rockchip_pcie *rockchip = dev_get_drvdata(dev);
10431038 	int err;
10441039 
1045
-	if (!IS_ERR(rockchip->vpcie0v9)) {
1046
-		err = regulator_enable(rockchip->vpcie0v9);
1047
-		if (err) {
1048
-			dev_err(dev, "fail to enable vpcie0v9 regulator\n");
1049
-			return err;
1050
-		}
1040
+	err = regulator_enable(rockchip->vpcie0v9);
1041
+	if (err) {
1042
+		dev_err(dev, "fail to enable vpcie0v9 regulator\n");
1043
+		return err;
10511044 	}
10521045 
10531046 	err = rockchip_pcie_enable_clocks(rockchip);
....@@ -1056,22 +1049,28 @@
10561049 
10571050 	if (!rockchip->dma_trx_enabled)
10581051 		err = rockchip_pcie_resume_for_user(dev);
1052
+	if (err)
1053
+		goto err_disable_clocks;
10591054 
1060
-	return err;
1055
+	return 0;
10611056 
1057
+err_disable_clocks:
1058
+	rockchip_pcie_disable_clocks(rockchip);
10621059 err_disable_0v9:
1063
-	if (!IS_ERR(rockchip->vpcie0v9))
1064
-		regulator_disable(rockchip->vpcie0v9);
1060
+	regulator_disable(rockchip->vpcie0v9);
1061
+
10651062 	return err;
10661063 }
10671064 
10681065 static int rockchip_pcie_really_probe(struct rockchip_pcie *rockchip)
10691066 {
10701067 	int err;
1071
-	struct pci_bus *bus, *child;
1072
-	struct	device *dev = rockchip->dev;
10731068 
10741069 	err = rockchip_pcie_host_init_port(rockchip);
1070
+	if (err)
1071
+		return err;
1072
+
1073
+	err = rockchip_pcie_setup_irq(rockchip);
10751074 	if (err)
10761075 		return err;
10771076 
....@@ -1081,31 +1080,12 @@
10811080 	if (err)
10821081 		return err;
10831082 
1084
-	list_splice_init(&rockchip->resources, &rockchip->bridge->windows);
1085
-	rockchip->bridge->dev.parent = dev;
10861083 	rockchip->bridge->sysdata = rockchip;
1087
-	rockchip->bridge->busnr = 0;
10881084 	rockchip->bridge->ops = &rockchip_pcie_ops;
1089
-	rockchip->bridge->map_irq = of_irq_parse_and_map_pci;
1090
-	rockchip->bridge->swizzle_irq = pci_common_swizzle;
10911085 
1092
-	err = pci_scan_root_bus_bridge(rockchip->bridge);
1093
-	if (err < 0)
1094
-		return err;
1095
-
1096
-	bus = rockchip->bridge->bus;
1097
-
1098
-	rockchip->root_bus = bus;
1099
-
1100
-	pci_bus_size_bridges(bus);
1101
-	pci_bus_assign_resources(bus);
1102
-	list_for_each_entry(child, &bus->children, node)
1103
-		pcie_bus_configure_settings(child);
1104
-
1105
-	pci_bus_add_devices(bus);
11061086 	device_init_wakeup(rockchip->dev, true);
11071087 
1108
-	return 0;
1088
+	return pci_host_probe(rockchip->bridge);
11091089 }
11101090 
11111091 static ssize_t pcie_deferred_store(struct device *dev,
....@@ -1171,12 +1151,8 @@
11711151 static int rockchip_pcie_probe(struct platform_device *pdev)
11721152 {
11731153 	struct rockchip_pcie *rockchip;
1174
-	struct pci_host_bridge *bridge;
11751154 	struct device *dev = &pdev->dev;
1176
-	struct resource_entry *win;
1177
-	resource_size_t io_base;
1178
-	struct resource	*mem;
1179
-	struct resource	*io;
1155
+	struct pci_host_bridge *bridge;
11801156 	int err;
11811157 
11821158 	if (!dev->of_node)
....@@ -1212,58 +1188,17 @@
12121188 	if (err < 0)
12131189 		goto err_vpcie;
12141190 
1215
-	INIT_LIST_HEAD(&rockchip->resources);
1216
-
1217
-	err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
1218
-						    &rockchip->resources, &io_base);
1219
-	if (err)
1220
-		goto err_remove_irq_domain;
1221
-
1222
-	err = devm_request_pci_bus_resources(dev, &rockchip->resources);
1223
-	if (err)
1224
-		goto err_free_res;
1225
-
1226
-	/* Get the I/O and memory ranges from DT */
1227
-	resource_list_for_each_entry(win, &rockchip->resources) {
1228
-		switch (resource_type(win->res)) {
1229
-		case IORESOURCE_IO:
1230
-			io = win->res;
1231
-			io->name = "I/O";
1232
-			rockchip->io_size = resource_size(io);
1233
-			rockchip->io_bus_addr = io->start - win->offset;
1234
-			err = pci_remap_iospace(io, io_base);
1235
-			if (err) {
1236
-				dev_warn(dev, "error %d: failed to map resource %pR\n",
1237
-					 err, io);
1238
-				continue;
1239
-			}
1240
-			rockchip->io = io;
1241
-			break;
1242
-		case IORESOURCE_MEM:
1243
-			mem = win->res;
1244
-			mem->name = "MEM";
1245
-			rockchip->mem_size = resource_size(mem);
1246
-			rockchip->mem_bus_addr = mem->start - win->offset;
1247
-			break;
1248
-		case IORESOURCE_BUS:
1249
-			rockchip->root_bus_nr = win->res->start;
1250
-			break;
1251
-		default:
1252
-			continue;
1253
-		}
1254
-	}
1255
-
12561191 	if (rockchip->deferred) {
12571192 		err = sysfs_create_group(&pdev->dev.kobj, &pcie_attr_group);
12581193 		if (err) {
12591194 			dev_err(&pdev->dev, "SysFS group creation failed\n");
1260
-			goto err_unmap_iospace;
1195
+			goto err_remove_irq_domain;
12611196 		}
12621197 	} else {
12631198 		err = rockchip_pcie_really_probe(rockchip);
12641199 		if (err) {
12651200 			dev_err(&pdev->dev, "deferred probe failed\n");
1266
-			goto err_probe_dma;
1201
+			goto err_deinit_port;
12671202 		}
12681203 	}
12691204 
....@@ -1274,7 +1209,7 @@
12741209 	if (IS_ERR(rockchip->dma_obj)) {
12751210 		dev_err(dev, "failed to prepare dma object\n");
12761211 		err = -EINVAL;
1277
-		goto err_probe_dma;
1212
+		goto err_deinit_port;
12781213 	}
12791214 
12801215 	if (rockchip->dma_obj) {
....@@ -1284,13 +1219,10 @@
12841219 
12851220 	return 0;
12861221 
1287
-err_probe_dma:
1222
+err_deinit_port:
1223
+	rockchip_pcie_deinit_phys(rockchip);
12881224 	if (rockchip->deferred)
12891225 		sysfs_remove_group(&pdev->dev.kobj, &pcie_attr_group);
1290
-err_unmap_iospace:
1291
-	pci_unmap_iospace(rockchip->io);
1292
-err_free_res:
1293
-	pci_free_resource_list(&rockchip->resources);
12941226 err_remove_irq_domain:
12951227 	irq_domain_remove(rockchip->irq_domain);
12961228 err_vpcie:
....@@ -1298,10 +1230,8 @@
12981230 		regulator_disable(rockchip->vpcie12v);
12991231 	if (!IS_ERR(rockchip->vpcie3v3))
13001232 		regulator_disable(rockchip->vpcie3v3);
1301
-	if (!IS_ERR(rockchip->vpcie1v8))
1302
-		regulator_disable(rockchip->vpcie1v8);
1303
-	if (!IS_ERR(rockchip->vpcie0v9))
1304
-		regulator_disable(rockchip->vpcie0v9);
1233
+	regulator_disable(rockchip->vpcie1v8);
1234
+	regulator_disable(rockchip->vpcie0v9);
13051235 err_set_vpcie:
13061236 	rockchip_pcie_disable_clocks(rockchip);
13071237 	return err;
....@@ -1313,6 +1243,7 @@
13131243 	struct rockchip_pcie *rockchip = dev_get_drvdata(dev);
13141244 	u32 status1, status2;
13151245 	u32 status;
1246
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(rockchip);
13161247 
13171248 	status1 = rockchip_pcie_read(rockchip, PCIE_CLIENT_BASIC_STATUS1);
13181249 	status2 = rockchip_pcie_read(rockchip, PCIE_CLIENT_DEBUG_OUT_0);
....@@ -1320,12 +1251,8 @@
13201251 	if (!PCIE_LINK_UP(status1) || !PCIE_LINK_IS_L0(status2))
13211252 		rockchip->in_remove = 1;
13221253 
1323
-	if (rockchip->root_bus) {
1324
-		pci_stop_root_bus(rockchip->root_bus);
1325
-		pci_remove_root_bus(rockchip->root_bus);
1326
-	}
1327
-
1328
-	pci_unmap_iospace(rockchip->io);
1254
+	pci_stop_root_bus(bridge->bus);
1255
+	pci_remove_root_bus(bridge->bus);
13291256 	irq_domain_remove(rockchip->irq_domain);
13301257 
13311258 	/* disable link state */
....@@ -1353,10 +1280,8 @@
13531280 		regulator_disable(rockchip->vpcie12v);
13541281 	if (!IS_ERR(rockchip->vpcie3v3))
13551282 		regulator_disable(rockchip->vpcie3v3);
1356
-	if (!IS_ERR(rockchip->vpcie1v8))
1357
-		regulator_disable(rockchip->vpcie1v8);
1358
-	if (!IS_ERR(rockchip->vpcie0v9))
1359
-		regulator_disable(rockchip->vpcie0v9);
1283
+	regulator_disable(rockchip->vpcie1v8);
1284
+	regulator_disable(rockchip->vpcie0v9);
13601285 
13611286 	device_init_wakeup(rockchip->dev, false);
13621287