add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/drivers/net/wireless/marvell/mwifiex/sdio.h
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@@ -1,10 +1,10 @@
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 /*
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- * Marvell Wireless LAN device driver: SDIO specific definitions
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+ * NXP Wireless LAN device driver: SDIO specific definitions
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  *
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- * Copyright (C) 2011-2014, Marvell International Ltd.
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+ * Copyright 2011-2020 NXP
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  *
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- * This software file (the "File") is distributed by Marvell International
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- * Ltd. under the terms of the GNU General Public License Version 2, June 1991
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+ * This software file (the "File") is distributed by NXP
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+ * under the terms of the GNU General Public License Version 2, June 1991
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  * (the "License").  You may use, redistribute and/or modify this File in
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  * accordance with the terms and conditions of the License, a copy of which
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  * is available by writing to the Free Software Foundation, Inc.,
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@@ -36,7 +36,9 @@
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 #define SD8897_DEFAULT_FW_NAME "mrvl/sd8897_uapsta.bin"
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 #define SD8887_DEFAULT_FW_NAME "mrvl/sd8887_uapsta.bin"
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 #define SD8801_DEFAULT_FW_NAME "mrvl/sd8801_uapsta.bin"
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-#define SD8997_DEFAULT_FW_NAME "mrvl/sd8997_uapsta.bin"
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+#define SD8977_DEFAULT_FW_NAME "mrvl/sdsd8977_combo_v2.bin"
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+#define SD8987_DEFAULT_FW_NAME "mrvl/sd8987_uapsta.bin"
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+#define SD8997_DEFAULT_FW_NAME "mrvl/sdsd8997_combo_v4.bin"
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 #define BLOCK_MODE	1
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 #define BYTE_MODE	0
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@@ -286,296 +288,6 @@
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 	bool fw_dump_enh;
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 	bool can_auto_tdls;
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 	bool can_ext_scan;
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-};
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-
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-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
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-	.start_rd_port = 1,
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-	.start_wr_port = 1,
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-	.base_0_reg = 0x0040,
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-	.base_1_reg = 0x0041,
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-	.poll_reg = 0x30,
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-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
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-	.host_int_rsr_reg = 0x1,
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-	.host_int_mask_reg = 0x02,
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-	.host_int_status_reg = 0x03,
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-	.status_reg_0 = 0x60,
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-	.status_reg_1 = 0x61,
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-	.sdio_int_mask = 0x3f,
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-	.data_port_mask = 0x0000fffe,
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-	.io_port_0_reg = 0x78,
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-	.io_port_1_reg = 0x79,
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-	.io_port_2_reg = 0x7A,
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-	.max_mp_regs = 64,
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-	.rd_bitmap_l = 0x04,
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-	.rd_bitmap_u = 0x05,
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-	.wr_bitmap_l = 0x06,
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-	.wr_bitmap_u = 0x07,
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-	.rd_len_p0_l = 0x08,
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-	.rd_len_p0_u = 0x09,
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-	.card_misc_cfg_reg = 0x6c,
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-	.func1_dump_reg_start = 0x0,
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-	.func1_dump_reg_end = 0x9,
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-	.func1_scratch_reg = 0x60,
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-	.func1_spec_reg_num = 5,
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-	.func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c},
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-};
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-
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-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
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-	.start_rd_port = 0,
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-	.start_wr_port = 0,
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-	.base_0_reg = 0x60,
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-	.base_1_reg = 0x61,
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-	.poll_reg = 0x50,
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-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
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-			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
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-	.host_int_rsr_reg = 0x1,
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-	.host_int_status_reg = 0x03,
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-	.host_int_mask_reg = 0x02,
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-	.status_reg_0 = 0xc0,
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-	.status_reg_1 = 0xc1,
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-	.sdio_int_mask = 0xff,
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-	.data_port_mask = 0xffffffff,
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-	.io_port_0_reg = 0xD8,
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-	.io_port_1_reg = 0xD9,
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-	.io_port_2_reg = 0xDA,
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-	.max_mp_regs = 184,
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-	.rd_bitmap_l = 0x04,
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-	.rd_bitmap_u = 0x05,
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-	.rd_bitmap_1l = 0x06,
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-	.rd_bitmap_1u = 0x07,
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-	.wr_bitmap_l = 0x08,
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-	.wr_bitmap_u = 0x09,
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-	.wr_bitmap_1l = 0x0a,
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-	.wr_bitmap_1u = 0x0b,
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-	.rd_len_p0_l = 0x0c,
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-	.rd_len_p0_u = 0x0d,
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-	.card_misc_cfg_reg = 0xcc,
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-	.card_cfg_2_1_reg = 0xcd,
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-	.cmd_rd_len_0 = 0xb4,
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-	.cmd_rd_len_1 = 0xb5,
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-	.cmd_rd_len_2 = 0xb6,
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-	.cmd_rd_len_3 = 0xb7,
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-	.cmd_cfg_0 = 0xb8,
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-	.cmd_cfg_1 = 0xb9,
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-	.cmd_cfg_2 = 0xba,
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-	.cmd_cfg_3 = 0xbb,
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-	.fw_dump_host_ready = 0xee,
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-	.fw_dump_ctrl = 0xe2,
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-	.fw_dump_start = 0xe3,
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-	.fw_dump_end = 0xea,
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-	.func1_dump_reg_start = 0x0,
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-	.func1_dump_reg_end = 0xb,
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-	.func1_scratch_reg = 0xc0,
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-	.func1_spec_reg_num = 8,
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-	.func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58,
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-				 0x59, 0x5c, 0x5d},
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-};
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-
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-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = {
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-	.start_rd_port = 0,
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-	.start_wr_port = 0,
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-	.base_0_reg = 0xF8,
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-	.base_1_reg = 0xF9,
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-	.poll_reg = 0x5C,
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-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
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-			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
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-	.host_int_rsr_reg = 0x4,
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-	.host_int_status_reg = 0x0C,
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-	.host_int_mask_reg = 0x08,
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-	.status_reg_0 = 0xE8,
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-	.status_reg_1 = 0xE9,
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-	.sdio_int_mask = 0xff,
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-	.data_port_mask = 0xffffffff,
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-	.io_port_0_reg = 0xE4,
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-	.io_port_1_reg = 0xE5,
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-	.io_port_2_reg = 0xE6,
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-	.max_mp_regs = 196,
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-	.rd_bitmap_l = 0x10,
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-	.rd_bitmap_u = 0x11,
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-	.rd_bitmap_1l = 0x12,
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-	.rd_bitmap_1u = 0x13,
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-	.wr_bitmap_l = 0x14,
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-	.wr_bitmap_u = 0x15,
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-	.wr_bitmap_1l = 0x16,
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-	.wr_bitmap_1u = 0x17,
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-	.rd_len_p0_l = 0x18,
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-	.rd_len_p0_u = 0x19,
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-	.card_misc_cfg_reg = 0xd8,
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-	.card_cfg_2_1_reg = 0xd9,
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-	.cmd_rd_len_0 = 0xc0,
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-	.cmd_rd_len_1 = 0xc1,
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-	.cmd_rd_len_2 = 0xc2,
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-	.cmd_rd_len_3 = 0xc3,
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-	.cmd_cfg_0 = 0xc4,
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-	.cmd_cfg_1 = 0xc5,
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-	.cmd_cfg_2 = 0xc6,
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-	.cmd_cfg_3 = 0xc7,
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-	.fw_dump_host_ready = 0xcc,
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-	.fw_dump_ctrl = 0xf0,
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-	.fw_dump_start = 0xf1,
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-	.fw_dump_end = 0xf8,
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-	.func1_dump_reg_start = 0x10,
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-	.func1_dump_reg_end = 0x17,
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-	.func1_scratch_reg = 0xe8,
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-	.func1_spec_reg_num = 13,
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-	.func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
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-				 0x60, 0x61, 0x62, 0x64,
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-				 0x65, 0x66, 0x68, 0x69,
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-				 0x6a},
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-};
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-
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-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = {
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-	.start_rd_port = 0,
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-	.start_wr_port = 0,
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-	.base_0_reg = 0x6C,
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-	.base_1_reg = 0x6D,
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-	.poll_reg = 0x5C,
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-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
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-			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
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-	.host_int_rsr_reg = 0x4,
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-	.host_int_status_reg = 0x0C,
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-	.host_int_mask_reg = 0x08,
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-	.status_reg_0 = 0x90,
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-	.status_reg_1 = 0x91,
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-	.sdio_int_mask = 0xff,
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-	.data_port_mask = 0xffffffff,
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-	.io_port_0_reg = 0xE4,
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-	.io_port_1_reg = 0xE5,
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-	.io_port_2_reg = 0xE6,
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-	.max_mp_regs = 196,
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-	.rd_bitmap_l = 0x10,
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-	.rd_bitmap_u = 0x11,
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-	.rd_bitmap_1l = 0x12,
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-	.rd_bitmap_1u = 0x13,
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-	.wr_bitmap_l = 0x14,
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-	.wr_bitmap_u = 0x15,
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-	.wr_bitmap_1l = 0x16,
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-	.wr_bitmap_1u = 0x17,
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-	.rd_len_p0_l = 0x18,
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-	.rd_len_p0_u = 0x19,
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-	.card_misc_cfg_reg = 0xd8,
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-	.card_cfg_2_1_reg = 0xd9,
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-	.cmd_rd_len_0 = 0xc0,
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-	.cmd_rd_len_1 = 0xc1,
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-	.cmd_rd_len_2 = 0xc2,
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-	.cmd_rd_len_3 = 0xc3,
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-	.cmd_cfg_0 = 0xc4,
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-	.cmd_cfg_1 = 0xc5,
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-	.cmd_cfg_2 = 0xc6,
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-	.cmd_cfg_3 = 0xc7,
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-	.func1_dump_reg_start = 0x10,
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-	.func1_dump_reg_end = 0x17,
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-	.func1_scratch_reg = 0x90,
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-	.func1_spec_reg_num = 13,
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-	.func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
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-				 0x61, 0x62, 0x64, 0x65, 0x66,
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-				 0x68, 0x69, 0x6a},
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
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-	.firmware = SD8786_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd87xx,
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-	.max_ports = 16,
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-	.mp_agg_pkt_limit = 8,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.supports_sdio_new_mode = false,
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-	.has_control_mask = true,
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-	.can_dump_fw = false,
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-	.can_auto_tdls = false,
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-	.can_ext_scan = false,
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
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-	.firmware = SD8787_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd87xx,
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-	.max_ports = 16,
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-	.mp_agg_pkt_limit = 8,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.supports_sdio_new_mode = false,
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-	.has_control_mask = true,
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-	.can_dump_fw = false,
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-	.can_auto_tdls = false,
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-	.can_ext_scan = true,
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
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-	.firmware = SD8797_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd87xx,
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-	.max_ports = 16,
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-	.mp_agg_pkt_limit = 8,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.supports_sdio_new_mode = false,
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-	.has_control_mask = true,
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-	.can_dump_fw = false,
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-	.can_auto_tdls = false,
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-	.can_ext_scan = true,
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
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-	.firmware = SD8897_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd8897,
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-	.max_ports = 32,
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-	.mp_agg_pkt_limit = 16,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
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-	.supports_sdio_new_mode = true,
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-	.has_control_mask = false,
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-	.can_dump_fw = true,
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-	.can_auto_tdls = false,
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-	.can_ext_scan = true,
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = {
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-	.firmware = SD8997_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd8997,
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-	.max_ports = 32,
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-	.mp_agg_pkt_limit = 16,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
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-	.supports_sdio_new_mode = true,
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-	.has_control_mask = false,
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-	.can_dump_fw = true,
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-	.fw_dump_enh = true,
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-	.can_auto_tdls = false,
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-	.can_ext_scan = true,
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
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-	.firmware = SD8887_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd8887,
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-	.max_ports = 32,
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-	.mp_agg_pkt_limit = 16,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
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-	.supports_sdio_new_mode = true,
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-	.has_control_mask = false,
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-	.can_dump_fw = false,
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-	.can_auto_tdls = true,
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-	.can_ext_scan = true,
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-};
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-
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-static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = {
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-	.firmware = SD8801_DEFAULT_FW_NAME,
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-	.reg = &mwifiex_reg_sd87xx,
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-	.max_ports = 16,
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-	.mp_agg_pkt_limit = 8,
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-	.supports_sdio_new_mode = false,
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-	.has_control_mask = true,
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-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
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-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
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-	.can_dump_fw = false,
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-	.can_auto_tdls = false,
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-	.can_ext_scan = true,
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 };
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 /*