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2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/drivers/net/can/spi/mcp251x.c
....@@ -1,5 +1,5 @@
1
-/*
2
- * CAN bus driver for Microchip 251x/25625 CAN Controller with SPI Interface
1
+// SPDX-License-Identifier: GPL-2.0-only
2
+/* CAN bus driver for Microchip 251x/25625 CAN Controller with SPI Interface
33  *
44  * MCP2510 support and bug fixes by Christian Pellegrin
55  * <chripell@evolware.org>
....@@ -17,65 +17,31 @@
1717  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix
1818  * - Simon Kallweit, intefo AG
1919  * Copyright 2007
20
- *
21
- * This program is free software; you can redistribute it and/or modify
22
- * it under the terms of the version 2 of the GNU General Public License
23
- * as published by the Free Software Foundation
24
- *
25
- * This program is distributed in the hope that it will be useful,
26
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
27
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28
- * GNU General Public License for more details.
29
- *
30
- * You should have received a copy of the GNU General Public License
31
- * along with this program; if not, see <http://www.gnu.org/licenses/>.
32
- *
33
- *
34
- *
35
- * Your platform definition file should specify something like:
36
- *
37
- * static struct mcp251x_platform_data mcp251x_info = {
38
- *         .oscillator_frequency = 8000000,
39
- * };
40
- *
41
- * static struct spi_board_info spi_board_info[] = {
42
- *         {
43
- *                 .modalias = "mcp2510",
44
- *			// "mcp2515" or "mcp25625" depending on your controller
45
- *                 .platform_data = &mcp251x_info,
46
- *                 .irq = IRQ_EINT13,
47
- *                 .max_speed_hz = 2*1000*1000,
48
- *                 .chip_select = 2,
49
- *         },
50
- * };
51
- *
52
- * Please see mcp251x.h for a description of the fields in
53
- * struct mcp251x_platform_data.
54
- *
5520  */
5621 
22
+#include <linux/bitfield.h>
5723 #include <linux/can/core.h>
5824 #include <linux/can/dev.h>
5925 #include <linux/can/led.h>
60
-#include <linux/can/platform/mcp251x.h>
6126 #include <linux/clk.h>
6227 #include <linux/completion.h>
6328 #include <linux/delay.h>
6429 #include <linux/device.h>
65
-#include <linux/dma-mapping.h>
6630 #include <linux/freezer.h>
31
+#include <linux/gpio.h>
32
+#include <linux/gpio/driver.h>
6733 #include <linux/interrupt.h>
6834 #include <linux/io.h>
35
+#include <linux/iopoll.h>
6936 #include <linux/kernel.h>
7037 #include <linux/module.h>
7138 #include <linux/netdevice.h>
72
-#include <linux/of.h>
73
-#include <linux/of_device.h>
7439 #include <linux/platform_device.h>
40
+#include <linux/property.h>
41
+#include <linux/regulator/consumer.h>
7542 #include <linux/slab.h>
7643 #include <linux/spi/spi.h>
7744 #include <linux/uaccess.h>
78
-#include <linux/regulator/consumer.h>
7945 
8046 /* SPI interface instruction set */
8147 #define INSTRUCTION_WRITE	0x02
....@@ -89,8 +55,31 @@
8955 #define RTS_TXB2		0x04
9056 #define INSTRUCTION_RTS(n)	(0x80 | ((n) & 0x07))
9157 
92
-
9358 /* MPC251x registers */
59
+#define BFPCTRL			0x0c
60
+#  define BFPCTRL_B0BFM		BIT(0)
61
+#  define BFPCTRL_B1BFM		BIT(1)
62
+#  define BFPCTRL_BFM(n)	(BFPCTRL_B0BFM << (n))
63
+#  define BFPCTRL_BFM_MASK	GENMASK(1, 0)
64
+#  define BFPCTRL_B0BFE		BIT(2)
65
+#  define BFPCTRL_B1BFE		BIT(3)
66
+#  define BFPCTRL_BFE(n)	(BFPCTRL_B0BFE << (n))
67
+#  define BFPCTRL_BFE_MASK	GENMASK(3, 2)
68
+#  define BFPCTRL_B0BFS		BIT(4)
69
+#  define BFPCTRL_B1BFS		BIT(5)
70
+#  define BFPCTRL_BFS(n)	(BFPCTRL_B0BFS << (n))
71
+#  define BFPCTRL_BFS_MASK	GENMASK(5, 4)
72
+#define TXRTSCTRL		0x0d
73
+#  define TXRTSCTRL_B0RTSM	BIT(0)
74
+#  define TXRTSCTRL_B1RTSM	BIT(1)
75
+#  define TXRTSCTRL_B2RTSM	BIT(2)
76
+#  define TXRTSCTRL_RTSM(n)	(TXRTSCTRL_B0RTSM << (n))
77
+#  define TXRTSCTRL_RTSM_MASK	GENMASK(2, 0)
78
+#  define TXRTSCTRL_B0RTS	BIT(3)
79
+#  define TXRTSCTRL_B1RTS	BIT(4)
80
+#  define TXRTSCTRL_B2RTS	BIT(5)
81
+#  define TXRTSCTRL_RTS(n)	(TXRTSCTRL_B0RTS << (n))
82
+#  define TXRTSCTRL_RTS_MASK	GENMASK(5, 3)
9483 #define CANSTAT	      0x0e
9584 #define CANCTRL	      0x0f
9685 #  define CANCTRL_REQOP_MASK	    0xe0
....@@ -205,8 +194,7 @@
205194 #define SET_BYTE(val, byte)			\
206195 	(((val) & 0xff) << ((byte) * 8))
207196 
208
-/*
209
- * Buffer size required for the largest SPI transfer (i.e., reading a
197
+/* Buffer size required for the largest SPI transfer (i.e., reading a
210198  * frame)
211199  */
212200 #define CAN_FRAME_MAX_DATA_LEN	8
....@@ -218,10 +206,6 @@
218206 #define MCP251X_OST_DELAY_MS	(5)
219207 
220208 #define DEVICE_NAME "mcp251x"
221
-
222
-static int mcp251x_enable_dma; /* Enable SPI DMA. Default: 0 (Off) */
223
-module_param(mcp251x_enable_dma, int, 0444);
224
-MODULE_PARM_DESC(mcp251x_enable_dma, "Enable SPI DMA. Default: 0 (Off)");
225209 
226210 static const struct can_bittiming_const mcp251x_bittiming_const = {
227211 	.name = DEVICE_NAME,
....@@ -251,8 +235,6 @@
251235 
252236 	u8 *spi_tx_buf;
253237 	u8 *spi_rx_buf;
254
-	dma_addr_t spi_tx_dma;
255
-	dma_addr_t spi_rx_dma;
256238 
257239 	struct sk_buff *tx_skb;
258240 	int tx_len;
....@@ -271,6 +253,10 @@
271253 	struct regulator *power;
272254 	struct regulator *transceiver;
273255 	struct clk *clk;
256
+#ifdef CONFIG_GPIOLIB
257
+	struct gpio_chip gpio;
258
+	u8 reg_bfpctrl;
259
+#endif
274260 };
275261 
276262 #define MCP251X_IS(_model) \
....@@ -288,16 +274,14 @@
288274 
289275 	if (priv->tx_skb || priv->tx_len)
290276 		net->stats.tx_errors++;
291
-	if (priv->tx_skb)
292
-		dev_kfree_skb(priv->tx_skb);
277
+	dev_kfree_skb(priv->tx_skb);
293278 	if (priv->tx_len)
294279 		can_free_echo_skb(priv->net, 0);
295280 	priv->tx_skb = NULL;
296281 	priv->tx_len = 0;
297282 }
298283 
299
-/*
300
- * Note about handling of error return of mcp251x_spi_trans: accessing
284
+/* Note about handling of error return of mcp251x_spi_trans: accessing
301285  * registers via SPI is not really different conceptually than using
302286  * normal I/O assembler instructions, although it's much more
303287  * complicated from a practical POV. So it's not advisable to always
....@@ -322,13 +306,6 @@
322306 	int ret;
323307 
324308 	spi_message_init(&m);
325
-
326
-	if (mcp251x_enable_dma) {
327
-		t.tx_dma = priv->spi_tx_dma;
328
-		t.rx_dma = priv->spi_rx_dma;
329
-		m.is_dma_mapped = 1;
330
-	}
331
-
332309 	spi_message_add_tail(&t, &m);
333310 
334311 	ret = spi_sync(spi, &m);
....@@ -337,7 +314,19 @@
337314 	return ret;
338315 }
339316 
340
-static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)
317
+static int mcp251x_spi_write(struct spi_device *spi, int len)
318
+{
319
+	struct mcp251x_priv *priv = spi_get_drvdata(spi);
320
+	int ret;
321
+
322
+	ret = spi_write(spi, priv->spi_tx_buf, len);
323
+	if (ret)
324
+		dev_err(&spi->dev, "spi write failed: ret = %d\n", ret);
325
+
326
+	return ret;
327
+}
328
+
329
+static u8 mcp251x_read_reg(struct spi_device *spi, u8 reg)
341330 {
342331 	struct mcp251x_priv *priv = spi_get_drvdata(spi);
343332 	u8 val = 0;
....@@ -345,27 +334,38 @@
345334 	priv->spi_tx_buf[0] = INSTRUCTION_READ;
346335 	priv->spi_tx_buf[1] = reg;
347336 
348
-	mcp251x_spi_trans(spi, 3);
349
-	val = priv->spi_rx_buf[2];
337
+	if (spi->controller->flags & SPI_CONTROLLER_HALF_DUPLEX) {
338
+		spi_write_then_read(spi, priv->spi_tx_buf, 2, &val, 1);
339
+	} else {
340
+		mcp251x_spi_trans(spi, 3);
341
+		val = priv->spi_rx_buf[2];
342
+	}
350343 
351344 	return val;
352345 }
353346 
354
-static void mcp251x_read_2regs(struct spi_device *spi, uint8_t reg,
355
-		uint8_t *v1, uint8_t *v2)
347
+static void mcp251x_read_2regs(struct spi_device *spi, u8 reg, u8 *v1, u8 *v2)
356348 {
357349 	struct mcp251x_priv *priv = spi_get_drvdata(spi);
358350 
359351 	priv->spi_tx_buf[0] = INSTRUCTION_READ;
360352 	priv->spi_tx_buf[1] = reg;
361353 
362
-	mcp251x_spi_trans(spi, 4);
354
+	if (spi->controller->flags & SPI_CONTROLLER_HALF_DUPLEX) {
355
+		u8 val[2] = { 0 };
363356 
364
-	*v1 = priv->spi_rx_buf[2];
365
-	*v2 = priv->spi_rx_buf[3];
357
+		spi_write_then_read(spi, priv->spi_tx_buf, 2, val, 2);
358
+		*v1 = val[0];
359
+		*v2 = val[1];
360
+	} else {
361
+		mcp251x_spi_trans(spi, 4);
362
+
363
+		*v1 = priv->spi_rx_buf[2];
364
+		*v2 = priv->spi_rx_buf[3];
365
+	}
366366 }
367367 
368
-static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)
368
+static void mcp251x_write_reg(struct spi_device *spi, u8 reg, u8 val)
369369 {
370370 	struct mcp251x_priv *priv = spi_get_drvdata(spi);
371371 
....@@ -373,11 +373,23 @@
373373 	priv->spi_tx_buf[1] = reg;
374374 	priv->spi_tx_buf[2] = val;
375375 
376
-	mcp251x_spi_trans(spi, 3);
376
+	mcp251x_spi_write(spi, 3);
377
+}
378
+
379
+static void mcp251x_write_2regs(struct spi_device *spi, u8 reg, u8 v1, u8 v2)
380
+{
381
+	struct mcp251x_priv *priv = spi_get_drvdata(spi);
382
+
383
+	priv->spi_tx_buf[0] = INSTRUCTION_WRITE;
384
+	priv->spi_tx_buf[1] = reg;
385
+	priv->spi_tx_buf[2] = v1;
386
+	priv->spi_tx_buf[3] = v2;
387
+
388
+	mcp251x_spi_write(spi, 4);
377389 }
378390 
379391 static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
380
-			       u8 mask, uint8_t val)
392
+			       u8 mask, u8 val)
381393 {
382394 	struct mcp251x_priv *priv = spi_get_drvdata(spi);
383395 
....@@ -386,8 +398,224 @@
386398 	priv->spi_tx_buf[2] = mask;
387399 	priv->spi_tx_buf[3] = val;
388400 
389
-	mcp251x_spi_trans(spi, 4);
401
+	mcp251x_spi_write(spi, 4);
390402 }
403
+
404
+static u8 mcp251x_read_stat(struct spi_device *spi)
405
+{
406
+	return mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK;
407
+}
408
+
409
+#define mcp251x_read_stat_poll_timeout(addr, val, cond, delay_us, timeout_us) \
410
+	readx_poll_timeout(mcp251x_read_stat, addr, val, cond, \
411
+			   delay_us, timeout_us)
412
+
413
+#ifdef CONFIG_GPIOLIB
414
+enum {
415
+	MCP251X_GPIO_TX0RTS = 0,		/* inputs */
416
+	MCP251X_GPIO_TX1RTS,
417
+	MCP251X_GPIO_TX2RTS,
418
+	MCP251X_GPIO_RX0BF,			/* outputs */
419
+	MCP251X_GPIO_RX1BF,
420
+};
421
+
422
+#define MCP251X_GPIO_INPUT_MASK \
423
+	GENMASK(MCP251X_GPIO_TX2RTS, MCP251X_GPIO_TX0RTS)
424
+#define MCP251X_GPIO_OUTPUT_MASK \
425
+	GENMASK(MCP251X_GPIO_RX1BF, MCP251X_GPIO_RX0BF)
426
+
427
+static const char * const mcp251x_gpio_names[] = {
428
+	[MCP251X_GPIO_TX0RTS] = "TX0RTS",	/* inputs */
429
+	[MCP251X_GPIO_TX1RTS] = "TX1RTS",
430
+	[MCP251X_GPIO_TX2RTS] = "TX2RTS",
431
+	[MCP251X_GPIO_RX0BF] = "RX0BF",		/* outputs */
432
+	[MCP251X_GPIO_RX1BF] = "RX1BF",
433
+};
434
+
435
+static inline bool mcp251x_gpio_is_input(unsigned int offset)
436
+{
437
+	return offset <= MCP251X_GPIO_TX2RTS;
438
+}
439
+
440
+static int mcp251x_gpio_request(struct gpio_chip *chip,
441
+				unsigned int offset)
442
+{
443
+	struct mcp251x_priv *priv = gpiochip_get_data(chip);
444
+	u8 val;
445
+
446
+	/* nothing to be done for inputs */
447
+	if (mcp251x_gpio_is_input(offset))
448
+		return 0;
449
+
450
+	val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);
451
+
452
+	mutex_lock(&priv->mcp_lock);
453
+	mcp251x_write_bits(priv->spi, BFPCTRL, val, val);
454
+	mutex_unlock(&priv->mcp_lock);
455
+
456
+	priv->reg_bfpctrl |= val;
457
+
458
+	return 0;
459
+}
460
+
461
+static void mcp251x_gpio_free(struct gpio_chip *chip,
462
+			      unsigned int offset)
463
+{
464
+	struct mcp251x_priv *priv = gpiochip_get_data(chip);
465
+	u8 val;
466
+
467
+	/* nothing to be done for inputs */
468
+	if (mcp251x_gpio_is_input(offset))
469
+		return;
470
+
471
+	val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);
472
+
473
+	mutex_lock(&priv->mcp_lock);
474
+	mcp251x_write_bits(priv->spi, BFPCTRL, val, 0);
475
+	mutex_unlock(&priv->mcp_lock);
476
+
477
+	priv->reg_bfpctrl &= ~val;
478
+}
479
+
480
+static int mcp251x_gpio_get_direction(struct gpio_chip *chip,
481
+				      unsigned int offset)
482
+{
483
+	if (mcp251x_gpio_is_input(offset))
484
+		return GPIOF_DIR_IN;
485
+
486
+	return GPIOF_DIR_OUT;
487
+}
488
+
489
+static int mcp251x_gpio_get(struct gpio_chip *chip, unsigned int offset)
490
+{
491
+	struct mcp251x_priv *priv = gpiochip_get_data(chip);
492
+	u8 reg, mask, val;
493
+
494
+	if (mcp251x_gpio_is_input(offset)) {
495
+		reg = TXRTSCTRL;
496
+		mask = TXRTSCTRL_RTS(offset);
497
+	} else {
498
+		reg = BFPCTRL;
499
+		mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);
500
+	}
501
+
502
+	mutex_lock(&priv->mcp_lock);
503
+	val = mcp251x_read_reg(priv->spi, reg);
504
+	mutex_unlock(&priv->mcp_lock);
505
+
506
+	return !!(val & mask);
507
+}
508
+
509
+static int mcp251x_gpio_get_multiple(struct gpio_chip *chip,
510
+				     unsigned long *maskp, unsigned long *bitsp)
511
+{
512
+	struct mcp251x_priv *priv = gpiochip_get_data(chip);
513
+	unsigned long bits = 0;
514
+	u8 val;
515
+
516
+	mutex_lock(&priv->mcp_lock);
517
+	if (maskp[0] & MCP251X_GPIO_INPUT_MASK) {
518
+		val = mcp251x_read_reg(priv->spi, TXRTSCTRL);
519
+		val = FIELD_GET(TXRTSCTRL_RTS_MASK, val);
520
+		bits |= FIELD_PREP(MCP251X_GPIO_INPUT_MASK, val);
521
+	}
522
+	if (maskp[0] & MCP251X_GPIO_OUTPUT_MASK) {
523
+		val = mcp251x_read_reg(priv->spi, BFPCTRL);
524
+		val = FIELD_GET(BFPCTRL_BFS_MASK, val);
525
+		bits |= FIELD_PREP(MCP251X_GPIO_OUTPUT_MASK, val);
526
+	}
527
+	mutex_unlock(&priv->mcp_lock);
528
+
529
+	bitsp[0] = bits;
530
+	return 0;
531
+}
532
+
533
+static void mcp251x_gpio_set(struct gpio_chip *chip, unsigned int offset,
534
+			     int value)
535
+{
536
+	struct mcp251x_priv *priv = gpiochip_get_data(chip);
537
+	u8 mask, val;
538
+
539
+	mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);
540
+	val = value ? mask : 0;
541
+
542
+	mutex_lock(&priv->mcp_lock);
543
+	mcp251x_write_bits(priv->spi, BFPCTRL, mask, val);
544
+	mutex_unlock(&priv->mcp_lock);
545
+
546
+	priv->reg_bfpctrl &= ~mask;
547
+	priv->reg_bfpctrl |= val;
548
+}
549
+
550
+static void
551
+mcp251x_gpio_set_multiple(struct gpio_chip *chip,
552
+			  unsigned long *maskp, unsigned long *bitsp)
553
+{
554
+	struct mcp251x_priv *priv = gpiochip_get_data(chip);
555
+	u8 mask, val;
556
+
557
+	mask = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, maskp[0]);
558
+	mask = FIELD_PREP(BFPCTRL_BFS_MASK, mask);
559
+
560
+	val = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, bitsp[0]);
561
+	val = FIELD_PREP(BFPCTRL_BFS_MASK, val);
562
+
563
+	if (!mask)
564
+		return;
565
+
566
+	mutex_lock(&priv->mcp_lock);
567
+	mcp251x_write_bits(priv->spi, BFPCTRL, mask, val);
568
+	mutex_unlock(&priv->mcp_lock);
569
+
570
+	priv->reg_bfpctrl &= ~mask;
571
+	priv->reg_bfpctrl |= val;
572
+}
573
+
574
+static void mcp251x_gpio_restore(struct spi_device *spi)
575
+{
576
+	struct mcp251x_priv *priv = spi_get_drvdata(spi);
577
+
578
+	mcp251x_write_reg(spi, BFPCTRL, priv->reg_bfpctrl);
579
+}
580
+
581
+static int mcp251x_gpio_setup(struct mcp251x_priv *priv)
582
+{
583
+	struct gpio_chip *gpio = &priv->gpio;
584
+
585
+	if (!device_property_present(&priv->spi->dev, "gpio-controller"))
586
+		return 0;
587
+
588
+	/* gpiochip handles TX[0..2]RTS and RX[0..1]BF */
589
+	gpio->label = priv->spi->modalias;
590
+	gpio->parent = &priv->spi->dev;
591
+	gpio->owner = THIS_MODULE;
592
+	gpio->request = mcp251x_gpio_request;
593
+	gpio->free = mcp251x_gpio_free;
594
+	gpio->get_direction = mcp251x_gpio_get_direction;
595
+	gpio->get = mcp251x_gpio_get;
596
+	gpio->get_multiple = mcp251x_gpio_get_multiple;
597
+	gpio->set = mcp251x_gpio_set;
598
+	gpio->set_multiple = mcp251x_gpio_set_multiple;
599
+	gpio->base = -1;
600
+	gpio->ngpio = ARRAY_SIZE(mcp251x_gpio_names);
601
+	gpio->names = mcp251x_gpio_names;
602
+	gpio->can_sleep = true;
603
+#ifdef CONFIG_OF_GPIO
604
+	gpio->of_node = priv->spi->dev.of_node;
605
+#endif
606
+
607
+	return devm_gpiochip_add_data(&priv->spi->dev, gpio, priv);
608
+}
609
+#else
610
+static inline void mcp251x_gpio_restore(struct spi_device *spi)
611
+{
612
+}
613
+
614
+static inline int mcp251x_gpio_setup(struct mcp251x_priv *priv)
615
+{
616
+	return 0;
617
+}
618
+#endif
391619 
392620 static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,
393621 				int len, int tx_buf_idx)
....@@ -402,7 +630,7 @@
402630 					  buf[i]);
403631 	} else {
404632 		memcpy(priv->spi_tx_buf, buf, TXBDAT_OFF + len);
405
-		mcp251x_spi_trans(spi, TXBDAT_OFF + len);
633
+		mcp251x_spi_write(spi, TXBDAT_OFF + len);
406634 	}
407635 }
408636 
....@@ -434,7 +662,7 @@
434662 
435663 	/* use INSTRUCTION_RTS, to avoid "repeated frame problem" */
436664 	priv->spi_tx_buf[0] = INSTRUCTION_RTS(1 << tx_buf_idx);
437
-	mcp251x_spi_trans(priv->spi, 1);
665
+	mcp251x_spi_write(priv->spi, 1);
438666 }
439667 
440668 static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,
....@@ -453,8 +681,16 @@
453681 			buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
454682 	} else {
455683 		priv->spi_tx_buf[RXBCTRL_OFF] = INSTRUCTION_READ_RXB(buf_idx);
456
-		mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);
457
-		memcpy(buf, priv->spi_rx_buf, SPI_TRANSFER_BUF_LEN);
684
+		if (spi->controller->flags & SPI_CONTROLLER_HALF_DUPLEX) {
685
+			spi_write_then_read(spi, priv->spi_tx_buf, 1,
686
+					    priv->spi_rx_buf,
687
+					    SPI_TRANSFER_BUF_LEN);
688
+			memcpy(buf + 1, priv->spi_rx_buf,
689
+			       SPI_TRANSFER_BUF_LEN - 1);
690
+		} else {
691
+			mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);
692
+			memcpy(buf, priv->spi_rx_buf, SPI_TRANSFER_BUF_LEN);
693
+		}
458694 	}
459695 }
460696 
....@@ -512,6 +748,38 @@
512748 	mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_SLEEP);
513749 }
514750 
751
+/* May only be called when device is sleeping! */
752
+static int mcp251x_hw_wake(struct spi_device *spi)
753
+{
754
+	u8 value;
755
+	int ret;
756
+
757
+	/* Force wakeup interrupt to wake device, but don't execute IST */
758
+	disable_irq(spi->irq);
759
+	mcp251x_write_2regs(spi, CANINTE, CANINTE_WAKIE, CANINTF_WAKIF);
760
+
761
+	/* Wait for oscillator startup timer after wake up */
762
+	mdelay(MCP251X_OST_DELAY_MS);
763
+
764
+	/* Put device into config mode */
765
+	mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_CONF);
766
+
767
+	/* Wait for the device to enter config mode */
768
+	ret = mcp251x_read_stat_poll_timeout(spi, value, value == CANCTRL_REQOP_CONF,
769
+					     MCP251X_OST_DELAY_MS * 1000,
770
+					     USEC_PER_SEC);
771
+	if (ret) {
772
+		dev_err(&spi->dev, "MCP251x didn't enter in config mode\n");
773
+		return ret;
774
+	}
775
+
776
+	/* Disable and clear pending interrupts */
777
+	mcp251x_write_2regs(spi, CANINTE, 0x00, 0x00);
778
+	enable_irq(spi->irq);
779
+
780
+	return 0;
781
+}
782
+
515783 static netdev_tx_t mcp251x_hard_start_xmit(struct sk_buff *skb,
516784 					   struct net_device *net)
517785 {
....@@ -557,7 +825,8 @@
557825 static int mcp251x_set_normal_mode(struct spi_device *spi)
558826 {
559827 	struct mcp251x_priv *priv = spi_get_drvdata(spi);
560
-	unsigned long timeout;
828
+	u8 value;
829
+	int ret;
561830 
562831 	/* Enable interrupts */
563832 	mcp251x_write_reg(spi, CANINTE,
....@@ -575,14 +844,12 @@
575844 		mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
576845 
577846 		/* Wait for the device to enter normal mode */
578
-		timeout = jiffies + HZ;
579
-		while (mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK) {
580
-			schedule();
581
-			if (time_after(jiffies, timeout)) {
582
-				dev_err(&spi->dev, "MCP251x didn't"
583
-					" enter in normal mode\n");
584
-				return -EBUSY;
585
-			}
847
+		ret = mcp251x_read_stat_poll_timeout(spi, value, value == 0,
848
+						     MCP251X_OST_DELAY_MS * 1000,
849
+						     USEC_PER_SEC);
850
+		if (ret) {
851
+			dev_err(&spi->dev, "MCP251x didn't enter in normal mode\n");
852
+			return ret;
586853 		}
587854 	}
588855 	priv->can.state = CAN_STATE_ERROR_ACTIVE;
....@@ -626,14 +893,14 @@
626893 static int mcp251x_hw_reset(struct spi_device *spi)
627894 {
628895 	struct mcp251x_priv *priv = spi_get_drvdata(spi);
629
-	unsigned long timeout;
896
+	u8 value;
630897 	int ret;
631898 
632899 	/* Wait for oscillator startup timer after power up */
633900 	mdelay(MCP251X_OST_DELAY_MS);
634901 
635902 	priv->spi_tx_buf[0] = INSTRUCTION_RESET;
636
-	ret = mcp251x_spi_trans(spi, 1);
903
+	ret = mcp251x_spi_write(spi, 1);
637904 	if (ret)
638905 		return ret;
639906 
....@@ -641,19 +908,12 @@
641908 	mdelay(MCP251X_OST_DELAY_MS);
642909 
643910 	/* Wait for reset to finish */
644
-	timeout = jiffies + HZ;
645
-	while ((mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK) !=
646
-	       CANCTRL_REQOP_CONF) {
647
-		usleep_range(MCP251X_OST_DELAY_MS * 1000,
648
-			     MCP251X_OST_DELAY_MS * 1000 * 2);
649
-
650
-		if (time_after(jiffies, timeout)) {
651
-			dev_err(&spi->dev,
652
-				"MCP251x didn't enter in conf mode after reset\n");
653
-			return -EBUSY;
654
-		}
655
-	}
656
-	return 0;
911
+	ret = mcp251x_read_stat_poll_timeout(spi, value, value == CANCTRL_REQOP_CONF,
912
+					     MCP251X_OST_DELAY_MS * 1000,
913
+					     USEC_PER_SEC);
914
+	if (ret)
915
+		dev_err(&spi->dev, "MCP251x didn't enter in conf mode after reset\n");
916
+	return ret;
657917 }
658918 
659919 static int mcp251x_hw_probe(struct spi_device *spi)
....@@ -696,14 +956,11 @@
696956 
697957 	priv->force_quit = 1;
698958 	free_irq(spi->irq, priv);
699
-	destroy_workqueue(priv->wq);
700
-	priv->wq = NULL;
701959 
702960 	mutex_lock(&priv->mcp_lock);
703961 
704962 	/* Disable and clear pending interrupts */
705
-	mcp251x_write_reg(spi, CANINTE, 0x00);
706
-	mcp251x_write_reg(spi, CANINTF, 0x00);
963
+	mcp251x_write_2regs(spi, CANINTE, 0x00, 0x00);
707964 
708965 	mcp251x_write_reg(spi, TXBCTRL(0), 0);
709966 	mcp251x_clean(net);
....@@ -771,8 +1028,13 @@
7711028 
7721029 	mutex_lock(&priv->mcp_lock);
7731030 	if (priv->after_suspend) {
774
-		mcp251x_hw_reset(spi);
775
-		mcp251x_setup(net, spi);
1031
+		if (priv->after_suspend & AFTER_SUSPEND_POWER) {
1032
+			mcp251x_hw_reset(spi);
1033
+			mcp251x_setup(net, spi);
1034
+			mcp251x_gpio_restore(spi);
1035
+		} else {
1036
+			mcp251x_hw_wake(spi);
1037
+		}
7761038 		priv->force_quit = 0;
7771039 		if (priv->after_suspend & AFTER_SUSPEND_RESTART) {
7781040 			mcp251x_set_normal_mode(spi);
....@@ -812,9 +1074,6 @@
8121074 
8131075 		mcp251x_read_2regs(spi, CANINTF, &intf, &eflag);
8141076 
815
-		/* mask out flags we don't care about */
816
-		intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
817
-
8181077 		/* receive buffer 0 */
8191078 		if (intf & CANINTF_RX0IF) {
8201079 			mcp251x_hw_rx(spi, 0);
....@@ -822,7 +1081,20 @@
8221081 			 * (The MCP2515/25625 does this automatically.)
8231082 			 */
8241083 			if (mcp251x_is_2510(spi))
825
-				mcp251x_write_bits(spi, CANINTF, CANINTF_RX0IF, 0x00);
1084
+				mcp251x_write_bits(spi, CANINTF,
1085
+						   CANINTF_RX0IF, 0x00);
1086
+
1087
+			/* check if buffer 1 is already known to be full, no need to re-read */
1088
+			if (!(intf & CANINTF_RX1IF)) {
1089
+				u8 intf1, eflag1;
1090
+
1091
+				/* intf needs to be read again to avoid a race condition */
1092
+				mcp251x_read_2regs(spi, CANINTF, &intf1, &eflag1);
1093
+
1094
+				/* combine flags from both operations for error handling */
1095
+				intf |= intf1;
1096
+				eflag |= eflag1;
1097
+			}
8261098 		}
8271099 
8281100 		/* receive buffer 1 */
....@@ -832,6 +1104,9 @@
8321104 			if (mcp251x_is_2510(spi))
8331105 				clear_intf |= CANINTF_RX1IF;
8341106 		}
1107
+
1108
+		/* mask out flags we don't care about */
1109
+		intf &= CANINTF_RX | CANINTF_TX | CANINTF_ERR;
8351110 
8361111 		/* any error or tx interrupt we need to clear? */
8371112 		if (intf & (CANINTF_ERR | CANINTF_TX))
....@@ -872,7 +1147,8 @@
8721147 			if (new_state >= CAN_STATE_ERROR_WARNING &&
8731148 			    new_state <= CAN_STATE_BUS_OFF)
8741149 				priv->can.can_stats.error_warning++;
875
-		case CAN_STATE_ERROR_WARNING:	/* fallthrough */
1150
+			fallthrough;
1151
+		case CAN_STATE_ERROR_WARNING:
8761152 			if (new_state >= CAN_STATE_ERROR_PASSIVE &&
8771153 			    new_state <= CAN_STATE_BUS_OFF)
8781154 				priv->can.can_stats.error_passive++;
....@@ -922,7 +1198,6 @@
9221198 			}
9231199 			netif_wake_queue(net);
9241200 		}
925
-
9261201 	}
9271202 	mutex_unlock(&priv->mcp_lock);
9281203 	return IRQ_HANDLED;
....@@ -932,7 +1207,7 @@
9321207 {
9331208 	struct mcp251x_priv *priv = netdev_priv(net);
9341209 	struct spi_device *spi = priv->spi;
935
-	unsigned long flags = IRQF_ONESHOT | IRQF_TRIGGER_FALLING;
1210
+	unsigned long flags = 0;
9361211 	int ret;
9371212 
9381213 	ret = open_candev(net);
....@@ -948,31 +1223,26 @@
9481223 	priv->tx_skb = NULL;
9491224 	priv->tx_len = 0;
9501225 
1226
+	if (!dev_fwnode(&spi->dev))
1227
+		flags = IRQF_TRIGGER_FALLING;
1228
+
9511229 	ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist,
952
-				   flags | IRQF_ONESHOT, DEVICE_NAME, priv);
1230
+				   flags | IRQF_ONESHOT, dev_name(&spi->dev),
1231
+				   priv);
9531232 	if (ret) {
9541233 		dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
9551234 		goto out_close;
9561235 	}
9571236 
958
-	priv->wq = alloc_workqueue("mcp251x_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM,
959
-				   0);
960
-	if (!priv->wq) {
961
-		ret = -ENOMEM;
962
-		goto out_clean;
963
-	}
964
-	INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
965
-	INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler);
966
-
967
-	ret = mcp251x_hw_reset(spi);
1237
+	ret = mcp251x_hw_wake(spi);
9681238 	if (ret)
969
-		goto out_free_wq;
1239
+		goto out_free_irq;
9701240 	ret = mcp251x_setup(net, spi);
9711241 	if (ret)
972
-		goto out_free_wq;
1242
+		goto out_free_irq;
9731243 	ret = mcp251x_set_normal_mode(spi);
9741244 	if (ret)
975
-		goto out_free_wq;
1245
+		goto out_free_irq;
9761246 
9771247 	can_led_event(net, CAN_LED_EVENT_OPEN);
9781248 
....@@ -981,9 +1251,7 @@
9811251 
9821252 	return 0;
9831253 
984
-out_free_wq:
985
-	destroy_workqueue(priv->wq);
986
-out_clean:
1254
+out_free_irq:
9871255 	free_irq(spi->irq, priv);
9881256 	mcp251x_hw_sleep(spi);
9891257 out_close:
....@@ -1036,23 +1304,20 @@
10361304 
10371305 static int mcp251x_can_probe(struct spi_device *spi)
10381306 {
1039
-	const struct of_device_id *of_id = of_match_device(mcp251x_of_match,
1040
-							   &spi->dev);
1041
-	struct mcp251x_platform_data *pdata = dev_get_platdata(&spi->dev);
1307
+	const void *match = device_get_match_data(&spi->dev);
10421308 	struct net_device *net;
10431309 	struct mcp251x_priv *priv;
10441310 	struct clk *clk;
1045
-	int freq, ret;
1311
+	u32 freq;
1312
+	int ret;
10461313 
1047
-	clk = devm_clk_get(&spi->dev, NULL);
1048
-	if (IS_ERR(clk)) {
1049
-		if (pdata)
1050
-			freq = pdata->oscillator_frequency;
1051
-		else
1052
-			return PTR_ERR(clk);
1053
-	} else {
1054
-		freq = clk_get_rate(clk);
1055
-	}
1314
+	clk = devm_clk_get_optional(&spi->dev, NULL);
1315
+	if (IS_ERR(clk))
1316
+		return PTR_ERR(clk);
1317
+
1318
+	freq = clk_get_rate(clk);
1319
+	if (freq == 0)
1320
+		device_property_read_u32(&spi->dev, "clock-frequency", &freq);
10561321 
10571322 	/* Sanity check */
10581323 	if (freq < 1000000 || freq > 25000000)
....@@ -1063,11 +1328,9 @@
10631328 	if (!net)
10641329 		return -ENOMEM;
10651330 
1066
-	if (!IS_ERR(clk)) {
1067
-		ret = clk_prepare_enable(clk);
1068
-		if (ret)
1069
-			goto out_free;
1070
-	}
1331
+	ret = clk_prepare_enable(clk);
1332
+	if (ret)
1333
+		goto out_free;
10711334 
10721335 	net->netdev_ops = &mcp251x_netdev_ops;
10731336 	net->flags |= IFF_ECHO;
....@@ -1078,8 +1341,8 @@
10781341 	priv->can.clock.freq = freq / 2;
10791342 	priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
10801343 		CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY;
1081
-	if (of_id)
1082
-		priv->model = (enum mcp251x_model)of_id->data;
1344
+	if (match)
1345
+		priv->model = (enum mcp251x_model)match;
10831346 	else
10841347 		priv->model = spi_get_device_id(spi)->driver_data;
10851348 	priv->net = net;
....@@ -1109,46 +1372,30 @@
11091372 	if (ret)
11101373 		goto out_clk;
11111374 
1375
+	priv->wq = alloc_workqueue("mcp251x_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM,
1376
+				   0);
1377
+	if (!priv->wq) {
1378
+		ret = -ENOMEM;
1379
+		goto out_clk;
1380
+	}
1381
+	INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
1382
+	INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler);
1383
+
11121384 	priv->spi = spi;
11131385 	mutex_init(&priv->mcp_lock);
11141386 
1115
-	/* If requested, allocate DMA buffers */
1116
-	if (mcp251x_enable_dma) {
1117
-		spi->dev.coherent_dma_mask = ~0;
1118
-
1119
-		/*
1120
-		 * Minimum coherent DMA allocation is PAGE_SIZE, so allocate
1121
-		 * that much and share it between Tx and Rx DMA buffers.
1122
-		 */
1123
-		priv->spi_tx_buf = dmam_alloc_coherent(&spi->dev,
1124
-						       PAGE_SIZE,
1125
-						       &priv->spi_tx_dma,
1126
-						       GFP_DMA);
1127
-
1128
-		if (priv->spi_tx_buf) {
1129
-			priv->spi_rx_buf = (priv->spi_tx_buf + (PAGE_SIZE / 2));
1130
-			priv->spi_rx_dma = (dma_addr_t)(priv->spi_tx_dma +
1131
-							(PAGE_SIZE / 2));
1132
-		} else {
1133
-			/* Fall back to non-DMA */
1134
-			mcp251x_enable_dma = 0;
1135
-		}
1387
+	priv->spi_tx_buf = devm_kzalloc(&spi->dev, SPI_TRANSFER_BUF_LEN,
1388
+					GFP_KERNEL);
1389
+	if (!priv->spi_tx_buf) {
1390
+		ret = -ENOMEM;
1391
+		goto error_probe;
11361392 	}
11371393 
1138
-	/* Allocate non-DMA buffers */
1139
-	if (!mcp251x_enable_dma) {
1140
-		priv->spi_tx_buf = devm_kzalloc(&spi->dev, SPI_TRANSFER_BUF_LEN,
1141
-						GFP_KERNEL);
1142
-		if (!priv->spi_tx_buf) {
1143
-			ret = -ENOMEM;
1144
-			goto error_probe;
1145
-		}
1146
-		priv->spi_rx_buf = devm_kzalloc(&spi->dev, SPI_TRANSFER_BUF_LEN,
1147
-						GFP_KERNEL);
1148
-		if (!priv->spi_rx_buf) {
1149
-			ret = -ENOMEM;
1150
-			goto error_probe;
1151
-		}
1394
+	priv->spi_rx_buf = devm_kzalloc(&spi->dev, SPI_TRANSFER_BUF_LEN,
1395
+					GFP_KERNEL);
1396
+	if (!priv->spi_rx_buf) {
1397
+		ret = -ENOMEM;
1398
+		goto error_probe;
11521399 	}
11531400 
11541401 	SET_NETDEV_DEV(net, &spi->dev);
....@@ -1157,7 +1404,8 @@
11571404 	ret = mcp251x_hw_probe(spi);
11581405 	if (ret) {
11591406 		if (ret == -ENODEV)
1160
-			dev_err(&spi->dev, "Cannot initialize MCP%x. Wrong wiring?\n", priv->model);
1407
+			dev_err(&spi->dev, "Cannot initialize MCP%x. Wrong wiring?\n",
1408
+				priv->model);
11611409 		goto error_probe;
11621410 	}
11631411 
....@@ -1169,15 +1417,23 @@
11691417 
11701418 	devm_can_led_init(net);
11711419 
1420
+	ret = mcp251x_gpio_setup(priv);
1421
+	if (ret)
1422
+		goto out_unregister_candev;
1423
+
11721424 	netdev_info(net, "MCP%x successfully initialized.\n", priv->model);
11731425 	return 0;
11741426 
1427
+out_unregister_candev:
1428
+	unregister_candev(net);
1429
+
11751430 error_probe:
1431
+	destroy_workqueue(priv->wq);
1432
+	priv->wq = NULL;
11761433 	mcp251x_power_enable(priv->power, 0);
11771434 
11781435 out_clk:
1179
-	if (!IS_ERR(clk))
1180
-		clk_disable_unprepare(clk);
1436
+	clk_disable_unprepare(clk);
11811437 
11821438 out_free:
11831439 	free_candev(net);
....@@ -1195,8 +1451,10 @@
11951451 
11961452 	mcp251x_power_enable(priv->power, 0);
11971453 
1198
-	if (!IS_ERR(priv->clk))
1199
-		clk_disable_unprepare(priv->clk);
1454
+	destroy_workqueue(priv->wq);
1455
+	priv->wq = NULL;
1456
+
1457
+	clk_disable_unprepare(priv->clk);
12001458 
12011459 	free_candev(net);
12021460 
....@@ -1211,8 +1469,7 @@
12111469 
12121470 	priv->force_quit = 1;
12131471 	disable_irq(spi->irq);
1214
-	/*
1215
-	 * Note: at this point neither IST nor workqueues are running.
1472
+	/* Note: at this point neither IST nor workqueues are running.
12161473 	 * open/stop cannot be called anyway so locking is not needed
12171474 	 */
12181475 	if (netif_running(net)) {
....@@ -1225,10 +1482,8 @@
12251482 		priv->after_suspend = AFTER_SUSPEND_DOWN;
12261483 	}
12271484 
1228
-	if (!IS_ERR_OR_NULL(priv->power)) {
1229
-		regulator_disable(priv->power);
1230
-		priv->after_suspend |= AFTER_SUSPEND_POWER;
1231
-	}
1485
+	mcp251x_power_enable(priv->power, 0);
1486
+	priv->after_suspend |= AFTER_SUSPEND_POWER;
12321487 
12331488 	return 0;
12341489 }
....@@ -1240,13 +1495,13 @@
12401495 
12411496 	if (priv->after_suspend & AFTER_SUSPEND_POWER)
12421497 		mcp251x_power_enable(priv->power, 1);
1243
-
1244
-	if (priv->after_suspend & AFTER_SUSPEND_UP) {
1498
+	if (priv->after_suspend & AFTER_SUSPEND_UP)
12451499 		mcp251x_power_enable(priv->transceiver, 1);
1500
+
1501
+	if (priv->after_suspend & (AFTER_SUSPEND_POWER | AFTER_SUSPEND_UP))
12461502 		queue_work(priv->wq, &priv->restart_work);
1247
-	} else {
1503
+	else
12481504 		priv->after_suspend = 0;
1249
-	}
12501505 
12511506 	priv->force_quit = 0;
12521507 	enable_irq(spi->irq);