.. | .. |
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1 | | -/* |
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2 | | - This file is provided under a dual BSD/GPLv2 license. When using or |
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3 | | - redistributing this file, you may do so under either license. |
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4 | | - |
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5 | | - GPL LICENSE SUMMARY |
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6 | | - Copyright(c) 2014 Intel Corporation. |
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7 | | - This program is free software; you can redistribute it and/or modify |
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8 | | - it under the terms of version 2 of the GNU General Public License as |
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9 | | - published by the Free Software Foundation. |
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10 | | - |
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11 | | - This program is distributed in the hope that it will be useful, but |
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12 | | - WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | | - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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14 | | - General Public License for more details. |
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15 | | - |
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16 | | - Contact Information: |
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17 | | - qat-linux@intel.com |
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18 | | - |
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19 | | - BSD LICENSE |
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20 | | - Copyright(c) 2014 Intel Corporation. |
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21 | | - Redistribution and use in source and binary forms, with or without |
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22 | | - modification, are permitted provided that the following conditions |
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23 | | - are met: |
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24 | | - |
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25 | | - * Redistributions of source code must retain the above copyright |
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26 | | - notice, this list of conditions and the following disclaimer. |
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27 | | - * Redistributions in binary form must reproduce the above copyright |
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28 | | - notice, this list of conditions and the following disclaimer in |
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29 | | - the documentation and/or other materials provided with the |
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30 | | - distribution. |
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31 | | - * Neither the name of Intel Corporation nor the names of its |
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32 | | - contributors may be used to endorse or promote products derived |
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33 | | - from this software without specific prior written permission. |
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34 | | - |
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35 | | - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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36 | | - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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37 | | - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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38 | | - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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39 | | - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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40 | | - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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41 | | - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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42 | | - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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43 | | - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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44 | | - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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45 | | - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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46 | | -*/ |
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| 1 | +// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) |
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| 2 | +/* Copyright(c) 2014 - 2020 Intel Corporation */ |
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47 | 3 | #include <adf_accel_devices.h> |
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48 | 4 | #include <adf_pf2vf_msg.h> |
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49 | 5 | #include <adf_common_drv.h> |
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50 | 6 | #include "adf_dh895xcc_hw_data.h" |
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51 | 7 | |
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52 | 8 | /* Worker thread to service arbiter mappings based on dev SKUs */ |
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53 | | -static const uint32_t thrd_to_arb_map_sku4[] = { |
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| 9 | +static const u32 thrd_to_arb_map_sku4[] = { |
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54 | 10 | 0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666, |
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55 | 11 | 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222, |
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56 | 12 | 0x00000000, 0x00000000, 0x00000000, 0x00000000 |
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57 | 13 | }; |
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58 | 14 | |
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59 | | -static const uint32_t thrd_to_arb_map_sku6[] = { |
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| 15 | +static const u32 thrd_to_arb_map_sku6[] = { |
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60 | 16 | 0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666, |
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61 | 17 | 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222, |
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62 | 18 | 0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222 |
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.. | .. |
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68 | 24 | .instances = 0 |
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69 | 25 | }; |
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70 | 26 | |
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71 | | -static uint32_t get_accel_mask(uint32_t fuse) |
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| 27 | +static u32 get_accel_mask(u32 fuse) |
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72 | 28 | { |
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73 | 29 | return (~fuse) >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & |
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74 | 30 | ADF_DH895XCC_ACCELERATORS_MASK; |
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75 | 31 | } |
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76 | 32 | |
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77 | | -static uint32_t get_ae_mask(uint32_t fuse) |
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| 33 | +static u32 get_ae_mask(u32 fuse) |
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78 | 34 | { |
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79 | 35 | return (~fuse) & ADF_DH895XCC_ACCELENGINES_MASK; |
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80 | 36 | } |
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81 | 37 | |
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82 | | -static uint32_t get_num_accels(struct adf_hw_device_data *self) |
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| 38 | +static u32 get_num_accels(struct adf_hw_device_data *self) |
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83 | 39 | { |
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84 | | - uint32_t i, ctr = 0; |
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| 40 | + u32 i, ctr = 0; |
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85 | 41 | |
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86 | 42 | if (!self || !self->accel_mask) |
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87 | 43 | return 0; |
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.. | .. |
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93 | 49 | return ctr; |
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94 | 50 | } |
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95 | 51 | |
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96 | | -static uint32_t get_num_aes(struct adf_hw_device_data *self) |
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| 52 | +static u32 get_num_aes(struct adf_hw_device_data *self) |
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97 | 53 | { |
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98 | | - uint32_t i, ctr = 0; |
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| 54 | + u32 i, ctr = 0; |
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99 | 55 | |
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100 | 56 | if (!self || !self->ae_mask) |
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101 | 57 | return 0; |
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.. | .. |
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107 | 63 | return ctr; |
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108 | 64 | } |
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109 | 65 | |
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110 | | -static uint32_t get_misc_bar_id(struct adf_hw_device_data *self) |
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| 66 | +static u32 get_misc_bar_id(struct adf_hw_device_data *self) |
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111 | 67 | { |
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112 | 68 | return ADF_DH895XCC_PMISC_BAR; |
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113 | 69 | } |
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114 | 70 | |
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115 | | -static uint32_t get_etr_bar_id(struct adf_hw_device_data *self) |
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| 71 | +static u32 get_etr_bar_id(struct adf_hw_device_data *self) |
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116 | 72 | { |
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117 | 73 | return ADF_DH895XCC_ETR_BAR; |
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118 | 74 | } |
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119 | 75 | |
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120 | | -static uint32_t get_sram_bar_id(struct adf_hw_device_data *self) |
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| 76 | +static u32 get_sram_bar_id(struct adf_hw_device_data *self) |
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121 | 77 | { |
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122 | 78 | return ADF_DH895XCC_SRAM_BAR; |
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123 | 79 | } |
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.. | .. |
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161 | 117 | } |
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162 | 118 | } |
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163 | 119 | |
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164 | | -static uint32_t get_pf2vf_offset(uint32_t i) |
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| 120 | +static u32 get_pf2vf_offset(u32 i) |
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165 | 121 | { |
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166 | 122 | return ADF_DH895XCC_PF2VF_OFFSET(i); |
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167 | 123 | } |
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168 | 124 | |
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169 | | -static uint32_t get_vintmsk_offset(uint32_t i) |
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| 125 | +static u32 get_vintmsk_offset(u32 i) |
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170 | 126 | { |
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171 | 127 | return ADF_DH895XCC_VINTMSK_OFFSET(i); |
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172 | 128 | } |
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