.. | .. |
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4 | 4 | * Private/internal definitions between modules |
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5 | 5 | * |
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6 | 6 | * Copyright 2008-2011 Freescale Semiconductor, Inc. |
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7 | | - * |
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| 7 | + * Copyright 2019 NXP |
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8 | 8 | */ |
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9 | 9 | |
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10 | 10 | #ifndef INTERN_H |
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11 | 11 | #define INTERN_H |
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| 12 | + |
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| 13 | +#include "ctrl.h" |
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| 14 | +#include <crypto/engine.h> |
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12 | 15 | |
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13 | 16 | /* Currently comes from Kconfig param as a ^2 (driver-required) */ |
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14 | 17 | #define JOBR_DEPTH (1 << CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE) |
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.. | .. |
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44 | 47 | struct caam_job_ring __iomem *rregs; /* JobR's register space */ |
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45 | 48 | struct tasklet_struct irqtask; |
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46 | 49 | int irq; /* One per queue */ |
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| 50 | + bool hwrng; |
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47 | 51 | |
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48 | 52 | /* Number of scatterlist crypt transforms active on the JobR */ |
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49 | 53 | atomic_t tfm_count ____cacheline_aligned; |
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50 | 54 | |
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51 | 55 | /* Job ring info */ |
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52 | | - int ringsize; /* Size of rings (assume input = output) */ |
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53 | 56 | struct caam_jrentry_info *entinfo; /* Alloc'ed 1 per ring entry */ |
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54 | 57 | spinlock_t inplock ____cacheline_aligned; /* Input ring index lock */ |
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55 | | - int inp_ring_write_index; /* Input index "tail" */ |
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| 58 | + u32 inpring_avail; /* Number of free entries in input ring */ |
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56 | 59 | int head; /* entinfo (s/w ring) head index */ |
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57 | | - dma_addr_t *inpring; /* Base of input ring, alloc DMA-safe */ |
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58 | | - spinlock_t outlock ____cacheline_aligned; /* Output ring index lock */ |
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| 60 | + void *inpring; /* Base of input ring, alloc |
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| 61 | + * DMA-safe */ |
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59 | 62 | int out_ring_read_index; /* Output index "tail" */ |
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60 | 63 | int tail; /* entinfo (s/w ring) tail index */ |
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61 | | - struct jr_outentry *outring; /* Base of output ring, DMA-safe */ |
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| 64 | + void *outring; /* Base of output ring, DMA-safe */ |
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| 65 | + struct crypto_engine *engine; |
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62 | 66 | }; |
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63 | 67 | |
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64 | 68 | /* |
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65 | 69 | * Driver-private storage for a single CAAM block instance |
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66 | 70 | */ |
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67 | 71 | struct caam_drv_private { |
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68 | | -#ifdef CONFIG_CAAM_QI |
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69 | | - struct device *qidev; |
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70 | | -#endif |
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71 | | - |
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72 | 72 | /* Physical-presence section */ |
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73 | 73 | struct caam_ctrl __iomem *ctrl; /* controller region */ |
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74 | 74 | struct caam_deco __iomem *deco; /* DECO/CCB views */ |
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75 | 75 | struct caam_assurance __iomem *assure; |
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76 | 76 | struct caam_queue_if __iomem *qi; /* QI control region */ |
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77 | 77 | struct caam_job_ring __iomem *jr[4]; /* JobR's register space */ |
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| 78 | + |
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| 79 | + struct iommu_domain *domain; |
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78 | 80 | |
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79 | 81 | /* |
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80 | 82 | * Detected geometry block. Filled in from device tree if powerpc, |
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.. | .. |
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93 | 95 | Handles of the RNG4 block are initialized |
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94 | 96 | by this driver */ |
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95 | 97 | |
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96 | | - struct clk *caam_ipg; |
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97 | | - struct clk *caam_mem; |
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98 | | - struct clk *caam_aclk; |
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99 | | - struct clk *caam_emi_slow; |
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100 | | - |
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| 98 | + struct clk_bulk_data *clks; |
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| 99 | + int num_clks; |
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101 | 100 | /* |
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102 | 101 | * debugfs entries for developer view into driver/device |
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103 | 102 | * variables at runtime. |
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104 | 103 | */ |
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105 | 104 | #ifdef CONFIG_DEBUG_FS |
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106 | | - struct dentry *dfs_root; |
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107 | 105 | struct dentry *ctl; /* controller dir */ |
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108 | 106 | struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; |
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109 | | - struct dentry *ctl_kek, *ctl_tkek, *ctl_tdsk; |
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110 | 107 | #endif |
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111 | 108 | }; |
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112 | 109 | |
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113 | | -void caam_jr_algapi_init(struct device *dev); |
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114 | | -void caam_jr_algapi_remove(struct device *dev); |
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| 110 | +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API |
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115 | 111 | |
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116 | | -#ifdef CONFIG_DEBUG_FS |
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117 | | -static int caam_debugfs_u64_get(void *data, u64 *val) |
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| 112 | +int caam_algapi_init(struct device *dev); |
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| 113 | +void caam_algapi_exit(void); |
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| 114 | + |
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| 115 | +#else |
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| 116 | + |
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| 117 | +static inline int caam_algapi_init(struct device *dev) |
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118 | 118 | { |
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119 | | - *val = caam64_to_cpu(*(u64 *)data); |
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120 | 119 | return 0; |
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121 | 120 | } |
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122 | 121 | |
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123 | | -static int caam_debugfs_u32_get(void *data, u64 *val) |
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| 122 | +static inline void caam_algapi_exit(void) |
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124 | 123 | { |
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125 | | - *val = caam32_to_cpu(*(u32 *)data); |
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| 124 | +} |
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| 125 | + |
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| 126 | +#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API */ |
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| 127 | + |
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| 128 | +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API |
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| 129 | + |
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| 130 | +int caam_algapi_hash_init(struct device *dev); |
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| 131 | +void caam_algapi_hash_exit(void); |
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| 132 | + |
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| 133 | +#else |
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| 134 | + |
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| 135 | +static inline int caam_algapi_hash_init(struct device *dev) |
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| 136 | +{ |
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126 | 137 | return 0; |
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127 | 138 | } |
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128 | 139 | |
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129 | | -DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u32_ro, caam_debugfs_u32_get, NULL, "%llu\n"); |
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130 | | -DEFINE_SIMPLE_ATTRIBUTE(caam_fops_u64_ro, caam_debugfs_u64_get, NULL, "%llu\n"); |
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131 | | -#endif |
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| 140 | +static inline void caam_algapi_hash_exit(void) |
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| 141 | +{ |
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| 142 | +} |
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| 143 | + |
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| 144 | +#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API */ |
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| 145 | + |
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| 146 | +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API |
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| 147 | + |
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| 148 | +int caam_pkc_init(struct device *dev); |
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| 149 | +void caam_pkc_exit(void); |
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| 150 | + |
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| 151 | +#else |
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| 152 | + |
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| 153 | +static inline int caam_pkc_init(struct device *dev) |
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| 154 | +{ |
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| 155 | + return 0; |
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| 156 | +} |
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| 157 | + |
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| 158 | +static inline void caam_pkc_exit(void) |
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| 159 | +{ |
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| 160 | +} |
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| 161 | + |
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| 162 | +#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API */ |
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| 163 | + |
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| 164 | +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API |
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| 165 | + |
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| 166 | +int caam_rng_init(struct device *dev); |
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| 167 | +void caam_rng_exit(struct device *dev); |
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| 168 | + |
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| 169 | +#else |
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| 170 | + |
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| 171 | +static inline int caam_rng_init(struct device *dev) |
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| 172 | +{ |
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| 173 | + return 0; |
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| 174 | +} |
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| 175 | + |
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| 176 | +static inline void caam_rng_exit(struct device *dev) {} |
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| 177 | + |
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| 178 | +#endif /* CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API */ |
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| 179 | + |
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| 180 | +#ifdef CONFIG_CAAM_QI |
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| 181 | + |
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| 182 | +int caam_qi_algapi_init(struct device *dev); |
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| 183 | +void caam_qi_algapi_exit(void); |
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| 184 | + |
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| 185 | +#else |
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| 186 | + |
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| 187 | +static inline int caam_qi_algapi_init(struct device *dev) |
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| 188 | +{ |
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| 189 | + return 0; |
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| 190 | +} |
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| 191 | + |
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| 192 | +static inline void caam_qi_algapi_exit(void) |
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| 193 | +{ |
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| 194 | +} |
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| 195 | + |
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| 196 | +#endif /* CONFIG_CAAM_QI */ |
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| 197 | + |
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| 198 | +static inline u64 caam_get_dma_mask(struct device *dev) |
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| 199 | +{ |
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| 200 | + struct device_node *nprop = dev->of_node; |
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| 201 | + |
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| 202 | + if (caam_ptr_sz != sizeof(u64)) |
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| 203 | + return DMA_BIT_MASK(32); |
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| 204 | + |
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| 205 | + if (caam_dpaa2) |
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| 206 | + return DMA_BIT_MASK(49); |
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| 207 | + |
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| 208 | + if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring") || |
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| 209 | + of_device_is_compatible(nprop, "fsl,sec-v5.0")) |
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| 210 | + return DMA_BIT_MASK(40); |
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| 211 | + |
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| 212 | + return DMA_BIT_MASK(36); |
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| 213 | +} |
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| 214 | + |
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132 | 215 | |
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133 | 216 | #endif /* INTERN_H */ |
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