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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * irq_comm.c: Common API for in kernel interrupt controller |
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3 | 4 | * Copyright (c) 2007, Intel Corporation. |
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4 | 5 | * |
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5 | | - * This program is free software; you can redistribute it and/or modify it |
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6 | | - * under the terms and conditions of the GNU General Public License, |
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7 | | - * version 2, as published by the Free Software Foundation. |
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8 | | - * |
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9 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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12 | | - * more details. |
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13 | | - * |
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14 | | - * You should have received a copy of the GNU General Public License along with |
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15 | | - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
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16 | | - * Place - Suite 330, Boston, MA 02111-1307 USA. |
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17 | 6 | * Authors: |
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18 | 7 | * Yaozu (Eddie) Dong <Eddie.dong@intel.com> |
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19 | 8 | * |
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.. | .. |
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63 | 52 | unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)]; |
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64 | 53 | unsigned int dest_vcpus = 0; |
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65 | 54 | |
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66 | | - if (irq->dest_mode == 0 && irq->dest_id == 0xff && |
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67 | | - kvm_lowest_prio_delivery(irq)) { |
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| 55 | + if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map)) |
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| 56 | + return r; |
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| 57 | + |
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| 58 | + if (irq->dest_mode == APIC_DEST_PHYSICAL && |
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| 59 | + irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) { |
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68 | 60 | printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n"); |
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69 | 61 | irq->delivery_mode = APIC_DM_FIXED; |
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70 | 62 | } |
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71 | | - |
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72 | | - if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map)) |
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73 | | - return r; |
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74 | 63 | |
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75 | 64 | memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap)); |
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76 | 65 | |
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.. | .. |
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86 | 75 | if (r < 0) |
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87 | 76 | r = 0; |
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88 | 77 | r += kvm_apic_set_irq(vcpu, irq, dest_map); |
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89 | | - } else if (kvm_lapic_enabled(vcpu)) { |
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| 78 | + } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) { |
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90 | 79 | if (!kvm_vector_hashing_enabled()) { |
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91 | 80 | if (!lowest) |
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92 | 81 | lowest = vcpu; |
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.. | .. |
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125 | 114 | irq->dest_id |= MSI_ADDR_EXT_DEST_ID(e->msi.address_hi); |
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126 | 115 | irq->vector = (e->msi.data & |
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127 | 116 | MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
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128 | | - irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; |
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| 117 | + irq->dest_mode = kvm_lapic_irq_dest_mode( |
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| 118 | + !!((1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo)); |
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129 | 119 | irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; |
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130 | 120 | irq->delivery_mode = e->msi.data & 0x700; |
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131 | 121 | irq->msi_redir_hint = ((e->msi.address_lo |
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132 | 122 | & MSI_ADDR_REDIRECTION_LOWPRI) > 0); |
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133 | 123 | irq->level = 1; |
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134 | | - irq->shorthand = 0; |
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| 124 | + irq->shorthand = APIC_DEST_NOSHORT; |
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135 | 125 | } |
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136 | 126 | EXPORT_SYMBOL_GPL(kvm_set_msi_irq); |
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137 | 127 | |
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.. | .. |
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295 | 285 | switch (ue->u.irqchip.irqchip) { |
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296 | 286 | case KVM_IRQCHIP_PIC_SLAVE: |
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297 | 287 | e->irqchip.pin += PIC_NUM_PINS / 2; |
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298 | | - /* fall through */ |
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| 288 | + fallthrough; |
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299 | 289 | case KVM_IRQCHIP_PIC_MASTER: |
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300 | 290 | if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2) |
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301 | 291 | return -EINVAL; |
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.. | .. |
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427 | 417 | |
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428 | 418 | kvm_set_msi_irq(vcpu->kvm, entry, &irq); |
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429 | 419 | |
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430 | | - if (irq.trig_mode && kvm_apic_match_dest(vcpu, NULL, 0, |
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| 420 | + if (irq.trig_mode && |
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| 421 | + kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, |
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431 | 422 | irq.dest_id, irq.dest_mode)) |
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432 | 423 | __set_bit(irq.vector, ioapic_handled_vectors); |
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433 | 424 | } |
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