add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/x86/crypto/sha256_ssse3_glue.c
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@@ -30,15 +30,15 @@
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 #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
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 #include <crypto/internal/hash.h>
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+#include <crypto/internal/simd.h>
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 #include <linux/init.h>
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 #include <linux/module.h>
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 #include <linux/mm.h>
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-#include <linux/cryptohash.h>
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 #include <linux/types.h>
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 #include <crypto/sha.h>
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 #include <crypto/sha256_base.h>
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-#include <asm/fpu/api.h>
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 #include <linux/string.h>
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+#include <asm/simd.h>
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 asmlinkage void sha256_transform_ssse3(struct sha256_state *state,
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 				       const u8 *data, int blocks);
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@@ -48,7 +48,7 @@
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 {
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 	struct sha256_state *sctx = shash_desc_ctx(desc);
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-	if (!irq_fpu_usable() ||
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+	if (!crypto_simd_usable() ||
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 	    (sctx->count % SHA256_BLOCK_SIZE) + len < SHA256_BLOCK_SIZE)
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 		return crypto_sha256_update(desc, data, len);
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@@ -68,7 +68,7 @@
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 static int sha256_finup(struct shash_desc *desc, const u8 *data,
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 	      unsigned int len, u8 *out, sha256_block_fn *sha256_xform)
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 {
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-	if (!irq_fpu_usable())
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+	if (!crypto_simd_usable())
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 		return crypto_sha256_finup(desc, data, len, out);
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 	kernel_fpu_begin();
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@@ -143,7 +143,6 @@
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 				ARRAY_SIZE(sha256_ssse3_algs));
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 }
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-#ifdef CONFIG_AS_AVX
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 asmlinkage void sha256_transform_avx(struct sha256_state *state,
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 				     const u8 *data, int blocks);
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@@ -220,12 +219,6 @@
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 				ARRAY_SIZE(sha256_avx_algs));
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 }
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-#else
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-static inline int register_sha256_avx(void) { return 0; }
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-static inline void unregister_sha256_avx(void) { }
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-#endif
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-
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-#if defined(CONFIG_AS_AVX2) && defined(CONFIG_AS_AVX)
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 asmlinkage void sha256_transform_rorx(struct sha256_state *state,
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 				      const u8 *data, int blocks);
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@@ -299,11 +292,6 @@
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 		crypto_unregister_shashes(sha256_avx2_algs,
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 				ARRAY_SIZE(sha256_avx2_algs));
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 }
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-
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-#else
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-static inline int register_sha256_avx2(void) { return 0; }
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-static inline void unregister_sha256_avx2(void) { }
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-#endif
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 #ifdef CONFIG_AS_SHA256_NI
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 asmlinkage void sha256_ni_transform(struct sha256_state *digest,