add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/powerpc/sysdev/ipic.c
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@@ -1,14 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * arch/powerpc/sysdev/ipic.c
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  *
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  * IPIC routines implementations.
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  *
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  * Copyright 2005 Freescale Semiconductor, Inc.
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- *
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- * This program is free software; you can redistribute  it and/or modify it
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- * under  the terms of  the GNU General  Public License as published by the
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- * Free Software Foundation;  either version 2 of the  License, or (at your
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- * option) any later version.
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  */
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 #include <linux/kernel.h>
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 #include <linux/init.h>
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@@ -771,49 +767,6 @@
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 	return ipic;
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 }
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-int ipic_set_priority(unsigned int virq, unsigned int priority)
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-{
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-	struct ipic *ipic = ipic_from_irq(virq);
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-	unsigned int src = virq_to_hw(virq);
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-	u32 temp;
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-
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-	if (priority > 7)
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-		return -EINVAL;
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-	if (src > 127)
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-		return -EINVAL;
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-	if (ipic_info[src].prio == 0)
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-		return -EINVAL;
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-
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-	temp = ipic_read(ipic->regs, ipic_info[src].prio);
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-
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-	if (priority < 4) {
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-		temp &= ~(0x7 << (20 + (3 - priority) * 3));
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-		temp |= ipic_info[src].prio_mask << (20 + (3 - priority) * 3);
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-	} else {
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-		temp &= ~(0x7 << (4 + (7 - priority) * 3));
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-		temp |= ipic_info[src].prio_mask << (4 + (7 - priority) * 3);
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-	}
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-
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-	ipic_write(ipic->regs, ipic_info[src].prio, temp);
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-
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-	return 0;
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-}
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-
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-void ipic_set_highest_priority(unsigned int virq)
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-{
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-	struct ipic *ipic = ipic_from_irq(virq);
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-	unsigned int src = virq_to_hw(virq);
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-	u32 temp;
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-
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-	temp = ipic_read(ipic->regs, IPIC_SICFR);
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-
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-	/* clear and set HPI */
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-	temp &= 0x7f000000;
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-	temp |= (src & 0x7f) << 24;
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-
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-	ipic_write(ipic->regs, IPIC_SICFR, temp);
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-}
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-
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 void ipic_set_default_priority(void)
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 {
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 	ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT);
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@@ -824,29 +777,9 @@
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 	ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT);
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 }
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-void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq)
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-{
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-	struct ipic *ipic = primary_ipic;
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-	u32 temp;
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-
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-	temp = ipic_read(ipic->regs, IPIC_SERMR);
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-	temp |= (1 << (31 - mcp_irq));
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-	ipic_write(ipic->regs, IPIC_SERMR, temp);
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-}
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-
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-void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq)
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-{
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-	struct ipic *ipic = primary_ipic;
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-	u32 temp;
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-
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-	temp = ipic_read(ipic->regs, IPIC_SERMR);
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-	temp &= (1 << (31 - mcp_irq));
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-	ipic_write(ipic->regs, IPIC_SERMR, temp);
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-}
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-
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 u32 ipic_get_mcp_status(void)
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 {
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-	return ipic_read(primary_ipic->regs, IPIC_SERSR);
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+	return primary_ipic ? ipic_read(primary_ipic->regs, IPIC_SERSR) : 0;
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 }
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 void ipic_clear_mcp_status(u32 mask)