| .. | .. |
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| 2 | 2 | #ifndef __ASM_ALTERNATIVE_H |
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| 3 | 3 | #define __ASM_ALTERNATIVE_H |
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| 4 | 4 | |
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| 5 | | -#include <asm/cpucaps.h> |
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| 6 | | -#include <asm/insn.h> |
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| 7 | | - |
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| 8 | | -#define ARM64_CB_PATCH ARM64_NCAPS |
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| 5 | +#include <asm/alternative-macros.h> |
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| 9 | 6 | |
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| 10 | 7 | #ifndef __ASSEMBLY__ |
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| 11 | 8 | |
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| 12 | 9 | #include <linux/init.h> |
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| 13 | 10 | #include <linux/types.h> |
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| 14 | 11 | #include <linux/stddef.h> |
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| 15 | | -#include <linux/stringify.h> |
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| 16 | | - |
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| 17 | | -extern int alternatives_applied; |
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| 18 | 12 | |
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| 19 | 13 | struct alt_instr { |
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| 20 | 14 | s32 orig_offset; /* offset to original instruction */ |
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| .. | .. |
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| 27 | 21 | typedef void (*alternative_cb_t)(struct alt_instr *alt, |
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| 28 | 22 | __le32 *origptr, __le32 *updptr, int nr_inst); |
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| 29 | 23 | |
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| 24 | +void __init apply_boot_alternatives(void); |
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| 30 | 25 | void __init apply_alternatives_all(void); |
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| 26 | +bool alternative_is_applied(u16 cpufeature); |
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| 31 | 27 | |
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| 32 | 28 | #ifdef CONFIG_MODULES |
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| 33 | 29 | void apply_alternatives_module(void *start, size_t length); |
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| .. | .. |
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| 35 | 31 | static inline void apply_alternatives_module(void *start, size_t length) { } |
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| 36 | 32 | #endif |
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| 37 | 33 | |
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| 38 | | -#define ALTINSTR_ENTRY(feature) \ |
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| 39 | | - " .word 661b - .\n" /* label */ \ |
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| 40 | | - " .word 663f - .\n" /* new instruction */ \ |
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| 41 | | - " .hword " __stringify(feature) "\n" /* feature bit */ \ |
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| 42 | | - " .byte 662b-661b\n" /* source len */ \ |
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| 43 | | - " .byte 664f-663f\n" /* replacement len */ |
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| 44 | | - |
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| 45 | | -#define ALTINSTR_ENTRY_CB(feature, cb) \ |
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| 46 | | - " .word 661b - .\n" /* label */ \ |
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| 47 | | - " .word " __stringify(cb) "- .\n" /* callback */ \ |
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| 48 | | - " .hword " __stringify(feature) "\n" /* feature bit */ \ |
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| 49 | | - " .byte 662b-661b\n" /* source len */ \ |
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| 50 | | - " .byte 664f-663f\n" /* replacement len */ |
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| 51 | | - |
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| 52 | | -/* |
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| 53 | | - * alternative assembly primitive: |
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| 54 | | - * |
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| 55 | | - * If any of these .org directive fail, it means that insn1 and insn2 |
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| 56 | | - * don't have the same length. This used to be written as |
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| 57 | | - * |
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| 58 | | - * .if ((664b-663b) != (662b-661b)) |
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| 59 | | - * .error "Alternatives instruction length mismatch" |
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| 60 | | - * .endif |
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| 61 | | - * |
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| 62 | | - * but most assemblers die if insn1 or insn2 have a .inst. This should |
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| 63 | | - * be fixed in a binutils release posterior to 2.25.51.0.2 (anything |
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| 64 | | - * containing commit 4e4d08cf7399b606 or c1baaddf8861). |
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| 65 | | - * |
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| 66 | | - * Alternatives with callbacks do not generate replacement instructions. |
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| 67 | | - */ |
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| 68 | | -#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \ |
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| 69 | | - ".if "__stringify(cfg_enabled)" == 1\n" \ |
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| 70 | | - "661:\n\t" \ |
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| 71 | | - oldinstr "\n" \ |
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| 72 | | - "662:\n" \ |
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| 73 | | - ".pushsection .altinstructions,\"a\"\n" \ |
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| 74 | | - ALTINSTR_ENTRY(feature) \ |
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| 75 | | - ".popsection\n" \ |
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| 76 | | - ".pushsection .altinstr_replacement, \"a\"\n" \ |
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| 77 | | - "663:\n\t" \ |
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| 78 | | - newinstr "\n" \ |
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| 79 | | - "664:\n\t" \ |
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| 80 | | - ".popsection\n\t" \ |
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| 81 | | - ".org . - (664b-663b) + (662b-661b)\n\t" \ |
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| 82 | | - ".org . - (662b-661b) + (664b-663b)\n" \ |
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| 83 | | - ".endif\n" |
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| 84 | | - |
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| 85 | | -#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \ |
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| 86 | | - ".if "__stringify(cfg_enabled)" == 1\n" \ |
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| 87 | | - "661:\n\t" \ |
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| 88 | | - oldinstr "\n" \ |
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| 89 | | - "662:\n" \ |
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| 90 | | - ".pushsection .altinstructions,\"a\"\n" \ |
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| 91 | | - ALTINSTR_ENTRY_CB(feature, cb) \ |
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| 92 | | - ".popsection\n" \ |
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| 93 | | - "663:\n\t" \ |
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| 94 | | - "664:\n\t" \ |
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| 95 | | - ".endif\n" |
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| 96 | | - |
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| 97 | | -#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \ |
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| 98 | | - __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg)) |
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| 99 | | - |
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| 100 | | -#define ALTERNATIVE_CB(oldinstr, cb) \ |
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| 101 | | - __ALTERNATIVE_CFG_CB(oldinstr, ARM64_CB_PATCH, 1, cb) |
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| 102 | | -#else |
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| 103 | | - |
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| 104 | | -#include <asm/assembler.h> |
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| 105 | | - |
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| 106 | | -.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len |
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| 107 | | - .word \orig_offset - . |
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| 108 | | - .word \alt_offset - . |
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| 109 | | - .hword \feature |
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| 110 | | - .byte \orig_len |
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| 111 | | - .byte \alt_len |
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| 112 | | -.endm |
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| 113 | | - |
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| 114 | | -.macro alternative_insn insn1, insn2, cap, enable = 1 |
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| 115 | | - .if \enable |
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| 116 | | -661: \insn1 |
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| 117 | | -662: .pushsection .altinstructions, "a" |
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| 118 | | - altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f |
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| 119 | | - .popsection |
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| 120 | | - .pushsection .altinstr_replacement, "ax" |
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| 121 | | -663: \insn2 |
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| 122 | | -664: .org . - (664b-663b) + (662b-661b) |
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| 123 | | - .org . - (662b-661b) + (664b-663b) |
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| 124 | | - .popsection |
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| 125 | | - .endif |
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| 126 | | -.endm |
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| 127 | | - |
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| 128 | | -/* |
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| 129 | | - * Alternative sequences |
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| 130 | | - * |
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| 131 | | - * The code for the case where the capability is not present will be |
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| 132 | | - * assembled and linked as normal. There are no restrictions on this |
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| 133 | | - * code. |
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| 134 | | - * |
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| 135 | | - * The code for the case where the capability is present will be |
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| 136 | | - * assembled into a special section to be used for dynamic patching. |
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| 137 | | - * Code for that case must: |
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| 138 | | - * |
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| 139 | | - * 1. Be exactly the same length (in bytes) as the default code |
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| 140 | | - * sequence. |
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| 141 | | - * |
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| 142 | | - * 2. Not contain a branch target that is used outside of the |
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| 143 | | - * alternative sequence it is defined in (branches into an |
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| 144 | | - * alternative sequence are not fixed up). |
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| 145 | | - */ |
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| 146 | | - |
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| 147 | | -/* |
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| 148 | | - * Begin an alternative code sequence. |
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| 149 | | - */ |
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| 150 | | -.macro alternative_if_not cap |
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| 151 | | - .set .Lasm_alt_mode, 0 |
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| 152 | | - .pushsection .altinstructions, "a" |
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| 153 | | - altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f |
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| 154 | | - .popsection |
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| 155 | | -661: |
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| 156 | | -.endm |
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| 157 | | - |
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| 158 | | -.macro alternative_if cap |
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| 159 | | - .set .Lasm_alt_mode, 1 |
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| 160 | | - .pushsection .altinstructions, "a" |
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| 161 | | - altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f |
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| 162 | | - .popsection |
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| 163 | | - .pushsection .altinstr_replacement, "ax" |
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| 164 | | - .align 2 /* So GAS knows label 661 is suitably aligned */ |
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| 165 | | -661: |
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| 166 | | -.endm |
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| 167 | | - |
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| 168 | | -.macro alternative_cb cb |
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| 169 | | - .set .Lasm_alt_mode, 0 |
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| 170 | | - .pushsection .altinstructions, "a" |
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| 171 | | - altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0 |
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| 172 | | - .popsection |
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| 173 | | -661: |
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| 174 | | -.endm |
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| 175 | | - |
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| 176 | | -/* |
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| 177 | | - * Provide the other half of the alternative code sequence. |
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| 178 | | - */ |
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| 179 | | -.macro alternative_else |
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| 180 | | -662: |
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| 181 | | - .if .Lasm_alt_mode==0 |
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| 182 | | - .pushsection .altinstr_replacement, "ax" |
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| 183 | | - .else |
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| 184 | | - .popsection |
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| 185 | | - .endif |
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| 186 | | -663: |
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| 187 | | -.endm |
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| 188 | | - |
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| 189 | | -/* |
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| 190 | | - * Complete an alternative code sequence. |
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| 191 | | - */ |
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| 192 | | -.macro alternative_endif |
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| 193 | | -664: |
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| 194 | | - .org . - (664b-663b) + (662b-661b) |
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| 195 | | - .org . - (662b-661b) + (664b-663b) |
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| 196 | | - .if .Lasm_alt_mode==0 |
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| 197 | | - .popsection |
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| 198 | | - .endif |
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| 199 | | -.endm |
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| 200 | | - |
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| 201 | | -/* |
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| 202 | | - * Callback-based alternative epilogue |
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| 203 | | - */ |
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| 204 | | -.macro alternative_cb_end |
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| 205 | | -662: |
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| 206 | | -.endm |
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| 207 | | - |
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| 208 | | -/* |
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| 209 | | - * Provides a trivial alternative or default sequence consisting solely |
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| 210 | | - * of NOPs. The number of NOPs is chosen automatically to match the |
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| 211 | | - * previous case. |
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| 212 | | - */ |
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| 213 | | -.macro alternative_else_nop_endif |
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| 214 | | -alternative_else |
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| 215 | | - nops (662b-661b) / AARCH64_INSN_SIZE |
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| 216 | | -alternative_endif |
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| 217 | | -.endm |
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| 218 | | - |
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| 219 | | -#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \ |
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| 220 | | - alternative_insn insn1, insn2, cap, IS_ENABLED(cfg) |
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| 221 | | - |
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| 222 | | -.macro user_alt, label, oldinstr, newinstr, cond |
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| 223 | | -9999: alternative_insn "\oldinstr", "\newinstr", \cond |
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| 224 | | - _asm_extable 9999b, \label |
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| 225 | | -.endm |
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| 226 | | - |
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| 227 | | -/* |
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| 228 | | - * Generate the assembly for UAO alternatives with exception table entries. |
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| 229 | | - * This is complicated as there is no post-increment or pair versions of the |
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| 230 | | - * unprivileged instructions, and USER() only works for single instructions. |
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| 231 | | - */ |
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| 232 | | -#ifdef CONFIG_ARM64_UAO |
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| 233 | | - .macro uao_ldp l, reg1, reg2, addr, post_inc |
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| 234 | | - alternative_if_not ARM64_HAS_UAO |
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| 235 | | -8888: ldp \reg1, \reg2, [\addr], \post_inc; |
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| 236 | | -8889: nop; |
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| 237 | | - nop; |
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| 238 | | - alternative_else |
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| 239 | | - ldtr \reg1, [\addr]; |
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| 240 | | - ldtr \reg2, [\addr, #8]; |
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| 241 | | - add \addr, \addr, \post_inc; |
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| 242 | | - alternative_endif |
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| 243 | | - |
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| 244 | | - _asm_extable 8888b,\l; |
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| 245 | | - _asm_extable 8889b,\l; |
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| 246 | | - .endm |
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| 247 | | - |
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| 248 | | - .macro uao_stp l, reg1, reg2, addr, post_inc |
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| 249 | | - alternative_if_not ARM64_HAS_UAO |
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| 250 | | -8888: stp \reg1, \reg2, [\addr], \post_inc; |
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| 251 | | -8889: nop; |
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| 252 | | - nop; |
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| 253 | | - alternative_else |
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| 254 | | - sttr \reg1, [\addr]; |
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| 255 | | - sttr \reg2, [\addr, #8]; |
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| 256 | | - add \addr, \addr, \post_inc; |
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| 257 | | - alternative_endif |
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| 258 | | - |
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| 259 | | - _asm_extable 8888b,\l; |
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| 260 | | - _asm_extable 8889b,\l; |
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| 261 | | - .endm |
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| 262 | | - |
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| 263 | | - .macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc |
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| 264 | | - alternative_if_not ARM64_HAS_UAO |
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| 265 | | -8888: \inst \reg, [\addr], \post_inc; |
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| 266 | | - nop; |
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| 267 | | - alternative_else |
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| 268 | | - \alt_inst \reg, [\addr]; |
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| 269 | | - add \addr, \addr, \post_inc; |
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| 270 | | - alternative_endif |
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| 271 | | - |
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| 272 | | - _asm_extable 8888b,\l; |
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| 273 | | - .endm |
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| 274 | | -#else |
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| 275 | | - .macro uao_ldp l, reg1, reg2, addr, post_inc |
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| 276 | | - USER(\l, ldp \reg1, \reg2, [\addr], \post_inc) |
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| 277 | | - .endm |
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| 278 | | - .macro uao_stp l, reg1, reg2, addr, post_inc |
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| 279 | | - USER(\l, stp \reg1, \reg2, [\addr], \post_inc) |
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| 280 | | - .endm |
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| 281 | | - .macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc |
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| 282 | | - USER(\l, \inst \reg, [\addr], \post_inc) |
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| 283 | | - .endm |
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| 284 | | -#endif |
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| 285 | | - |
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| 286 | | -#endif /* __ASSEMBLY__ */ |
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| 287 | | - |
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| 288 | | -/* |
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| 289 | | - * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature)); |
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| 290 | | - * |
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| 291 | | - * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO)); |
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| 292 | | - * N.B. If CONFIG_FOO is specified, but not selected, the whole block |
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| 293 | | - * will be omitted, including oldinstr. |
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| 294 | | - */ |
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| 295 | | -#define ALTERNATIVE(oldinstr, newinstr, ...) \ |
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| 296 | | - _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1) |
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| 297 | | - |
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| 34 | +#endif /* __ASSEMBLY__ */ |
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| 298 | 35 | #endif /* __ASM_ALTERNATIVE_H */ |
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