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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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1 | 2 | /* |
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2 | 3 | * linux/arch/arm/mm/cache-v7m.S |
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3 | 4 | * |
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.. | .. |
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5 | 6 | * |
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6 | 7 | * Copyright (C) 2001 Deep Blue Solutions Ltd. |
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7 | 8 | * Copyright (C) 2005 ARM Ltd. |
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8 | | - * |
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9 | | - * This program is free software; you can redistribute it and/or modify |
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10 | | - * it under the terms of the GNU General Public License version 2 as |
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11 | | - * published by the Free Software Foundation. |
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12 | 9 | * |
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13 | 10 | * This is the "shell" of the ARMv7M processor support. |
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14 | 11 | */ |
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.. | .. |
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186 | 183 | and r1, r1, #7 @ mask of the bits for current cache only |
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187 | 184 | cmp r1, #2 @ see what cache we have at this level |
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188 | 185 | blt skip @ skip if no cache, or just i-cache |
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189 | | -#ifdef CONFIG_PREEMPT |
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| 186 | +#ifdef CONFIG_PREEMPTION |
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190 | 187 | save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic |
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191 | 188 | #endif |
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192 | 189 | write_csselr r10, r1 @ set current cache level |
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193 | 190 | isb @ isb to sych the new cssr&csidr |
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194 | 191 | read_ccsidr r1 @ read the new csidr |
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195 | | -#ifdef CONFIG_PREEMPT |
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| 192 | +#ifdef CONFIG_PREEMPTION |
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196 | 193 | restore_irqs_notrace r9 |
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197 | 194 | #endif |
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198 | 195 | and r2, r1, #7 @ extract the length of the cache lines |
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