add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/mach-omap2/omap-secure.c
..
..
@@ -1,28 +1,50 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * OMAP Secure API infrastructure.
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  *
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  * Copyright (C) 2011 Texas Instruments, Inc.
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  *	Santosh Shilimkar <santosh.shilimkar@ti.com>
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  * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
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- * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
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- *
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- *
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- * This program is free software,you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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+ * Copyright (C) 2013 Pali Rohár <pali@kernel.org>
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  */
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10
 
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+#include <linux/arm-smccc.h>
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+#include <linux/cpu_pm.h>
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 #include <linux/kernel.h>
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 #include <linux/init.h>
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 #include <linux/io.h>
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 #include <linux/memblock.h>
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+#include <linux/of.h>
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 #include <asm/cacheflush.h>
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 #include <asm/memblock.h>
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+#include "common.h"
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 #include "omap-secure.h"
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+#include "soc.h"
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 static phys_addr_t omap_secure_memblock_base;
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+
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+bool optee_available;
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+
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+#define OMAP_SIP_SMC_STD_CALL_VAL(func_num) \
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+	ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_32, \
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+	ARM_SMCCC_OWNER_SIP, (func_num))
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+
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+static void __init omap_optee_init_check(void)
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+{
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+	struct device_node *np;
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+
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+	/*
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+	 * We only check that the OP-TEE node is present and available. The
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+	 * OP-TEE kernel driver is not needed for the type of interaction made
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+	 * with OP-TEE here so the driver's status is not checked.
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+	 */
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+	np = of_find_node_by_path("/firmware/optee");
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+	if (np && of_device_is_available(np))
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+		optee_available = true;
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+	of_node_put(np);
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+}
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 /**
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  * omap_sec_dispatcher: Routine to dispatch low power secure
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@@ -55,6 +77,27 @@
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 	ret = omap_smc2(idx, flag, __pa(param));
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 	return ret;
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+}
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+
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+void omap_smccc_smc(u32 fn, u32 arg)
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+{
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+	struct arm_smccc_res res;
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+
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+	arm_smccc_smc(OMAP_SIP_SMC_STD_CALL_VAL(fn), arg,
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+		      0, 0, 0, 0, 0, 0, &res);
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+	WARN(res.a0, "Secure function call 0x%08x failed\n", fn);
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+}
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+
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+void omap_smc1(u32 fn, u32 arg)
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+{
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+	/*
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+	 * If this platform has OP-TEE installed we use ARM SMC calls
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+	 * otherwise fall back to the OMAP ROM style calls.
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+	 */
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+	if (optee_available)
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+		omap_smccc_smc(fn, arg);
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+	else
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+		_omap_smc1(fn, arg);
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 }
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 /* Allocate the memory to save secure ram */
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@@ -167,3 +210,45 @@
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 				      NO_FLAG,
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 				      3, ptr, count, flag, 0);
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 }
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+
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+void __init omap_secure_init(void)
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+{
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+	omap_optee_init_check();
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+}
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+
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+/*
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+ * Dummy dispatcher call after core OSWR and MPU off. Updates the ROM return
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+ * address after MMU has been re-enabled after CPU1 has been woken up again.
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+ * Otherwise the ROM code will attempt to use the earlier physical return
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+ * address that got set with MMU off when waking up CPU1. Only used on secure
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+ * devices.
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+ */
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+static int cpu_notifier(struct notifier_block *nb, unsigned long cmd, void *v)
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+{
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+	switch (cmd) {
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+	case CPU_CLUSTER_PM_EXIT:
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+		omap_secure_dispatcher(OMAP4_PPA_SERVICE_0,
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+				       FLAG_START_CRITICAL,
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+				       0, 0, 0, 0, 0);
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+		break;
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+	default:
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+		break;
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+	}
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+
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+	return NOTIFY_OK;
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+}
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+
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+static struct notifier_block secure_notifier_block = {
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+	.notifier_call = cpu_notifier,
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+};
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+
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+static int __init secure_pm_init(void)
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+{
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+	if (omap_type() == OMAP2_DEVICE_TYPE_GP || !soc_is_omap44xx())
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+		return 0;
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+
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+	cpu_pm_register_notifier(&secure_notifier_block);
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+
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+	return 0;
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+}
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+omap_arch_initcall(secure_pm_init);