add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/mach-lpc32xx/serial.c
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@@ -1,19 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * arch/arm/mach-lpc32xx/serial.c
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  *
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  * Author: Kevin Wells <kevin.wells@nxp.com>
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  *
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  * Copyright (C) 2010 NXP Semiconductors
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #include <linux/kernel.h>
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@@ -25,8 +16,7 @@
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 #include <linux/clk.h>
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 #include <linux/io.h>
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-#include <mach/hardware.h>
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-#include <mach/platform.h>
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+#include "lpc32xx.h"
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 #include "common.h"
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 #define LPC32XX_SUART_FIFO_SIZE	64
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@@ -69,6 +59,36 @@
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 	},
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 };
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+/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */
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+void lpc32xx_loopback_set(resource_size_t mapbase, int state)
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+{
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+	int bit;
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+	u32 tmp;
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+
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+	switch (mapbase) {
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+	case LPC32XX_HS_UART1_BASE:
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+		bit = 0;
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+		break;
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+	case LPC32XX_HS_UART2_BASE:
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+		bit = 1;
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+		break;
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+	case LPC32XX_HS_UART7_BASE:
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+		bit = 6;
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+		break;
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+	default:
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+		WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase);
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+		return;
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+	}
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+
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+	tmp = readl(LPC32XX_UARTCTL_CLOOP);
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+	if (state)
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+		tmp |= (1 << bit);
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+	else
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+		tmp &= ~(1 << bit);
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+	writel(tmp, LPC32XX_UARTCTL_CLOOP);
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+}
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+EXPORT_SYMBOL_GPL(lpc32xx_loopback_set);
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+
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 void __init lpc32xx_serial_init(void)
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 {
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 	u32 tmp, clkmodes = 0;