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2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/arch/arm/mach-iop32x/include/mach/irqs.h
....@@ -1,50 +1,14 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * arch/arm/mach-iop32x/include/mach/irqs.h
34  *
45  * Author:	Rory Bolt <rorybolt@pacbell.net>
56  * Copyright:	(C) 2002 Rory Bolt
6
- *
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- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
107  */
118 
129 #ifndef __IRQS_H
1310 #define __IRQS_H
1411 
15
-/*
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- * IOP80321 chipset interrupts
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- */
18
-#define IRQ_IOP32X_DMA0_EOT	0
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-#define IRQ_IOP32X_DMA0_EOC	1
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-#define IRQ_IOP32X_DMA1_EOT	2
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-#define IRQ_IOP32X_DMA1_EOC	3
22
-#define IRQ_IOP32X_AA_EOT	6
23
-#define IRQ_IOP32X_AA_EOC	7
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-#define IRQ_IOP32X_CORE_PMON	8
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-#define IRQ_IOP32X_TIMER0	9
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-#define IRQ_IOP32X_TIMER1	10
27
-#define IRQ_IOP32X_I2C_0	11
28
-#define IRQ_IOP32X_I2C_1	12
29
-#define IRQ_IOP32X_MESSAGING	13
30
-#define IRQ_IOP32X_ATU_BIST	14
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-#define IRQ_IOP32X_PERFMON	15
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-#define IRQ_IOP32X_CORE_PMU	16
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-#define IRQ_IOP32X_BIU_ERR	17
34
-#define IRQ_IOP32X_ATU_ERR	18
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-#define IRQ_IOP32X_MCU_ERR	19
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-#define IRQ_IOP32X_DMA0_ERR	20
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-#define IRQ_IOP32X_DMA1_ERR	21
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-#define IRQ_IOP32X_AA_ERR	23
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-#define IRQ_IOP32X_MSG_ERR	24
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-#define IRQ_IOP32X_SSP		25
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-#define IRQ_IOP32X_XINT0	27
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-#define IRQ_IOP32X_XINT1	28
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-#define IRQ_IOP32X_XINT2	29
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-#define IRQ_IOP32X_XINT3	30
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-#define IRQ_IOP32X_HPI		31
46
-
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-#define NR_IRQS			32
48
-
12
+#define NR_IRQS			33
4913 
5014 #endif