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1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
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2 | 2 | // |
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3 | | -// SAMSUNG EXYNOS Flattened Device Tree enabled machine |
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| 3 | +// Samsung Exynos Flattened Device Tree enabled machine |
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4 | 4 | // |
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5 | 5 | // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. |
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6 | 6 | // http://www.samsung.com |
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19 | 19 | #include <asm/mach/arch.h> |
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20 | 20 | #include <asm/mach/map.h> |
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21 | 21 | |
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22 | | -#include <mach/map.h> |
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23 | | -#include <plat/cpu.h> |
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24 | | - |
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25 | 22 | #include "common.h" |
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| 23 | + |
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| 24 | +#define S3C_ADDR_BASE 0xF6000000 |
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| 25 | +#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) |
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| 26 | +#define S5P_VA_CHIPID S3C_ADDR(0x02000000) |
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26 | 27 | |
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27 | 28 | static struct platform_device exynos_cpuidle = { |
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28 | 29 | .name = "exynos_cpuidle", |
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.. | .. |
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33 | 34 | }; |
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34 | 35 | |
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35 | 36 | void __iomem *sysram_base_addr __ro_after_init; |
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| 37 | +phys_addr_t sysram_base_phys __ro_after_init; |
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36 | 38 | void __iomem *sysram_ns_base_addr __ro_after_init; |
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| 39 | + |
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| 40 | +unsigned long exynos_cpu_id; |
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| 41 | +static unsigned int exynos_cpu_rev; |
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| 42 | + |
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| 43 | +unsigned int exynos_rev(void) |
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| 44 | +{ |
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| 45 | + return exynos_cpu_rev; |
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| 46 | +} |
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37 | 47 | |
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38 | 48 | void __init exynos_sysram_init(void) |
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39 | 49 | { |
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.. | .. |
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43 | 53 | if (!of_device_is_available(node)) |
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44 | 54 | continue; |
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45 | 55 | sysram_base_addr = of_iomap(node, 0); |
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| 56 | + sysram_base_phys = of_translate_address(node, |
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| 57 | + of_get_address(node, 0, NULL, NULL)); |
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| 58 | + of_node_put(node); |
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46 | 59 | break; |
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47 | 60 | } |
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48 | 61 | |
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.. | .. |
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50 | 63 | if (!of_device_is_available(node)) |
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51 | 64 | continue; |
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52 | 65 | sysram_ns_base_addr = of_iomap(node, 0); |
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| 66 | + of_node_put(node); |
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53 | 67 | break; |
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54 | 68 | } |
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55 | 69 | } |
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.. | .. |
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83 | 97 | of_scan_flat_dt(exynos_fdt_map_chipid, NULL); |
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84 | 98 | |
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85 | 99 | /* detect cpu id and rev. */ |
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86 | | - s5p_init_cpu(S5P_VA_CHIPID); |
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| 100 | + exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID); |
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| 101 | + exynos_cpu_rev = exynos_cpu_id & 0xFF; |
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| 102 | + |
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| 103 | + pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id); |
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| 104 | + |
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87 | 105 | } |
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88 | 106 | |
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89 | 107 | /* |
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.. | .. |
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131 | 149 | np = of_find_matching_node(NULL, exynos_dt_pmu_match); |
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132 | 150 | if (np) |
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133 | 151 | pmu_base_addr = of_iomap(np, 0); |
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| 152 | + of_node_put(np); |
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134 | 153 | } |
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135 | 154 | |
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136 | 155 | static void __init exynos_init_irq(void) |
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.. | .. |
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189 | 208 | of_fdt_limit_memory(8); |
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190 | 209 | } |
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191 | 210 | |
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192 | | -DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") |
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193 | | - .l2c_aux_val = 0x3c400001, |
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194 | | - .l2c_aux_mask = 0xc20fffff, |
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| 211 | +DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") |
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| 212 | + .l2c_aux_val = 0x38400000, |
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| 213 | + .l2c_aux_mask = 0xc60fffff, |
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195 | 214 | .smp = smp_ops(exynos_smp_ops), |
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196 | 215 | .map_io = exynos_init_io, |
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197 | 216 | .init_early = exynos_firmware_init, |
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