add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/include/debug/zynq.S
..
..
@@ -1,16 +1,8 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
1
2
 /*
2
3
  * Debugging macro include header
3
4
  *
4
5
  *  Copyright (C) 2011 Xilinx
5
- *
6
- * This software is licensed under the terms of the GNU General Public
7
- * License version 2, as published by the Free Software Foundation, and
8
- * may be copied, distributed, and modified under those terms.
9
- *
10
- * This program is distributed in the hope that it will be useful,
11
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
12
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
- * GNU General Public License for more details.
14
6
  */
15
7
 #define UART_CR_OFFSET		0x00  /* Control Register [8:0] */
16
8
 #define UART_SR_OFFSET		0x2C  /* Channel Status [11:0] */
..
..
@@ -41,7 +33,10 @@
41
33
 		strb	\rd, [\rx, #UART_FIFO_OFFSET]	@ TXDATA
42
34
 		.endm
43
35
 
44
-		.macro	waituart,rd,rx
36
+		.macro	waituartcts,rd,rx
37
+		.endm
38
+
39
+		.macro	waituarttxrdy,rd,rx
45
40
 1001:		ldr	\rd, [\rx, #UART_SR_OFFSET]
46
41
 ARM_BE8(	rev	\rd, \rd )
47
42
 		tst	\rd, #UART_SR_TXEMPTY