| .. | .. |
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| 8 | 8 | |
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| 9 | 9 | #include <asm/vfp.h> |
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| 10 | 10 | |
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| 11 | | -@ Macros to allow building with old toolkits (with no VFP support) |
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| 11 | +#ifdef CONFIG_AS_VFP_VMRS_FPINST |
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| 12 | + .macro VFPFMRX, rd, sysreg, cond |
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| 13 | + vmrs\cond \rd, \sysreg |
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| 14 | + .endm |
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| 15 | + |
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| 16 | + .macro VFPFMXR, sysreg, rd, cond |
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| 17 | + vmsr\cond \sysreg, \rd |
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| 18 | + .endm |
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| 19 | +#else |
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| 20 | + @ Macros to allow building with old toolkits (with no VFP support) |
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| 12 | 21 | .macro VFPFMRX, rd, sysreg, cond |
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| 13 | 22 | MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg |
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| 14 | 23 | .endm |
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| .. | .. |
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| 16 | 25 | .macro VFPFMXR, sysreg, rd, cond |
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| 17 | 26 | MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd |
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| 18 | 27 | .endm |
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| 28 | +#endif |
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| 19 | 29 | |
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| 20 | 30 | @ read all the working registers back into the VFP |
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| 21 | 31 | .macro VFPFLDMIA, base, tmp |
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| 32 | + .fpu vfpv2 |
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| 22 | 33 | #if __LINUX_ARM_ARCH__ < 6 |
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| 23 | | - LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} |
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| 34 | + fldmiax \base!, {d0-d15} |
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| 24 | 35 | #else |
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| 25 | | - LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} |
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| 36 | + vldmia \base!, {d0-d15} |
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| 26 | 37 | #endif |
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| 27 | 38 | #ifdef CONFIG_VFPv3 |
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| 39 | + .fpu vfpv3 |
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| 28 | 40 | #if __LINUX_ARM_ARCH__ <= 6 |
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| 29 | 41 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
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| 30 | 42 | ldr \tmp, [\tmp, #0] |
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| 31 | 43 | tst \tmp, #HWCAP_VFPD32 |
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| 32 | | - ldclne p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
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| 44 | + vldmiane \base!, {d16-d31} |
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| 33 | 45 | addeq \base, \base, #32*4 @ step over unused register space |
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| 34 | 46 | #else |
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| 35 | 47 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
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| 36 | 48 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
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| 37 | 49 | cmp \tmp, #2 @ 32 x 64bit registers? |
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| 38 | | - ldcleq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} |
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| 50 | + vldmiaeq \base!, {d16-d31} |
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| 39 | 51 | addne \base, \base, #32*4 @ step over unused register space |
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| 40 | 52 | #endif |
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| 41 | 53 | #endif |
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| .. | .. |
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| 44 | 56 | @ write all the working registers out of the VFP |
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| 45 | 57 | .macro VFPFSTMIA, base, tmp |
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| 46 | 58 | #if __LINUX_ARM_ARCH__ < 6 |
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| 47 | | - STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} |
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| 59 | + fstmiax \base!, {d0-d15} |
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| 48 | 60 | #else |
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| 49 | | - STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} |
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| 61 | + vstmia \base!, {d0-d15} |
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| 50 | 62 | #endif |
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| 51 | 63 | #ifdef CONFIG_VFPv3 |
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| 64 | + .fpu vfpv3 |
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| 52 | 65 | #if __LINUX_ARM_ARCH__ <= 6 |
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| 53 | 66 | ldr \tmp, =elf_hwcap @ may not have MVFR regs |
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| 54 | 67 | ldr \tmp, [\tmp, #0] |
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| 55 | 68 | tst \tmp, #HWCAP_VFPD32 |
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| 56 | | - stclne p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
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| 69 | + vstmiane \base!, {d16-d31} |
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| 57 | 70 | addeq \base, \base, #32*4 @ step over unused register space |
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| 58 | 71 | #else |
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| 59 | 72 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 |
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| 60 | 73 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field |
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| 61 | 74 | cmp \tmp, #2 @ 32 x 64bit registers? |
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| 62 | | - stcleq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} |
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| 75 | + vstmiaeq \base!, {d16-d31} |
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| 63 | 76 | addne \base, \base, #32*4 @ step over unused register space |
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| 64 | 77 | #endif |
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| 65 | 78 | #endif |
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