add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/include/asm/cacheflush.h
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@@ -1,11 +1,8 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  *  arch/arm/include/asm/cacheflush.h
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  *
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  *  Copyright (C) 1999-2002 Russell King
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #ifndef _ASMARM_CACHEFLUSH_H
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 #define _ASMARM_CACHEFLUSH_H
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@@ -261,11 +258,11 @@
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 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
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 /*
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- * flush_cache_user_range is used when we want to ensure that the
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+ * flush_icache_user_range is used when we want to ensure that the
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  * Harvard caches are synchronised for the user space address range.
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  * This is used for the ARM private sys_cacheflush system call.
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  */
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-#define flush_cache_user_range(s,e)	__cpuc_coherent_user_range(s,e)
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+#define flush_icache_user_range(s,e)	__cpuc_coherent_user_range(s,e)
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 /*
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  * Perform necessary cache operations to ensure that data previously
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@@ -320,9 +317,6 @@
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 #define flush_dcache_mmap_lock(mapping)		xa_lock_irq(&mapping->i_pages)
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 #define flush_dcache_mmap_unlock(mapping)	xa_unlock_irq(&mapping->i_pages)
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-
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-#define flush_icache_user_range(vma,page,addr,len) \
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-	flush_dcache_page(page)
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 /*
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  * We don't appear to need to do anything here.  In fact, if we did, we'd
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@@ -479,4 +473,11 @@
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 void flush_uprobe_xol_access(struct page *page, unsigned long uaddr,
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 			     void *kaddr, unsigned long len);
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+
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+#ifdef CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND
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+void check_cpu_icache_size(int cpuid);
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+#else
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+static inline void check_cpu_icache_size(int cpuid) { }
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+#endif
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+
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 #endif