add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/include/asm/assembler.h
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@@ -1,11 +1,8 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  *  arch/arm/include/asm/assembler.h
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  *
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  *  Copyright (C) 1996-2000 Russell King
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  *
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  *  This file contains arm architecture specific defines
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  *  for the different processors.
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@@ -107,6 +104,16 @@
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 	.macro	enable_irq_notrace
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 	msr	cpsr_c, #SVC_MODE
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+	.endm
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+#endif
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+
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+#if __LINUX_ARM_ARCH__ < 7
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+	.macro	dsb, args
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+	mcr	p15, 0, r0, c7, c10, 4
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+	.endm
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+
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+	.macro	isb, args
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+	mcr	p15, 0, r0, c7, c5, 4
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 	.endm
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 #endif
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@@ -243,12 +250,14 @@
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 	.endm
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 #endif
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-#define USER(x...)				\
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+#define USERL(l, x...)				\
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 9999:	x;					\
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 	.pushsection __ex_table,"a";		\
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 	.align	3;				\
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-	.long	9999b,9001f;			\
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+	.long	9999b,l;			\
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 	.popsection
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+
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+#define USER(x...)	USERL(9001f, x)
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 #ifdef CONFIG_SMP
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 #define ALT_SMP(instr...)					\
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@@ -270,10 +279,9 @@
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 	.endif							;\
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 	.popsection
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 #define ALT_UP_B(label)					\
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-	.equ	up_b_offset, label - 9998b			;\
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 	.pushsection ".alt.smp.init", "a"			;\
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 	.long	9998b						;\
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-	W(b)	. + up_b_offset					;\
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+	W(b)	. + (label - 9998b)					;\
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 	.popsection
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 #else
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 #define ALT_SMP(instr...)
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@@ -496,4 +504,105 @@
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 #define _ASM_NOKPROBE(entry)
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 #endif
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+	.macro		__adldst_l, op, reg, sym, tmp, c
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+	.if		__LINUX_ARM_ARCH__ < 7
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+	ldr\c		\tmp, .La\@
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+	.subsection	1
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+	.align		2
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+.La\@:	.long		\sym - .Lpc\@
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+	.previous
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+	.else
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+	.ifnb		\c
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+ THUMB(	ittt		\c			)
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+	.endif
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+	movw\c		\tmp, #:lower16:\sym - .Lpc\@
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+	movt\c		\tmp, #:upper16:\sym - .Lpc\@
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+	.endif
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+
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+#ifndef CONFIG_THUMB2_KERNEL
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+	.set		.Lpc\@, . + 8			// PC bias
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+	.ifc		\op, add
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+	add\c		\reg, \tmp, pc
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+	.else
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+	\op\c		\reg, [pc, \tmp]
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+	.endif
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+#else
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+.Lb\@:	add\c		\tmp, \tmp, pc
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+	/*
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+	 * In Thumb-2 builds, the PC bias depends on whether we are currently
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+	 * emitting into a .arm or a .thumb section. The size of the add opcode
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+	 * above will be 2 bytes when emitting in Thumb mode and 4 bytes when
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+	 * emitting in ARM mode, so let's use this to account for the bias.
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+	 */
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+	.set		.Lpc\@, . + (. - .Lb\@)
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+
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+	.ifnc		\op, add
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+	\op\c		\reg, [\tmp]
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+	.endif
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+#endif
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+	.endm
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+
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+	/*
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+	 * mov_l - move a constant value or [relocated] address into a register
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+	 */
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+	.macro		mov_l, dst:req, imm:req
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+	.if		__LINUX_ARM_ARCH__ < 7
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+	ldr		\dst, =\imm
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+	.else
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+	movw		\dst, #:lower16:\imm
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+	movt		\dst, #:upper16:\imm
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+	.endif
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+	.endm
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+
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+	/*
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+	 * adr_l - adr pseudo-op with unlimited range
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+	 *
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+	 * @dst: destination register
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+	 * @sym: name of the symbol
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+	 * @cond: conditional opcode suffix
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+	 */
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+	.macro		adr_l, dst:req, sym:req, cond
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+	__adldst_l	add, \dst, \sym, \dst, \cond
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+	.endm
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+
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+	/*
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+	 * ldr_l - ldr <literal> pseudo-op with unlimited range
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+	 *
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+	 * @dst: destination register
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+	 * @sym: name of the symbol
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+	 * @cond: conditional opcode suffix
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+	 */
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+	.macro		ldr_l, dst:req, sym:req, cond
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+	__adldst_l	ldr, \dst, \sym, \dst, \cond
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+	.endm
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+
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+	/*
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+	 * str_l - str <literal> pseudo-op with unlimited range
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+	 *
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+	 * @src: source register
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+	 * @sym: name of the symbol
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+	 * @tmp: mandatory scratch register
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+	 * @cond: conditional opcode suffix
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+	 */
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+	.macro		str_l, src:req, sym:req, tmp:req, cond
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+	__adldst_l	str, \src, \sym, \tmp, \cond
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+	.endm
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+
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+	/*
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+	 * rev_l - byte-swap a 32-bit value
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+	 *
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+	 * @val: source/destination register
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+	 * @tmp: scratch register
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+	 */
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+	.macro		rev_l, val:req, tmp:req
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+	.if		__LINUX_ARM_ARCH__ < 6
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+	eor		\tmp, \val, \val, ror #16
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+	bic		\tmp, \tmp, #0x00ff0000
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+	mov		\val, \val, ror #8
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+	eor		\val, \val, \tmp, lsr #8
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+	.else
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+	rev		\val, \val
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+	.endif
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+	.endm
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+
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 #endif /* __ASM_ASSEMBLER_H__ */