add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
..
..
@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0
1
2
 /*
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  * ARM Ltd. Versatile Express
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  *
..
..
@@ -18,8 +19,89 @@
18
19
  */
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20
 
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 / {
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-	smb@8000000 {
22
-		motherboard {
22
+	v2m_fixed_3v3: fixed-regulator-0 {
23
+		compatible = "regulator-fixed";
24
+		regulator-name = "3V3";
25
+		regulator-min-microvolt = <3300000>;
26
+		regulator-max-microvolt = <3300000>;
27
+		regulator-always-on;
28
+	};
29
+
30
+	v2m_clk24mhz: clk24mhz {
31
+		compatible = "fixed-clock";
32
+		#clock-cells = <0>;
33
+		clock-frequency = <24000000>;
34
+		clock-output-names = "v2m:clk24mhz";
35
+	};
36
+
37
+	v2m_refclk1mhz: refclk1mhz {
38
+		compatible = "fixed-clock";
39
+		#clock-cells = <0>;
40
+		clock-frequency = <1000000>;
41
+		clock-output-names = "v2m:refclk1mhz";
42
+	};
43
+
44
+	v2m_refclk32khz: refclk32khz {
45
+		compatible = "fixed-clock";
46
+		#clock-cells = <0>;
47
+		clock-frequency = <32768>;
48
+		clock-output-names = "v2m:refclk32khz";
49
+	};
50
+
51
+	leds {
52
+		compatible = "gpio-leds";
53
+
54
+		led-1 {
55
+			label = "v2m:green:user1";
56
+			gpios = <&v2m_led_gpios 0 0>;
57
+			linux,default-trigger = "heartbeat";
58
+		};
59
+
60
+		led-2 {
61
+			label = "v2m:green:user2";
62
+			gpios = <&v2m_led_gpios 1 0>;
63
+			linux,default-trigger = "disk-activity";
64
+		};
65
+
66
+		led-3 {
67
+			label = "v2m:green:user3";
68
+			gpios = <&v2m_led_gpios 2 0>;
69
+			linux,default-trigger = "cpu0";
70
+		};
71
+
72
+		led-4 {
73
+			label = "v2m:green:user4";
74
+			gpios = <&v2m_led_gpios 3 0>;
75
+			linux,default-trigger = "cpu1";
76
+		};
77
+
78
+		led-5 {
79
+			label = "v2m:green:user5";
80
+			gpios = <&v2m_led_gpios 4 0>;
81
+			linux,default-trigger = "cpu2";
82
+		};
83
+
84
+		led-6 {
85
+			label = "v2m:green:user6";
86
+			gpios = <&v2m_led_gpios 5 0>;
87
+			linux,default-trigger = "cpu3";
88
+		};
89
+
90
+		led-7 {
91
+			label = "v2m:green:user7";
92
+			gpios = <&v2m_led_gpios 6 0>;
93
+			linux,default-trigger = "cpu4";
94
+		};
95
+
96
+		led-8 {
97
+			label = "v2m:green:user8";
98
+			gpios = <&v2m_led_gpios 7 0>;
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+			linux,default-trigger = "cpu5";
100
+		};
101
+	};
102
+
103
+	bus@8000000 {
104
+		motherboard-bus {
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 			model = "V2M-P1";
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 			arm,hbi = <0x190>;
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 			arm,vexpress,site = <0>;
..
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@@ -30,25 +112,23 @@
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 			#interrupt-cells = <1>;
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 			ranges;
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-			flash@0,00000000 {
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+			nor_flash: flash@0 {
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116
 				compatible = "arm,vexpress-flash", "cfi-flash";
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 				reg = <0 0x00000000 0x04000000>,
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 				      <4 0x00000000 0x04000000>;
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 				bank-width = <4>;
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+				partitions {
121
+					compatible = "arm,arm-firmware-suite";
122
+				};
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 			};
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124
 
40
-			psram@1,00000000 {
125
+			psram@100000000 {
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126
 				compatible = "arm,vexpress-psram", "mtd-ram";
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127
 				reg = <1 0x00000000 0x02000000>;
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 				bank-width = <4>;
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129
 			};
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130
 
46
-			v2m_video_ram: vram@2,00000000 {
47
-				compatible = "arm,vexpress-vram";
48
-				reg = <2 0x00000000 0x00800000>;
49
-			};
50
-
51
-			ethernet@2,02000000 {
131
+			ethernet@202000000 {
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132
 				compatible = "smsc,lan9118", "smsc,lan9115";
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133
 				reg = <2 0x02000000 0x10000>;
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134
 				interrupts = <15>;
..
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@@ -60,14 +140,14 @@
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 				vddvario-supply = <&v2m_fixed_3v3>;
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141
 			};
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142
 
63
-			usb@2,03000000 {
143
+			usb@203000000 {
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144
 				compatible = "nxp,usb-isp1761";
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 				reg = <2 0x03000000 0x20000>;
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146
 				interrupts = <16>;
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147
 				port1-otg;
68
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 			};
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149
 
70
-			iofpga@3,00000000 {
150
+			iofpga-bus@300000000 {
71
151
 				compatible = "simple-bus";
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152
 				#address-cells = <1>;
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153
 				#size-cells = <1>;
..
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@@ -138,7 +218,7 @@
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 				mmci@50000 {
139
219
 					compatible = "arm,pl180", "arm,primecell";
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 					reg = <0x050000 0x1000>;
141
-					interrupts = <9 10>;
221
+					interrupts = <9>, <10>;
142
222
 					cd-gpios = <&v2m_mmc_gpios 0 0>;
143
223
 					wp-gpios = <&v2m_mmc_gpios 1 0>;
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224
 					max-frequency = <12000000>;
..
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@@ -163,7 +243,7 @@
163
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 					clock-names = "KMIREFCLK", "apb_pclk";
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 				};
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245
 
166
-				v2m_serial0: uart@90000 {
246
+				v2m_serial0: serial@90000 {
167
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 					compatible = "arm,pl011", "arm,primecell";
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 					reg = <0x090000 0x1000>;
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 					interrupts = <5>;
..
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@@ -171,7 +251,7 @@
171
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 					clock-names = "uartclk", "apb_pclk";
172
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 				};
173
253
 
174
-				v2m_serial1: uart@a0000 {
254
+				v2m_serial1: serial@a0000 {
175
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 					compatible = "arm,pl011", "arm,primecell";
176
256
 					reg = <0x0a0000 0x1000>;
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257
 					interrupts = <6>;
..
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@@ -179,7 +259,7 @@
179
259
 					clock-names = "uartclk", "apb_pclk";
180
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 				};
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261
 
182
-				v2m_serial2: uart@b0000 {
262
+				v2m_serial2: serial@b0000 {
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263
 					compatible = "arm,pl011", "arm,primecell";
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 					reg = <0x0b0000 0x1000>;
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 					interrupts = <7>;
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@@ -187,7 +267,7 @@
187
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 					clock-names = "uartclk", "apb_pclk";
188
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 				};
189
269
 
190
-				v2m_serial3: uart@c0000 {
270
+				v2m_serial3: serial@c0000 {
191
271
 					compatible = "arm,pl011", "arm,primecell";
192
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 					reg = <0x0c0000 0x1000>;
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273
 					interrupts = <8>;
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@@ -200,7 +280,7 @@
200
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 					reg = <0x0f0000 0x1000>;
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 					interrupts = <0>;
202
282
 					clocks = <&v2m_refclk32khz>, <&smbclk>;
203
-					clock-names = "wdogclk", "apb_pclk";
283
+					clock-names = "wdog_clk", "apb_pclk";
204
284
 				};
205
285
 
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286
 				v2m_timer01: timer@110000 {
..
..
@@ -223,13 +303,24 @@
223
303
 				v2m_i2c_dvi: i2c@160000 {
224
304
 					compatible = "arm,versatile-i2c";
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 					reg = <0x160000 0x1000>;
226
-
227
306
 					#address-cells = <1>;
228
307
 					#size-cells = <0>;
229
308
 
230
309
 					dvi-transmitter@39 {
231
310
 						compatible = "sil,sii9022-tpi", "sil,sii9022";
232
311
 						reg = <0x39>;
312
+
313
+						ports {
314
+							#address-cells = <1>;
315
+							#size-cells = <0>;
316
+
317
+							port@0 {
318
+								reg = <0>;
319
+								dvi_bridge_in: endpoint {
320
+									remote-endpoint = <&clcd_pads>;
321
+								};
322
+							};
323
+						};
233
324
 					};
234
325
 
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 					dvi-transmitter@60 {
..
..
@@ -260,191 +351,89 @@
260
351
 					interrupts = <14>;
261
352
 					clocks = <&v2m_oscclk1>, <&smbclk>;
262
353
 					clock-names = "clcdclk", "apb_pclk";
263
-					memory-region = <&v2m_video_ram>;
264
-					max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
354
+					/* 800x600 16bpp @36MHz works fine */
355
+					max-memory-bandwidth = <54000000>;
356
+					memory-region = <&vram>;
265
357
 
266
358
 					port {
267
-						v2m_clcd_pads: endpoint {
268
-							remote-endpoint = <&v2m_clcd_panel>;
359
+						clcd_pads: endpoint {
360
+							remote-endpoint = <&dvi_bridge_in>;
269
361
 							arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
270
362
 						};
271
363
 					};
364
+				};
272
365
 
273
-					panel {
274
-						compatible = "panel-dpi";
366
+				mcc {
367
+					compatible = "arm,vexpress,config-bus";
368
+					arm,vexpress,config-bridge = <&v2m_sysreg>;
275
369
 
276
-						port {
277
-							v2m_clcd_panel: endpoint {
278
-								remote-endpoint = <&v2m_clcd_pads>;
279
-							};
280
-						};
281
-
282
-						panel-timing {
283
-							clock-frequency = <25175000>;
284
-							hactive = <640>;
285
-							hback-porch = <40>;
286
-							hfront-porch = <24>;
287
-							hsync-len = <96>;
288
-							vactive = <480>;
289
-							vback-porch = <32>;
290
-							vfront-porch = <11>;
291
-							vsync-len = <2>;
292
-						};
370
+					oscclk0 {
371
+						/* MCC static memory clock */
372
+						compatible = "arm,vexpress-osc";
373
+						arm,vexpress-sysreg,func = <1 0>;
374
+						freq-range = <25000000 60000000>;
375
+						#clock-cells = <0>;
376
+						clock-output-names = "v2m:oscclk0";
293
377
 					};
294
-				};
295
-			};
296
378
 
297
-			v2m_fixed_3v3: fixed-regulator-0 {
298
-				compatible = "regulator-fixed";
299
-				regulator-name = "3V3";
300
-				regulator-min-microvolt = <3300000>;
301
-				regulator-max-microvolt = <3300000>;
302
-				regulator-always-on;
303
-			};
379
+					v2m_oscclk1: oscclk1 {
380
+						/* CLCD clock */
381
+						compatible = "arm,vexpress-osc";
382
+						arm,vexpress-sysreg,func = <1 1>;
383
+						freq-range = <23750000 65000000>;
384
+						#clock-cells = <0>;
385
+						clock-output-names = "v2m:oscclk1";
386
+					};
304
387
 
305
-			v2m_clk24mhz: clk24mhz {
306
-				compatible = "fixed-clock";
307
-				#clock-cells = <0>;
308
-				clock-frequency = <24000000>;
309
-				clock-output-names = "v2m:clk24mhz";
310
-			};
388
+					v2m_oscclk2: oscclk2 {
389
+						/* IO FPGA peripheral clock */
390
+						compatible = "arm,vexpress-osc";
391
+						arm,vexpress-sysreg,func = <1 2>;
392
+						freq-range = <24000000 24000000>;
393
+						#clock-cells = <0>;
394
+						clock-output-names = "v2m:oscclk2";
395
+					};
311
396
 
312
-			v2m_refclk1mhz: refclk1mhz {
313
-				compatible = "fixed-clock";
314
-				#clock-cells = <0>;
315
-				clock-frequency = <1000000>;
316
-				clock-output-names = "v2m:refclk1mhz";
317
-			};
397
+					volt-vio {
398
+						/* Logic level voltage */
399
+						compatible = "arm,vexpress-volt";
400
+						arm,vexpress-sysreg,func = <2 0>;
401
+						regulator-name = "VIO";
402
+						regulator-always-on;
403
+						label = "VIO";
404
+					};
318
405
 
319
-			v2m_refclk32khz: refclk32khz {
320
-				compatible = "fixed-clock";
321
-				#clock-cells = <0>;
322
-				clock-frequency = <32768>;
323
-				clock-output-names = "v2m:refclk32khz";
324
-			};
406
+					temp-mcc {
407
+						/* MCC internal operating temperature */
408
+						compatible = "arm,vexpress-temp";
409
+						arm,vexpress-sysreg,func = <4 0>;
410
+						label = "MCC";
411
+					};
325
412
 
326
-			leds {
327
-				compatible = "gpio-leds";
413
+					reset {
414
+						compatible = "arm,vexpress-reset";
415
+						arm,vexpress-sysreg,func = <5 0>;
416
+					};
328
417
 
329
-				user1 {
330
-					label = "v2m:green:user1";
331
-					gpios = <&v2m_led_gpios 0 0>;
332
-					linux,default-trigger = "heartbeat";
333
-				};
418
+					muxfpga {
419
+						compatible = "arm,vexpress-muxfpga";
420
+						arm,vexpress-sysreg,func = <7 0>;
421
+					};
334
422
 
335
-				user2 {
336
-					label = "v2m:green:user2";
337
-					gpios = <&v2m_led_gpios 1 0>;
338
-					linux,default-trigger = "mmc0";
339
-				};
423
+					shutdown {
424
+						compatible = "arm,vexpress-shutdown";
425
+						arm,vexpress-sysreg,func = <8 0>;
426
+					};
340
427
 
341
-				user3 {
342
-					label = "v2m:green:user3";
343
-					gpios = <&v2m_led_gpios 2 0>;
344
-					linux,default-trigger = "cpu0";
345
-				};
428
+					reboot {
429
+						compatible = "arm,vexpress-reboot";
430
+						arm,vexpress-sysreg,func = <9 0>;
431
+					};
346
432
 
347
-				user4 {
348
-					label = "v2m:green:user4";
349
-					gpios = <&v2m_led_gpios 3 0>;
350
-					linux,default-trigger = "cpu1";
351
-				};
352
-
353
-				user5 {
354
-					label = "v2m:green:user5";
355
-					gpios = <&v2m_led_gpios 4 0>;
356
-					linux,default-trigger = "cpu2";
357
-				};
358
-
359
-				user6 {
360
-					label = "v2m:green:user6";
361
-					gpios = <&v2m_led_gpios 5 0>;
362
-					linux,default-trigger = "cpu3";
363
-				};
364
-
365
-				user7 {
366
-					label = "v2m:green:user7";
367
-					gpios = <&v2m_led_gpios 6 0>;
368
-					linux,default-trigger = "cpu4";
369
-				};
370
-
371
-				user8 {
372
-					label = "v2m:green:user8";
373
-					gpios = <&v2m_led_gpios 7 0>;
374
-					linux,default-trigger = "cpu5";
375
-				};
376
-			};
377
-
378
-			mcc {
379
-				compatible = "arm,vexpress,config-bus";
380
-				arm,vexpress,config-bridge = <&v2m_sysreg>;
381
-
382
-				oscclk0 {
383
-					/* MCC static memory clock */
384
-					compatible = "arm,vexpress-osc";
385
-					arm,vexpress-sysreg,func = <1 0>;
386
-					freq-range = <25000000 60000000>;
387
-					#clock-cells = <0>;
388
-					clock-output-names = "v2m:oscclk0";
389
-				};
390
-
391
-				v2m_oscclk1: oscclk1 {
392
-					/* CLCD clock */
393
-					compatible = "arm,vexpress-osc";
394
-					arm,vexpress-sysreg,func = <1 1>;
395
-					freq-range = <23750000 65000000>;
396
-					#clock-cells = <0>;
397
-					clock-output-names = "v2m:oscclk1";
398
-				};
399
-
400
-				v2m_oscclk2: oscclk2 {
401
-					/* IO FPGA peripheral clock */
402
-					compatible = "arm,vexpress-osc";
403
-					arm,vexpress-sysreg,func = <1 2>;
404
-					freq-range = <24000000 24000000>;
405
-					#clock-cells = <0>;
406
-					clock-output-names = "v2m:oscclk2";
407
-				};
408
-
409
-				volt-vio {
410
-					/* Logic level voltage */
411
-					compatible = "arm,vexpress-volt";
412
-					arm,vexpress-sysreg,func = <2 0>;
413
-					regulator-name = "VIO";
414
-					regulator-always-on;
415
-					label = "VIO";
416
-				};
417
-
418
-				temp-mcc {
419
-					/* MCC internal operating temperature */
420
-					compatible = "arm,vexpress-temp";
421
-					arm,vexpress-sysreg,func = <4 0>;
422
-					label = "MCC";
423
-				};
424
-
425
-				reset {
426
-					compatible = "arm,vexpress-reset";
427
-					arm,vexpress-sysreg,func = <5 0>;
428
-				};
429
-
430
-				muxfpga {
431
-					compatible = "arm,vexpress-muxfpga";
432
-					arm,vexpress-sysreg,func = <7 0>;
433
-				};
434
-
435
-				shutdown {
436
-					compatible = "arm,vexpress-shutdown";
437
-					arm,vexpress-sysreg,func = <8 0>;
438
-				};
439
-
440
-				reboot {
441
-					compatible = "arm,vexpress-reboot";
442
-					arm,vexpress-sysreg,func = <9 0>;
443
-				};
444
-
445
-				dvimode {
446
-					compatible = "arm,vexpress-dvimode";
447
-					arm,vexpress-sysreg,func = <11 0>;
433
+					dvimode {
434
+						compatible = "arm,vexpress-dvimode";
435
+						arm,vexpress-sysreg,func = <11 0>;
436
+					};
448
437
 				};
449
438
 			};
450
439
 		};