add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
..
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@@ -163,7 +163,7 @@
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 				st,bank-name = "GPIOK";
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 			};
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-			usart1_pins_a: usart1@0 {
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+			usart1_pins_a: usart1-0 {
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 				pins1 {
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 					pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
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 					bias-disable;
..
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@@ -176,7 +176,7 @@
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 				};
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 			};
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-			usart3_pins_a: usart3@0 {
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+			usart3_pins_a: usart3-0 {
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 				pins1 {
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 					pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
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 					bias-disable;
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@@ -189,7 +189,7 @@
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 				};
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 			};
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-			usbotg_fs_pins_a: usbotg_fs@0 {
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+			usbotg_fs_pins_a: usbotg-fs-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
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 						 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
..
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@@ -200,7 +200,7 @@
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 				};
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 			};
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-			usbotg_fs_pins_b: usbotg_fs@1 {
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+			usbotg_fs_pins_b: usbotg-fs-1 {
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 				pins {
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 					pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
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 						 <STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
..
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@@ -211,7 +211,7 @@
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 				};
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 			};
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-			usbotg_hs_pins_a: usbotg_hs@0 {
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+			usbotg_hs_pins_a: usbotg-hs-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/
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 						 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
..
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@@ -231,7 +231,7 @@
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 				};
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 			};
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-			ethernet_mii: mii@0 {
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+			ethernet_mii: mii-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
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 						 <STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
..
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@@ -251,13 +251,13 @@
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 				};
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 			};
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253
 
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-			adc3_in8_pin: adc@200 {
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+			adc3_in8_pin: adc-200 {
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 				pins {
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 					pinmux = <STM32_PINMUX('F', 10, ANALOG)>;
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 				};
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 			};
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259
 
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-			pwm1_pins: pwm@1 {
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+			pwm1_pins: pwm1-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */
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 						 <STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
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@@ -265,14 +265,14 @@
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 				};
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 			};
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-			pwm3_pins: pwm@3 {
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+			pwm3_pins: pwm3-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */
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 						 <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
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 				};
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 			};
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-			i2c1_pins: i2c1@0 {
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+			i2c1_pins: i2c1-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */
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 						 <STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
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@@ -282,7 +282,7 @@
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 				};
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 			};
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-			ltdc_pins: ltdc@0 {
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+			ltdc_pins_a: ltdc-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
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 						 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
..
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@@ -316,7 +316,86 @@
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 				};
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 			};
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-			dcmi_pins: dcmi@0 {
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+			ltdc_pins_b: ltdc-1 {
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+				pins {
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+					pinmux = <STM32_PINMUX('C', 6,  AF14)>,
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+						/* LCD_HSYNC */
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+						 <STM32_PINMUX('A', 4,  AF14)>,
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+						 /* LCD_VSYNC */
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+						 <STM32_PINMUX('G', 7,  AF14)>,
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+						 /* LCD_CLK */
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+						 <STM32_PINMUX('C', 10, AF14)>,
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+						 /* LCD_R2 */
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+						 <STM32_PINMUX('B', 0,  AF9)>,
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+						 /* LCD_R3 */
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+						 <STM32_PINMUX('A', 11, AF14)>,
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+						 /* LCD_R4 */
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+						 <STM32_PINMUX('A', 12, AF14)>,
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+						 /* LCD_R5 */
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+						 <STM32_PINMUX('B', 1,  AF9)>,
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+						 /* LCD_R6*/
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+						 <STM32_PINMUX('G', 6,  AF14)>,
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+						 /* LCD_R7 */
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+						 <STM32_PINMUX('A', 6,  AF14)>,
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+						 /* LCD_G2 */
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+						 <STM32_PINMUX('G', 10, AF9)>,
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+						 /* LCD_G3 */
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+						 <STM32_PINMUX('B', 10, AF14)>,
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+						 /* LCD_G4 */
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+						 <STM32_PINMUX('D', 6,  AF14)>,
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+						 /* LCD_B2 */
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+						 <STM32_PINMUX('G', 11, AF14)>,
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+						 /* LCD_B3*/
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+						 <STM32_PINMUX('B', 11, AF14)>,
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+						 /* LCD_G5 */
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+						 <STM32_PINMUX('C', 7,  AF14)>,
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+						 /* LCD_G6 */
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+						 <STM32_PINMUX('D', 3,  AF14)>,
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+						 /* LCD_G7 */
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+						 <STM32_PINMUX('G', 12, AF9)>,
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+						 /* LCD_B4 */
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+						 <STM32_PINMUX('A', 3,  AF14)>,
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+						 /* LCD_B5 */
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+						 <STM32_PINMUX('B', 8,  AF14)>,
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+						 /* LCD_B6 */
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+						 <STM32_PINMUX('B', 9,  AF14)>,
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+						 /* LCD_B7 */
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+						 <STM32_PINMUX('F', 10, AF14)>;
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+						 /* LCD_DE */
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+					slew-rate = <2>;
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+				};
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+			};
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+
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+			spi5_pins: spi5-0 {
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+				pins1 {
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+					pinmux = <STM32_PINMUX('F', 7, AF5)>,
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+						/* SPI5_CLK */
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+						 <STM32_PINMUX('F', 9, AF5)>;
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+						/* SPI5_MOSI */
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+					bias-disable;
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+					drive-push-pull;
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+					slew-rate = <0>;
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+				};
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+				pins2 {
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+					pinmux = <STM32_PINMUX('F', 8, AF5)>;
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+						/* SPI5_MISO */
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+					bias-disable;
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+				};
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+			};
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+
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+			i2c3_pins: i2c3-0 {
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+				pins {
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+					pinmux = <STM32_PINMUX('C', 9, AF4)>,
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+						/* I2C3_SDA */
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+						 <STM32_PINMUX('A', 8, AF4)>;
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+						/* I2C3_SCL */
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+					bias-disable;
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+					drive-open-drain;
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+					slew-rate = <3>;
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+				};
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+			};
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+
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+			dcmi_pins: dcmi-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('A', 4, AF13)>, /* DCMI_HSYNC */
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 						 <STM32_PINMUX('B', 7, AF13)>, /* DCMI_VSYNC */
..
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@@ -339,7 +418,7 @@
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 				};
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 			};
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-			sdio_pins: sdio_pins@0 {
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+			sdio_pins: sdio-pins-0 {
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 				pins {
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 					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
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 						 <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
..
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@@ -352,7 +431,7 @@
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 				};
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 			};
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-			sdio_pins_od: sdio_pins_od@0 {
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+			sdio_pins_od: sdio-pins-od-0 {
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 				pins1 {
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 					pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
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 						 <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */