forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2
kernel/arch/arm/boot/dts/s5pv210.dtsi
....@@ -25,6 +25,8 @@
2525
2626 aliases {
2727 csis0 = &csis0;
28
+ dmc0 = &dmc0;
29
+ dmc1 = &dmc1;
2830 fimc0 = &fimc0;
2931 fimc1 = &fimc1;
3032 fimc2 = &fimc2;
....@@ -50,35 +52,27 @@
5052 };
5153 };
5254
55
+ xxti: oscillator-0 {
56
+ compatible = "fixed-clock";
57
+ clock-frequency = <0>;
58
+ clock-output-names = "xxti";
59
+ #clock-cells = <0>;
60
+ };
61
+
62
+ xusbxti: oscillator-1 {
63
+ compatible = "fixed-clock";
64
+ clock-frequency = <0>;
65
+ clock-output-names = "xusbxti";
66
+ #clock-cells = <0>;
67
+ };
68
+
5369 soc {
5470 compatible = "simple-bus";
5571 #address-cells = <1>;
5672 #size-cells = <1>;
5773 ranges;
5874
59
- external-clocks {
60
- compatible = "simple-bus";
61
- #address-cells = <1>;
62
- #size-cells = <0>;
63
-
64
- xxti: oscillator@0 {
65
- compatible = "fixed-clock";
66
- reg = <0>;
67
- clock-frequency = <0>;
68
- clock-output-names = "xxti";
69
- #clock-cells = <0>;
70
- };
71
-
72
- xusbxti: oscillator@1 {
73
- compatible = "fixed-clock";
74
- reg = <1>;
75
- clock-frequency = <0>;
76
- clock-output-names = "xusbxti";
77
- #clock-cells = <0>;
78
- };
79
- };
80
-
81
- onenand: onenand@b0000000 {
75
+ onenand: onenand@b0600000 {
8276 compatible = "samsung,s5pv210-onenand";
8377 reg = <0xb0600000 0x2000>,
8478 <0xb0000000 0x20000>,
....@@ -117,7 +111,7 @@
117111 interrupts = <30>;
118112
119113 wakeup-interrupt-controller {
120
- compatible = "samsung,exynos4210-wakeup-eint";
114
+ compatible = "samsung,s5pv210-wakeup-eint";
121115 interrupts = <16>;
122116 interrupt-parent = <&vic0>;
123117 };
....@@ -145,6 +139,18 @@
145139 #dma-cells = <1>;
146140 #dma-channels = <8>;
147141 #dma-requests = <32>;
142
+ };
143
+
144
+ adc: adc@e1700000 {
145
+ compatible = "samsung,s5pv210-adc";
146
+ reg = <0xe1700000 0x1000>;
147
+ interrupt-parent = <&vic2>;
148
+ interrupts = <23>, <24>;
149
+ clocks = <&clocks CLK_TSADC>;
150
+ clock-names = "adc";
151
+ #io-channel-cells = <1>;
152
+ io-channel-ranges;
153
+ status = "disabled";
148154 };
149155
150156 spi0: spi@e1300000 {
....@@ -234,8 +240,8 @@
234240 reg = <0xeee30000 0x1000>;
235241 interrupt-parent = <&vic2>;
236242 interrupts = <16>;
237
- dma-names = "rx", "tx", "tx-sec";
238
- dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
243
+ dma-names = "tx", "rx", "tx-sec";
244
+ dmas = <&pdma1 10>, <&pdma1 9>, <&pdma1 11>;
239245 clock-names = "iis",
240246 "i2s_opclk0",
241247 "i2s_opclk1";
....@@ -254,8 +260,8 @@
254260 reg = <0xe2100000 0x1000>;
255261 interrupt-parent = <&vic2>;
256262 interrupts = <17>;
257
- dma-names = "rx", "tx";
258
- dmas = <&pdma1 12>, <&pdma1 13>;
263
+ dma-names = "tx", "rx";
264
+ dmas = <&pdma1 13>, <&pdma1 12>;
259265 clock-names = "iis", "i2s_opclk0";
260266 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
261267 pinctrl-names = "default";
....@@ -269,8 +275,8 @@
269275 reg = <0xe2a00000 0x1000>;
270276 interrupt-parent = <&vic2>;
271277 interrupts = <18>;
272
- dma-names = "rx", "tx";
273
- dmas = <&pdma1 14>, <&pdma1 15>;
278
+ dma-names = "tx", "rx";
279
+ dmas = <&pdma1 15>, <&pdma1 14>;
274280 clock-names = "iis", "i2s_opclk0";
275281 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
276282 pinctrl-names = "default";
....@@ -494,7 +500,7 @@
494500 };
495501
496502 fimd: fimd@f8000000 {
497
- compatible = "samsung,exynos4210-fimd";
503
+ compatible = "samsung,s5pv210-fimd";
498504 interrupt-parent = <&vic2>;
499505 reg = <0xf8000000 0x20000>;
500506 interrupt-names = "fifo", "vsync", "lcd_sys";
....@@ -502,6 +508,16 @@
502508 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
503509 clock-names = "sclk_fimd", "fimd";
504510 status = "disabled";
511
+ };
512
+
513
+ dmc0: dmc@f0000000 {
514
+ compatible = "samsung,s5pv210-dmc";
515
+ reg = <0xf0000000 0x1000>;
516
+ };
517
+
518
+ dmc1: dmc@f1400000 {
519
+ compatible = "samsung,s5pv210-dmc";
520
+ reg = <0xf1400000 0x1000>;
505521 };
506522
507523 g2d: g2d@fa000000 {
....@@ -523,6 +539,15 @@
523539 #dma-cells = <1>;
524540 #dma-channels = <8>;
525541 #dma-requests = <1>;
542
+ };
543
+
544
+ rotator: rotator@fa300000 {
545
+ compatible = "samsung,s5pv210-rotator";
546
+ reg = <0xfa300000 0x1000>;
547
+ interrupt-parent = <&vic2>;
548
+ interrupts = <4>;
549
+ clocks = <&clocks CLK_ROTATOR>;
550
+ clock-names = "rotator";
526551 };
527552
528553 i2c1: i2c@fab00000 {
....@@ -547,11 +572,9 @@
547572 clock-names = "sclk_cam0", "sclk_cam1";
548573 #address-cells = <1>;
549574 #size-cells = <1>;
575
+ #clock-cells = <1>;
576
+ clock-output-names = "cam_a_clkout", "cam_b_clkout";
550577 ranges;
551
-
552
- clock_cam: clock-controller {
553
- #clock-cells = <1>;
554
- };
555578
556579 csis0: csis@fa600000 {
557580 compatible = "samsung,s5pv210-csis";
....@@ -560,7 +583,7 @@
560583 interrupts = <29>;
561584 clocks = <&clocks CLK_CSIS>,
562585 <&clocks SCLK_CSIS>;
563
- clock-names = "clk_csis",
586
+ clock-names = "csis",
564587 "sclk_csis";
565588 bus-width = <4>;
566589 status = "disabled";
....@@ -578,7 +601,7 @@
578601 clock-names = "fimc",
579602 "sclk_fimc";
580603 samsung,pix-limits = <4224 8192 1920 4224>;
581
- samsung,mainscaler-ext;
604
+ samsung,min-pix-alignment = <16 8>;
582605 samsung,cam-if;
583606 };
584607
....@@ -592,8 +615,10 @@
592615 clock-names = "fimc",
593616 "sclk_fimc";
594617 samsung,pix-limits = <4224 8192 1920 4224>;
618
+ samsung,min-pix-alignment = <1 1>;
595619 samsung,mainscaler-ext;
596620 samsung,cam-if;
621
+ samsung,lcd-wb;
597622 };
598623
599624 fimc2: fimc@fb400000 {
....@@ -605,11 +630,21 @@
605630 <&clocks SCLK_FIMC2>;
606631 clock-names = "fimc",
607632 "sclk_fimc";
608
- samsung,pix-limits = <4224 8192 1920 4224>;
609
- samsung,mainscaler-ext;
610
- samsung,lcd-wb;
633
+ samsung,pix-limits = <1920 8192 1280 1920>;
634
+ samsung,min-pix-alignment = <16 8>;
635
+ samsung,rotators = <0>;
636
+ samsung,cam-if;
611637 };
612638 };
639
+
640
+ jpeg_codec: jpeg-codec@fb600000 {
641
+ compatible = "samsung,s5pv210-jpeg";
642
+ reg = <0xfb600000 0x1000>;
643
+ interrupt-parent = <&vic2>;
644
+ interrupts = <8>;
645
+ clocks = <&clocks CLK_JPEG>;
646
+ clock-names = "jpeg";
647
+ };
613648 };
614649 };
615650