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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | | - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License version 2 as |
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6 | | - * published by the Free Software Foundation. |
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| 3 | + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ |
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7 | 4 | */ |
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8 | 5 | /dts-v1/; |
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9 | 6 | |
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.. | .. |
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12 | 9 | |
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13 | 10 | / { |
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14 | 11 | model = "TI Zoom3"; |
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15 | | - compatible = "ti,omap3-zoom3", "ti,omap36xx", "ti,omap3"; |
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| 12 | + compatible = "ti,omap3-zoom3", "ti,omap3630", "ti,omap36xx", "ti,omap3"; |
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16 | 13 | |
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17 | 14 | cpus { |
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18 | 15 | cpu@0 { |
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.. | .. |
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26 | 23 | }; |
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27 | 24 | |
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28 | 25 | vddvario: regulator-vddvario { |
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29 | | - compatible = "regulator-fixed"; |
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30 | | - regulator-name = "vddvario"; |
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31 | | - regulator-always-on; |
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| 26 | + compatible = "regulator-fixed"; |
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| 27 | + regulator-name = "vddvario"; |
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| 28 | + regulator-always-on; |
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32 | 29 | }; |
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33 | 30 | |
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34 | 31 | vdd33a: regulator-vdd33a { |
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.. | .. |
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87 | 84 | |
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88 | 85 | uart1_pins: pinmux_uart1_pins { |
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89 | 86 | pinctrl-single,pins = < |
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90 | | - OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */ |
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91 | | - OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */ |
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92 | | - OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ |
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93 | | - OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ |
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| 87 | + OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */ |
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| 88 | + OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */ |
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| 89 | + OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ |
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| 90 | + OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ |
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94 | 91 | >; |
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95 | 92 | }; |
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96 | 93 | |
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97 | 94 | uart2_pins: pinmux_uart2_pins { |
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98 | 95 | pinctrl-single,pins = < |
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99 | | - OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ |
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100 | | - OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ |
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101 | | - OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ |
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102 | | - OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ |
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| 96 | + OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ |
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| 97 | + OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ |
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| 98 | + OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ |
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| 99 | + OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ |
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103 | 100 | >; |
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104 | 101 | }; |
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105 | 102 | |
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106 | 103 | uart3_pins: pinmux_uart3_pins { |
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107 | 104 | pinctrl-single,pins = < |
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108 | | - OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ |
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109 | | - OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ |
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110 | | - OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ |
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111 | | - OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ |
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| 105 | + OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ |
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| 106 | + OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ |
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| 107 | + OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ |
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| 108 | + OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ |
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112 | 109 | >; |
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113 | 110 | }; |
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114 | 111 | |
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.. | .. |
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208 | 205 | }; |
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209 | 206 | |
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210 | 207 | &uart1 { |
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211 | | - pinctrl-names = "default"; |
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212 | | - pinctrl-0 = <&uart1_pins>; |
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| 208 | + pinctrl-names = "default"; |
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| 209 | + pinctrl-0 = <&uart1_pins>; |
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213 | 210 | }; |
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214 | 211 | |
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215 | 212 | &uart2 { |
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216 | | - pinctrl-names = "default"; |
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217 | | - pinctrl-0 = <&uart2_pins>; |
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| 213 | + pinctrl-names = "default"; |
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| 214 | + pinctrl-0 = <&uart2_pins>; |
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218 | 215 | }; |
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219 | 216 | |
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220 | 217 | &uart3 { |
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221 | | - pinctrl-names = "default"; |
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222 | | - pinctrl-0 = <&uart3_pins>; |
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| 218 | + pinctrl-names = "default"; |
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| 219 | + pinctrl-0 = <&uart3_pins>; |
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223 | 220 | }; |
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224 | 221 | |
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225 | 222 | &uart4 { |
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226 | | - status = "disabled"; |
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| 223 | + status = "disabled"; |
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227 | 224 | }; |
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228 | 225 | |
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229 | 226 | &usb_otg_hs { |
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