add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/omap2.dtsi
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@@ -1,13 +1,14 @@
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 /*
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  * Device Tree Source for OMAP2 SoC
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  *
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- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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+ * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
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  *
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  * This file is licensed under the terms of the GNU General Public License
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  * version 2.  This program is licensed "as is" without any warranty of any
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  * kind, whether express or implied.
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  */
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+#include <dt-bindings/bus/ti-sysc.h>
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 #include <dt-bindings/gpio/gpio.h>
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 #include <dt-bindings/interrupt-controller/irq.h>
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 #include <dt-bindings/pinctrl/omap.h>
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@@ -79,17 +80,37 @@
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 			reg = <0x480FE000 0x1000>;
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 		};
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-		sdma: dma-controller@48056000 {
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-			compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
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-			ti,hwmods = "dma";
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-			reg = <0x48056000 0x1000>;
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-			interrupts = <12>,
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-				     <13>,
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-				     <14>,
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-				     <15>;
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-			#dma-cells = <1>;
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-			dma-channels = <32>;
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-			dma-requests = <64>;
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+		target-module@48056000 {
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+			compatible = "ti,sysc-omap2", "ti,sysc";
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+			reg = <0x48056000 0x4>,
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+			      <0x4805602c 0x4>,
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+			      <0x48056028 0x4>;
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+			reg-names = "rev", "sysc", "syss";
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+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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+					 SYSC_OMAP2_EMUFREE |
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+					 SYSC_OMAP2_SOFTRESET |
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+					 SYSC_OMAP2_AUTOIDLE)>;
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+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
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+					<SYSC_IDLE_NO>,
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+					<SYSC_IDLE_SMART>;
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+			ti,syss-mask = <1>;
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+			clocks = <&core_l3_ck>;
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+			clock-names = "fck";
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+			#address-cells = <1>;
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+			#size-cells = <1>;
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+			ranges = <0 0x48056000 0x1000>;
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+
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+			sdma: dma-controller@0 {
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+				compatible = "ti,omap2420-sdma", "ti,omap-sdma";
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+				reg = <0 0x1000>;
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+				interrupts = <12>,
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+					     <13>,
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+					     <14>,
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+					     <15>;
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+				#dma-cells = <1>;
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+				dma-channels = <32>;
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+				dma-requests = <64>;
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+			};
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 		};
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 		i2c1: i2c@48070000 {
..
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@@ -180,11 +201,32 @@
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 			clock-frequency = <48000000>;
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 		};
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-		timer2: timer@4802a000 {
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-			compatible = "ti,omap2420-timer";
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-			reg = <0x4802a000 0x400>;
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-			interrupts = <38>;
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-			ti,hwmods = "timer2";
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+		timer2_target: target-module@4802a000 {
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+			compatible = "ti,sysc-omap2-timer", "ti,sysc";
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+			reg = <0x4802a000 0x4>,
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+			      <0x4802a010 0x4>,
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+			      <0x4802a014 0x4>;
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+			reg-names = "rev", "sysc", "syss";
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+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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+					 SYSC_OMAP2_EMUFREE |
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+					 SYSC_OMAP2_ENAWAKEUP |
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+					 SYSC_OMAP2_SOFTRESET |
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+					 SYSC_OMAP2_AUTOIDLE)>;
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+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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+					<SYSC_IDLE_NO>,
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+					<SYSC_IDLE_SMART>;
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+			ti,syss-mask = <1>;
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+			clocks = <&gpt2_fck>, <&gpt2_ick>;
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+			clock-names = "fck", "ick";
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+			#address-cells = <1>;
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+			#size-cells = <1>;
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+			ranges = <0x0 0x4802a000 0x1000>;
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+
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+			timer2: timer@0 {
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+				compatible = "ti,omap2420-timer";
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+				reg = <0 0x400>;
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+				interrupts = <38>;
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+			};
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 		};
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 		timer3: timer@48078000 {