forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/arch/arm/boot/dts/imx7-colibri.dtsi
....@@ -1,43 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
12 /*
2
- * Copyright 2016 Toradex AG
3
- *
4
- * This file is dual-licensed: you can use it either under the terms
5
- * of the GPL or the X11 license, at your option. Note that this dual
6
- * licensing only applies to this file, and not this project as a
7
- * whole.
8
- *
9
- *  a) This file is free software; you can redistribute it and/or
10
- *     modify it under the terms of the GNU General Public License as
11
- *     published by the Free Software Foundation; either version 2 of the
12
- *     License, or (at your option) any later version.
13
- *
14
- *     This file is distributed in the hope that it will be useful,
15
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
- *     GNU General Public License for more details.
18
- *
19
- * Or, alternatively,
20
- *
21
- *  b) Permission is hereby granted, free of charge, to any person
22
- *     obtaining a copy of this software and associated documentation
23
- *     files (the "Software"), to deal in the Software without
24
- *     restriction, including without limitation the rights to use,
25
- *     copy, modify, merge, publish, distribute, sublicense, and/or
26
- *     sell copies of the Software, and to permit persons to whom the
27
- *     Software is furnished to do so, subject to the following
28
- *     conditions:
29
- *
30
- *     The above copyright notice and this permission notice shall be
31
- *     included in all copies or substantial portions of the Software.
32
- *
33
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40
- *     OTHER DEALINGS IN THE SOFTWARE.
3
+ * Copyright 2016-2020 Toradex
414  */
425 
436 / {
....@@ -54,6 +17,7 @@
5417 		regulator-name = "+V3.3";
5518 		regulator-min-microvolt = <3300000>;
5619 		regulator-max-microvolt = <3300000>;
20
+		regulator-always-on;
5721 	};
5822 
5923 	reg_module_3v3_avdd: regulator-module-3v3-avdd {
....@@ -61,6 +25,7 @@
6125 		regulator-name = "+V3.3_AVDD_AUDIO";
6226 		regulator-min-microvolt = <3300000>;
6327 		regulator-max-microvolt = <3300000>;
28
+		regulator-always-on;
6429 	};
6530 
6631 	sound {
....@@ -75,7 +40,7 @@
7540 
7641 		dailink_master: simple-audio-card,codec {
7742 			sound-dai = <&codec>;
78
-			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
43
+			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
7944 		};
8045 	};
8146 };
....@@ -95,12 +60,13 @@
9560 &ecspi3 {
9661 	pinctrl-names = "default";
9762 	pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
98
-	cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
63
+	cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
9964 };
10065 
10166 &fec1 {
102
-	pinctrl-names = "default";
67
+	pinctrl-names = "default", "sleep";
10368 	pinctrl-0 = <&pinctrl_enet1>;
69
+	pinctrl-1 = <&pinctrl_enet1_sleep>;
10470 	clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
10571 		<&clks IMX7D_ENET_AXI_ROOT_CLK>,
10672 		<&clks IMX7D_ENET1_TIME_ROOT_CLK>,
....@@ -115,6 +81,196 @@
11581 	fsl,magic-packet;
11682 };
11783 
84
+&flexcan1 {
85
+	pinctrl-names = "default";
86
+	pinctrl-0 = <&pinctrl_flexcan1>;
87
+	status = "disabled";
88
+};
89
+
90
+&flexcan2 {
91
+	pinctrl-names = "default";
92
+	pinctrl-0 = <&pinctrl_flexcan2>;
93
+	status = "disabled";
94
+};
95
+
96
+&gpio1 {
97
+	gpio-line-names = "SODIMM_43",
98
+			  "SODIMM_45",
99
+			  "SODIMM_135",
100
+			  "SODIMM_22",
101
+			  "",
102
+			  "",
103
+			  "SODIMM_37",
104
+			  "SODIMM_29",
105
+			  "SODIMM_59",
106
+			  "SODIMM_28",
107
+			  "SODIMM_30",
108
+			  "SODIMM_67",
109
+			  "",
110
+			  "",
111
+			  "SODIMM_188",
112
+			  "SODIMM_178";
113
+};
114
+
115
+&gpio2 {
116
+	gpio-line-names = "SODIMM_111",
117
+			  "SODIMM_113",
118
+			  "SODIMM_115",
119
+			  "SODIMM_117",
120
+			  "SODIMM_119",
121
+			  "SODIMM_121",
122
+			  "SODIMM_123",
123
+			  "SODIMM_125",
124
+			  "SODIMM_91",
125
+			  "SODIMM_89",
126
+			  "SODIMM_105",
127
+			  "SODIMM_152",
128
+			  "SODIMM_150",
129
+			  "SODIMM_95",
130
+			  "SODIMM_126",
131
+			  "SODIMM_107",
132
+			  "SODIMM_114",
133
+			  "SODIMM_116",
134
+			  "SODIMM_118",
135
+			  "SODIMM_120",
136
+			  "SODIMM_122",
137
+			  "SODIMM_124",
138
+			  "SODIMM_127",
139
+			  "SODIMM_130",
140
+			  "SODIMM_132",
141
+			  "SODIMM_134",
142
+			  "SODIMM_133",
143
+			  "SODIMM_104",
144
+			  "SODIMM_106",
145
+			  "SODIMM_110",
146
+			  "SODIMM_112",
147
+			  "SODIMM_128";
148
+};
149
+
150
+&gpio3 {
151
+	gpio-line-names = "SODIMM_56",
152
+			  "SODIMM_44",
153
+			  "SODIMM_68",
154
+			  "SODIMM_82",
155
+			  "SODIMM_93",
156
+			  "SODIMM_76",
157
+			  "SODIMM_70",
158
+			  "SODIMM_60",
159
+			  "SODIMM_58",
160
+			  "SODIMM_78",
161
+			  "SODIMM_72",
162
+			  "SODIMM_80",
163
+			  "SODIMM_46",
164
+			  "SODIMM_62",
165
+			  "SODIMM_48",
166
+			  "SODIMM_74",
167
+			  "SODIMM_50",
168
+			  "SODIMM_52",
169
+			  "SODIMM_54",
170
+			  "SODIMM_66",
171
+			  "SODIMM_64",
172
+			  "SODIMM_57",
173
+			  "SODIMM_61",
174
+			  "SODIMM_136",
175
+			  "SODIMM_138",
176
+			  "SODIMM_140",
177
+			  "SODIMM_142",
178
+			  "SODIMM_144",
179
+			  "SODIMM_146";
180
+};
181
+
182
+&gpio4 {
183
+	gpio-line-names = "SODIMM_35",
184
+			  "SODIMM_33",
185
+			  "SODIMM_38",
186
+			  "SODIMM_36",
187
+			  "SODIMM_21",
188
+			  "SODIMM_19",
189
+			  "SODIMM_131",
190
+			  "SODIMM_129",
191
+			  "SODIMM_90",
192
+			  "SODIMM_92",
193
+			  "SODIMM_88",
194
+			  "SODIMM_86",
195
+			  "SODIMM_81",
196
+			  "SODIMM_94",
197
+			  "SODIMM_96",
198
+			  "SODIMM_75",
199
+			  "SODIMM_101",
200
+			  "SODIMM_103",
201
+			  "SODIMM_79",
202
+			  "SODIMM_97",
203
+			  "SODIMM_67",
204
+			  "SODIMM_59",
205
+			  "SODIMM_85",
206
+			  "SODIMM_65";
207
+};
208
+
209
+&gpio5 {
210
+	gpio-line-names = "SODIMM_69",
211
+			  "SODIMM_71",
212
+			  "SODIMM_73",
213
+			  "SODIMM_47",
214
+			  "SODIMM_190",
215
+			  "SODIMM_192",
216
+			  "SODIMM_49",
217
+			  "SODIMM_51",
218
+			  "SODIMM_53",
219
+			  "",
220
+			  "",
221
+			  "SODIMM_98",
222
+			  "SODIMM_184",
223
+			  "SODIMM_186",
224
+			  "SODIMM_23",
225
+			  "SODIMM_31",
226
+			  "SODIMM_100",
227
+			  "SODIMM_102";
228
+};
229
+
230
+&gpio6 {
231
+	gpio-line-names = "",
232
+			  "",
233
+			  "",
234
+			  "",
235
+			  "",
236
+			  "",
237
+			  "",
238
+			  "",
239
+			  "",
240
+			  "",
241
+			  "",
242
+			  "",
243
+			  "SODIMM_169",
244
+			  "",
245
+			  "",
246
+			  "",
247
+			  "SODIMM_77",
248
+			  "SODIMM_24",
249
+			  "",
250
+			  "SODIMM_25",
251
+			  "SODIMM_27",
252
+			  "SODIMM_32",
253
+			  "SODIMM_34";
254
+};
255
+
256
+&gpio7 {
257
+	gpio-line-names = "",
258
+			  "",
259
+			  "SODIMM_63",
260
+			  "SODIMM_55",
261
+			  "",
262
+			  "",
263
+			  "",
264
+			  "",
265
+			  "SODIMM_196",
266
+			  "SODIMM_194",
267
+			  "",
268
+			  "SODIMM_99",
269
+			  "",
270
+			  "",
271
+			  "SODIMM_137";
272
+};
273
+
118274 &gpmi {
119275 	pinctrl-names = "default";
120276 	pinctrl-0 = <&pinctrl_gpmi_nand>;
....@@ -125,15 +281,19 @@
125281 
126282 &i2c1 {
127283 	clock-frequency = <100000>;
128
-	pinctrl-names = "default";
284
+	pinctrl-names = "default", "gpio";
129285 	pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;
286
+	pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>;
287
+	scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
288
+	sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
289
+
130290 	status = "okay";
131291 
132292 	codec: sgtl5000@a {
133293 		compatible = "fsl,sgtl5000";
134294 		#sound-dai-cells = <0>;
135295 		reg = <0x0a>;
136
-		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
296
+		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
137297 		pinctrl-names = "default";
138298 		pinctrl-0 = <&pinctrl_sai1_mclk>;
139299 		VDDA-supply = <&reg_module_3v3_avdd>;
....@@ -227,8 +387,11 @@
227387 
228388 &i2c4 {
229389 	clock-frequency = <100000>;
230
-	pinctrl-names = "default";
390
+	pinctrl-names = "default", "gpio";
231391 	pinctrl-0 = <&pinctrl_i2c4>;
392
+	pinctrl-1 = <&pinctrl_i2c4_recovery>;
393
+	scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
394
+	sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
232395 };
233396 
234397 &lcdif {
....@@ -267,10 +430,6 @@
267430 	status = "okay";
268431 };
269432 
270
-&snvs_pwrkey {
271
-	status = "disabled";
272
-};
273
-
274433 &uart1 {
275434 	pinctrl-names = "default";
276435 	pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>;
....@@ -304,7 +463,6 @@
304463 &usdhc1 {
305464 	pinctrl-names = "default";
306465 	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
307
-	no-1-8-v;
308466 	cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
309467 	disable-wp;
310468 	vqmmc-supply = <&reg_LDO2>;
....@@ -327,12 +485,11 @@
327485 
328486 &iomuxc {
329487 	pinctrl-names = "default";
330
-	pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>;
488
+	pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4
489
+		     &pinctrl_gpio7 &pinctrl_usbc_det>;
331490 
332491 	pinctrl_gpio1: gpio1-grp {
333492 		fsl,pins = <
334
-			MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3	0x74 /* SODIMM 55 */
335
-			MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2	0x74 /* SODIMM 63 */
336493 			MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16	0x14 /* SODIMM 77 */
337494 			MX7D_PAD_EPDC_DATA09__GPIO2_IO9		0x14 /* SODIMM 89 */
338495 			MX7D_PAD_EPDC_DATA08__GPIO2_IO8		0x74 /* SODIMM 91 */
....@@ -340,7 +497,6 @@
340497 			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x14 /* SODIMM 95 */
341498 			MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11	0x14 /* SODIMM 99 */
342499 			MX7D_PAD_EPDC_DATA10__GPIO2_IO10	0x74 /* SODIMM 105 */
343
-			MX7D_PAD_EPDC_DATA15__GPIO2_IO15	0x74 /* SODIMM 107 */
344500 			MX7D_PAD_EPDC_DATA00__GPIO2_IO0		0x14 /* SODIMM 111 */
345501 			MX7D_PAD_EPDC_DATA01__GPIO2_IO1		0x14 /* SODIMM 113 */
346502 			MX7D_PAD_EPDC_DATA02__GPIO2_IO2		0x14 /* SODIMM 115 */
....@@ -357,7 +513,6 @@
357513 			MX7D_PAD_SD2_DATA2__GPIO5_IO16		0x14 /* SODIMM 100 */
358514 			MX7D_PAD_SD2_DATA3__GPIO5_IO17		0x14 /* SODIMM 102 */
359515 			MX7D_PAD_EPDC_GDSP__GPIO2_IO27		0x14 /* SODIMM 104 */
360
-			MX7D_PAD_EPDC_BDR0__GPIO2_IO28		0x74 /* SODIMM 106 */
361516 			MX7D_PAD_EPDC_BDR1__GPIO2_IO29		0x14 /* SODIMM 110 */
362517 			MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30	0x14 /* SODIMM 112 */
363518 			MX7D_PAD_EPDC_SDCLK__GPIO2_IO16		0x14 /* SODIMM 114 */
....@@ -413,6 +568,13 @@
413568 		>;
414569 	};
415570 
571
+	pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */
572
+		fsl,pins = <
573
+			MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3	0x14 /* SODIMM 55 */
574
+			MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2	0x14 /* SODIMM 63 */
575
+		>;
576
+	};
577
+
416578 	pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */
417579 		fsl,pins = <
418580 			MX7D_PAD_GPIO1_IO13__GPIO1_IO13	0x79
....@@ -427,7 +589,6 @@
427589 
428590 	pinctrl_enet1: enet1grp {
429591 		fsl,pins = <
430
-			MX7D_PAD_ENET1_CRS__GPIO7_IO14			0x14
431592 			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x73
432593 			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x73
433594 			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x73
....@@ -439,6 +600,22 @@
439600 			MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1		0x73
440601 			MX7D_PAD_SD2_CD_B__ENET1_MDIO			0x3
441602 			MX7D_PAD_SD2_WP__ENET1_MDC			0x3
603
+		>;
604
+	};
605
+
606
+	pinctrl_enet1_sleep: enet1sleepgrp {
607
+		fsl,pins = <
608
+			MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4		0x0
609
+			MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0		0x0
610
+			MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1		0x0
611
+			MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5		0x0
612
+
613
+			MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10		0x0
614
+			MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6		0x0
615
+			MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7		0x0
616
+			MX7D_PAD_GPIO1_IO12__GPIO1_IO12			0x0
617
+			MX7D_PAD_SD2_CD_B__GPIO5_IO9			0x0
618
+			MX7D_PAD_SD2_WP__GPIO5_IO10			0x0
442619 		>;
443620 	};
444621 
....@@ -456,10 +633,17 @@
456633 		>;
457634 	};
458635 
636
+	pinctrl_flexcan1: flexcan1-grp {
637
+		fsl,pins = <
638
+			MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX	0x79 /* SODIMM 55 */
639
+			MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX	0x79 /* SODIMM 63 */
640
+		>;
641
+	};
642
+
459643 	pinctrl_flexcan2: flexcan2-grp {
460644 		fsl,pins = <
461
-			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x59
462
-			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x59
645
+			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x79 /* SODIMM 188 */
646
+			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x79 /* SODIMM 178 */
463647 		>;
464648 	};
465649 
....@@ -492,6 +676,13 @@
492676 		fsl,pins = <
493677 			MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA	0x4000007f
494678 			MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL	0x4000007f
679
+		>;
680
+	};
681
+
682
+	pinctrl_i2c4_recovery: i2c4-recoverygrp {
683
+		fsl,pins = <
684
+			MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8	0x4000007f
685
+			MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9	0x4000007f
495686 		>;
496687 	};
497688 
....@@ -595,6 +786,12 @@
595786 		>;
596787 	};
597788 
789
+	pinctrl_usbc_det: gpio-usbc-det {
790
+		fsl,pins = <
791
+			MX7D_PAD_ENET1_CRS__GPIO7_IO14	0x14
792
+		>;
793
+	};
794
+
598795 	pinctrl_usbh_reg: gpio-usbh-vbus {
599796 		fsl,pins = <
600797 			MX7D_PAD_UART3_CTS_B__GPIO4_IO7	0x14 /* SODIMM 129 USBH PEN */
....@@ -609,6 +806,28 @@
609806 			MX7D_PAD_SD1_DATA1__SD1_DATA1	0x59
610807 			MX7D_PAD_SD1_DATA2__SD1_DATA2	0x59
611808 			MX7D_PAD_SD1_DATA3__SD1_DATA3	0x59
809
+		>;
810
+	};
811
+
812
+	pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
813
+		fsl,pins = <
814
+			MX7D_PAD_SD1_CMD__SD1_CMD	0x5a
815
+			MX7D_PAD_SD1_CLK__SD1_CLK	0x1a
816
+			MX7D_PAD_SD1_DATA0__SD1_DATA0	0x5a
817
+			MX7D_PAD_SD1_DATA1__SD1_DATA1	0x5a
818
+			MX7D_PAD_SD1_DATA2__SD1_DATA2	0x5a
819
+			MX7D_PAD_SD1_DATA3__SD1_DATA3	0x5a
820
+		>;
821
+	};
822
+
823
+	pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
824
+		fsl,pins = <
825
+			MX7D_PAD_SD1_CMD__SD1_CMD	0x5b
826
+			MX7D_PAD_SD1_CLK__SD1_CLK	0x1b
827
+			MX7D_PAD_SD1_DATA0__SD1_DATA0	0x5b
828
+			MX7D_PAD_SD1_DATA1__SD1_DATA1	0x5b
829
+			MX7D_PAD_SD1_DATA2__SD1_DATA2	0x5b
830
+			MX7D_PAD_SD1_DATA3__SD1_DATA3	0x5b
612831 		>;
613832 	};
614833 
....@@ -682,9 +901,14 @@
682901 
683902 	pinctrl_gpio_lpsr: gpio1-grp {
684903 		fsl,pins = <
685
-			MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1	0x59
686904 			MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2	0x59
687905 			MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3	0x59
906
+		>;
907
+	};
908
+
909
+	pinctrl_gpiokeys: gpiokeysgrp {
910
+		fsl,pins = <
911
+			MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1	0x19
688912 		>;
689913 	};
690914 
....@@ -695,6 +919,13 @@
695919 		>;
696920 	};
697921 
922
+	pinctrl_i2c1_recovery: i2c1-recoverygrp {
923
+		fsl,pins = <
924
+			MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4	0x4000007f
925
+			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x4000007f
926
+		>;
927
+	};
928
+
698929 	pinctrl_cd_usdhc1: usdhc1-cd-grp {
699930 		fsl,pins = <
700931 			MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0	0x59 /* CD */