.. | .. |
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12 | 12 | /delete-node/ &crypto; |
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13 | 13 | |
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14 | 14 | &cpu0 { |
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| 15 | + clock-frequency = <900000000>; |
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15 | 16 | operating-points = < |
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16 | 17 | /* kHz uV */ |
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17 | 18 | 900000 1275000 |
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.. | .. |
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30 | 31 | >; |
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31 | 32 | }; |
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32 | 33 | |
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| 34 | +&ocotp { |
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| 35 | + compatible = "fsl,imx6ull-ocotp", "syscon"; |
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| 36 | +}; |
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| 37 | + |
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| 38 | +&pxp { |
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| 39 | + compatible = "fsl,imx6ull-pxp"; |
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| 40 | + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, |
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| 41 | + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; |
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| 42 | +}; |
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| 43 | + |
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| 44 | +&usdhc1 { |
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| 45 | + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; |
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| 46 | +}; |
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| 47 | + |
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| 48 | +&usdhc2 { |
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| 49 | + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; |
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| 50 | +}; |
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| 51 | + |
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33 | 52 | / { |
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34 | 53 | soc { |
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35 | | - aips3: aips-bus@2200000 { |
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| 54 | + aips3: bus@2200000 { |
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36 | 55 | compatible = "fsl,aips-bus", "simple-bus"; |
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37 | 56 | #address-cells = <1>; |
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38 | 57 | #size-cells = <1>; |
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39 | 58 | reg = <0x02200000 0x100000>; |
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40 | 59 | ranges; |
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41 | 60 | |
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| 61 | + dcp: crypto@2280000 { |
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| 62 | + compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp"; |
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| 63 | + reg = <0x02280000 0x4000>; |
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| 64 | + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, |
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| 65 | + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, |
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| 66 | + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; |
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| 67 | + clocks = <&clks IMX6ULL_CLK_DCP_CLK>; |
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| 68 | + clock-names = "dcp"; |
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| 69 | + }; |
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| 70 | + |
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| 71 | + rngb: rng@2284000 { |
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| 72 | + compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb"; |
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| 73 | + reg = <0x02284000 0x4000>; |
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| 74 | + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
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| 75 | + clocks = <&clks IMX6UL_CLK_DUMMY>; |
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| 76 | + }; |
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| 77 | + |
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42 | 78 | iomuxc_snvs: iomuxc-snvs@2290000 { |
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43 | 79 | compatible = "fsl,imx6ull-iomuxc-snvs"; |
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44 | 80 | reg = <0x02290000 0x4000>; |
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