forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/arch/arm/boot/dts/imx6ul.dtsi
....@@ -47,6 +47,8 @@
4747 		spi1 = &ecspi2;
4848 		spi2 = &ecspi3;
4949 		spi3 = &ecspi4;
50
+		usb0 = &usbotg1;
51
+		usb1 = &usbotg2;
5052 		usbphy0 = &usbphy1;
5153 		usbphy1 = &usbphy2;
5254 	};
....@@ -59,22 +61,21 @@
5961 			compatible = "arm,cortex-a7";
6062 			device_type = "cpu";
6163 			reg = <0>;
64
+			clock-frequency = <696000000>;
6265 			clock-latency = <61036>; /* two CLK32 periods */
6366 			#cooling-cells = <2>;
64
-			operating-points = <
67
+			operating-points =
6568 				/* kHz	uV */
66
-				696000	1275000
67
-				528000	1175000
68
-				396000	1025000
69
-				198000	950000
70
-			>;
71
-			fsl,soc-operating-points = <
69
+				<696000	1275000>,
70
+				<528000	1175000>,
71
+				<396000	1025000>,
72
+				<198000	950000>;
73
+			fsl,soc-operating-points =
7274 				/* KHz	uV */
73
-				696000	1275000
74
-				528000	1175000
75
-				396000	1175000
76
-				198000	1175000
77
-			>;
75
+				<696000	1275000>,
76
+				<528000	1175000>,
77
+				<396000	1175000>,
78
+				<198000	1175000>;
7879 			clocks = <&clks IMX6UL_CLK_ARM>,
7980 				 <&clks IMX6UL_CLK_PLL2_BUS>,
8081 				 <&clks IMX6UL_CLK_PLL2_PFD2>,
....@@ -92,24 +93,12 @@
9293 		};
9394 	};
9495 
95
-	intc: interrupt-controller@a01000 {
96
-		compatible = "arm,gic-400", "arm,cortex-a7-gic";
97
-		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
98
-		#interrupt-cells = <3>;
99
-		interrupt-controller;
100
-		interrupt-parent = <&intc>;
101
-		reg = <0x00a01000 0x1000>,
102
-		      <0x00a02000 0x2000>,
103
-		      <0x00a04000 0x2000>,
104
-		      <0x00a06000 0x2000>;
105
-	};
106
-
10796 	timer {
10897 		compatible = "arm,armv7-timer";
109
-		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
110
-			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
111
-			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
112
-			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
98
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
99
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
100
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
101
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
113102 		interrupt-parent = <&intc>;
114103 		status = "disabled";
115104 	};
....@@ -142,21 +131,10 @@
142131 		clock-output-names = "ipp_di1";
143132 	};
144133 
145
-	tempmon: tempmon {
146
-		compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
147
-		interrupt-parent = <&gpc>;
148
-		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
149
-		fsl,tempmon = <&anatop>;
150
-		nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
151
-		nvmem-cell-names = "calib", "temp_grade";
152
-		clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
153
-	};
154
-
155134 	pmu {
156135 		compatible = "arm,cortex-a7-pmu";
157136 		interrupt-parent = <&gpc>;
158137 		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
159
-		status = "disabled";
160138 	};
161139 
162140 	soc {
....@@ -169,9 +147,24 @@
169147 		ocram: sram@900000 {
170148 			compatible = "mmio-sram";
171149 			reg = <0x00900000 0x20000>;
150
+			ranges = <0 0x00900000 0x20000>;
151
+			#address-cells = <1>;
152
+			#size-cells = <1>;
172153 		};
173154 
174
-		dma_apbh: dma-apbh@1804000 {
155
+		intc: interrupt-controller@a01000 {
156
+			compatible = "arm,gic-400", "arm,cortex-a7-gic";
157
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
158
+			#interrupt-cells = <3>;
159
+			interrupt-controller;
160
+			interrupt-parent = <&intc>;
161
+			reg = <0x00a01000 0x1000>,
162
+			      <0x00a02000 0x2000>,
163
+			      <0x00a04000 0x2000>,
164
+			      <0x00a06000 0x2000>;
165
+		};
166
+
167
+		dma_apbh: dma-controller@1804000 {
175168 			compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
176169 			reg = <0x01804000 0x2000>;
177170 			interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
....@@ -184,7 +177,7 @@
184177 			clocks = <&clks IMX6UL_CLK_APBHDMA>;
185178 		};
186179 
187
-		gpmi: gpmi-nand@1806000         {
180
+		gpmi: nand-controller@1806000 {
188181 			compatible = "fsl,imx6q-gpmi-nand";
189182 			#address-cells = <1>;
190183 			#size-cells = <1>;
....@@ -204,7 +197,7 @@
204197 			status = "disabled";
205198 		};
206199 
207
-		aips1: aips-bus@2000000 {
200
+		aips1: bus@2000000 {
208201 			compatible = "fsl,aips-bus", "simple-bus";
209202 			#address-cells = <1>;
210203 			#size-cells = <1>;
....@@ -218,7 +211,7 @@
218211 				reg = <0x02000000 0x40000>;
219212 				ranges;
220213 
221
-				ecspi1: ecspi@2008000 {
214
+				ecspi1: spi@2008000 {
222215 					#address-cells = <1>;
223216 					#size-cells = <0>;
224217 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -227,10 +220,12 @@
227220 					clocks = <&clks IMX6UL_CLK_ECSPI1>,
228221 						 <&clks IMX6UL_CLK_ECSPI1>;
229222 					clock-names = "ipg", "per";
223
+					dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
224
+					dma-names = "rx", "tx";
230225 					status = "disabled";
231226 				};
232227 
233
-				ecspi2: ecspi@200c000 {
228
+				ecspi2: spi@200c000 {
234229 					#address-cells = <1>;
235230 					#size-cells = <0>;
236231 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -239,10 +234,12 @@
239234 					clocks = <&clks IMX6UL_CLK_ECSPI2>,
240235 						 <&clks IMX6UL_CLK_ECSPI2>;
241236 					clock-names = "ipg", "per";
237
+					dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
238
+					dma-names = "rx", "tx";
242239 					status = "disabled";
243240 				};
244241 
245
-				ecspi3: ecspi@2010000 {
242
+				ecspi3: spi@2010000 {
246243 					#address-cells = <1>;
247244 					#size-cells = <0>;
248245 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -251,10 +248,12 @@
251248 					clocks = <&clks IMX6UL_CLK_ECSPI3>,
252249 						 <&clks IMX6UL_CLK_ECSPI3>;
253250 					clock-names = "ipg", "per";
251
+					dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
252
+					dma-names = "rx", "tx";
254253 					status = "disabled";
255254 				};
256255 
257
-				ecspi4: ecspi@2014000 {
256
+				ecspi4: spi@2014000 {
258257 					#address-cells = <1>;
259258 					#size-cells = <0>;
260259 					compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
....@@ -263,6 +262,8 @@
263262 					clocks = <&clks IMX6UL_CLK_ECSPI4>,
264263 						 <&clks IMX6UL_CLK_ECSPI4>;
265264 					clock-names = "ipg", "per";
265
+					dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
266
+					dma-names = "rx", "tx";
266267 					status = "disabled";
267268 				};
268269 
....@@ -343,6 +344,31 @@
343344 					dma-names = "rx", "tx";
344345 					status = "disabled";
345346 				};
347
+
348
+				asrc: asrc@2034000 {
349
+					compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
350
+					reg = <0x2034000 0x4000>;
351
+					interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
352
+					clocks = <&clks IMX6UL_CLK_ASRC_IPG>,
353
+						<&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>,
354
+						<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
355
+						<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
356
+						<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
357
+						<&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>,
358
+						<&clks IMX6UL_CLK_SPBA>;
359
+					clock-names = "mem", "ipg", "asrck_0",
360
+						"asrck_1", "asrck_2", "asrck_3", "asrck_4",
361
+						"asrck_5", "asrck_6", "asrck_7", "asrck_8",
362
+						"asrck_9", "asrck_a", "asrck_b", "asrck_c",
363
+						"asrck_d", "asrck_e", "asrck_f", "spba";
364
+					dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
365
+						<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
366
+					dma-names = "rxa", "rxb", "rxc",
367
+						    "txa", "txb", "txc";
368
+					fsl,asrc-rate  = <48000>;
369
+					fsl,asrc-width = <16>;
370
+					status = "okay";
371
+				};
346372 			};
347373 
348374 			tsc: tsc@2040000 {
....@@ -363,7 +389,7 @@
363389 				clocks = <&clks IMX6UL_CLK_PWM1>,
364390 					 <&clks IMX6UL_CLK_PWM1>;
365391 				clock-names = "ipg", "per";
366
-				#pwm-cells = <2>;
392
+				#pwm-cells = <3>;
367393 				status = "disabled";
368394 			};
369395 
....@@ -374,7 +400,7 @@
374400 				clocks = <&clks IMX6UL_CLK_PWM2>,
375401 					 <&clks IMX6UL_CLK_PWM2>;
376402 				clock-names = "ipg", "per";
377
-				#pwm-cells = <2>;
403
+				#pwm-cells = <3>;
378404 				status = "disabled";
379405 			};
380406 
....@@ -385,7 +411,7 @@
385411 				clocks = <&clks IMX6UL_CLK_PWM3>,
386412 					 <&clks IMX6UL_CLK_PWM3>;
387413 				clock-names = "ipg", "per";
388
-				#pwm-cells = <2>;
414
+				#pwm-cells = <3>;
389415 				status = "disabled";
390416 			};
391417 
....@@ -396,7 +422,7 @@
396422 				clocks = <&clks IMX6UL_CLK_PWM4>,
397423 					 <&clks IMX6UL_CLK_PWM4>;
398424 				clock-names = "ipg", "per";
399
-				#pwm-cells = <2>;
425
+				#pwm-cells = <3>;
400426 				status = "disabled";
401427 			};
402428 
....@@ -407,6 +433,7 @@
407433 				clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
408434 					 <&clks IMX6UL_CLK_CAN1_SERIAL>;
409435 				clock-names = "ipg", "per";
436
+				fsl,stop-mode = <&gpr 0x10 1 0x10 17>;
410437 				status = "disabled";
411438 			};
412439 
....@@ -417,10 +444,11 @@
417444 				clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
418445 					 <&clks IMX6UL_CLK_CAN2_SERIAL>;
419446 				clock-names = "ipg", "per";
447
+				fsl,stop-mode = <&gpr 0x10 2 0x10 18>;
420448 				status = "disabled";
421449 			};
422450 
423
-			gpt1: gpt@2098000 {
451
+			gpt1: timer@2098000 {
424452 				compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
425453 				reg = <0x02098000 0x4000>;
426454 				interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
....@@ -508,27 +536,28 @@
508536 					 <&clks IMX6UL_CLK_ENET2_REF_125M>;
509537 				clock-names = "ipg", "ahb", "ptp",
510538 					      "enet_clk_ref", "enet_out";
511
-				fsl,num-tx-queues=<1>;
512
-				fsl,num-rx-queues=<1>;
539
+				fsl,num-tx-queues = <1>;
540
+				fsl,num-rx-queues = <1>;
541
+				fsl,stop-mode = <&gpr 0x10 4>;
513542 				status = "disabled";
514543 			};
515544 
516
-			kpp: kpp@20b8000 {
517
-				compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp";
545
+			kpp: keypad@20b8000 {
546
+				compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
518547 				reg = <0x020b8000 0x4000>;
519548 				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
520549 				clocks = <&clks IMX6UL_CLK_KPP>;
521550 				status = "disabled";
522551 			};
523552 
524
-			wdog1: wdog@20bc000 {
553
+			wdog1: watchdog@20bc000 {
525554 				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
526555 				reg = <0x020bc000 0x4000>;
527556 				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
528557 				clocks = <&clks IMX6UL_CLK_WDOG1>;
529558 			};
530559 
531
-			wdog2: wdog@20c0000 {
560
+			wdog2: watchdog@20c0000 {
532561 				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
533562 				reg = <0x020c0000 0x4000>;
534563 				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
....@@ -536,7 +565,7 @@
536565 				status = "disabled";
537566 			};
538567 
539
-			clks: ccm@20c4000 {
568
+			clks: clock-controller@20c4000 {
540569 				compatible = "fsl,imx6ul-ccm";
541570 				reg = <0x020c4000 0x4000>;
542571 				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
....@@ -548,7 +577,7 @@
548577 
549578 			anatop: anatop@20c8000 {
550579 				compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
551
-					     "syscon", "simple-bus";
580
+					     "syscon", "simple-mfd";
552581 				reg = <0x020c8000 0x1000>;
553582 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
554583 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
....@@ -601,6 +630,16 @@
601630 					anatop-min-voltage = <725000>;
602631 					anatop-max-voltage = <1450000>;
603632 				};
633
+
634
+				tempmon: tempmon {
635
+					compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
636
+					interrupt-parent = <&gpc>;
637
+					interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
638
+					fsl,tempmon = <&anatop>;
639
+					nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
640
+					nvmem-cell-names = "calib", "temp_grade";
641
+					clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
642
+				};
604643 			};
605644 
606645 			usbphy1: usbphy@20c9000 {
....@@ -648,6 +687,7 @@
648687 					interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
649688 					linux,keycode = <KEY_POWER>;
650689 					wakeup-source;
690
+					status = "disabled";
651691 				};
652692 
653693 				snvs_lpgpr: snvs-lpgpr {
....@@ -665,7 +705,7 @@
665705 				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
666706 			};
667707 
668
-			src: src@20d8000 {
708
+			src: reset-controller@20d8000 {
669709 				compatible = "fsl,imx6ul-src", "fsl,imx51-src";
670710 				reg = <0x020d8000 0x4000>;
671711 				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
....@@ -682,7 +722,7 @@
682722 				interrupt-parent = <&intc>;
683723 			};
684724 
685
-			iomuxc: iomuxc@20e0000 {
725
+			iomuxc: pinctrl@20e0000 {
686726 				compatible = "fsl,imx6ul-iomuxc";
687727 				reg = <0x020e0000 0x4000>;
688728 			};
....@@ -693,16 +733,17 @@
693733 				reg = <0x020e4000 0x4000>;
694734 			};
695735 
696
-			gpt2: gpt@20e8000 {
736
+			gpt2: timer@20e8000 {
697737 				compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
698738 				reg = <0x020e8000 0x4000>;
699739 				interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
700740 				clocks = <&clks IMX6UL_CLK_GPT2_BUS>,
701741 					 <&clks IMX6UL_CLK_GPT2_SERIAL>;
702742 				clock-names = "ipg", "per";
743
+				status = "disabled";
703744 			};
704745 
705
-			sdma: sdma@20ec000 {
746
+			sdma: dma-controller@20ec000 {
706747 				compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
707748 					     "fsl,imx35-sdma";
708749 				reg = <0x020ec000 0x4000>;
....@@ -721,7 +762,7 @@
721762 				clocks = <&clks IMX6UL_CLK_PWM5>,
722763 					 <&clks IMX6UL_CLK_PWM5>;
723764 				clock-names = "ipg", "per";
724
-				#pwm-cells = <2>;
765
+				#pwm-cells = <3>;
725766 				status = "disabled";
726767 			};
727768 
....@@ -732,7 +773,7 @@
732773 				clocks = <&clks IMX6UL_CLK_PWM6>,
733774 					 <&clks IMX6UL_CLK_PWM6>;
734775 				clock-names = "ipg", "per";
735
-				#pwm-cells = <2>;
776
+				#pwm-cells = <3>;
736777 				status = "disabled";
737778 			};
738779 
....@@ -743,7 +784,7 @@
743784 				clocks = <&clks IMX6UL_CLK_PWM7>,
744785 					 <&clks IMX6UL_CLK_PWM7>;
745786 				clock-names = "ipg", "per";
746
-				#pwm-cells = <2>;
787
+				#pwm-cells = <3>;
747788 				status = "disabled";
748789 			};
749790 
....@@ -754,19 +795,19 @@
754795 				clocks = <&clks IMX6UL_CLK_PWM8>,
755796 					 <&clks IMX6UL_CLK_PWM8>;
756797 				clock-names = "ipg", "per";
757
-				#pwm-cells = <2>;
798
+				#pwm-cells = <3>;
758799 				status = "disabled";
759800 			};
760801 		};
761802 
762
-		aips2: aips-bus@2100000 {
803
+		aips2: bus@2100000 {
763804 			compatible = "fsl,aips-bus", "simple-bus";
764805 			#address-cells = <1>;
765806 			#size-cells = <1>;
766807 			reg = <0x02100000 0x100000>;
767808 			ranges;
768809 
769
-			crypto: caam@2140000 {
810
+			crypto: crypto@2140000 {
770811 				compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
771812 				#address-cells = <1>;
772813 				#size-cells = <1>;
....@@ -777,19 +818,19 @@
777818 					 <&clks IMX6UL_CLK_CAAM_MEM>;
778819 				clock-names = "ipg", "aclk", "mem";
779820 
780
-				sec_jr0: jr0@1000 {
821
+				sec_jr0: jr@1000 {
781822 					compatible = "fsl,sec-v4.0-job-ring";
782823 					reg = <0x1000 0x1000>;
783824 					interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
784825 				};
785826 
786
-				sec_jr1: jr1@2000 {
827
+				sec_jr1: jr@2000 {
787828 					compatible = "fsl,sec-v4.0-job-ring";
788829 					reg = <0x2000 0x1000>;
789830 					interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
790831 				};
791832 
792
-				sec_jr2: jr2@3000 {
833
+				sec_jr2: jr@3000 {
793834 					compatible = "fsl,sec-v4.0-job-ring";
794835 					reg = <0x3000 0x1000>;
795836 					interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
....@@ -842,12 +883,13 @@
842883 					 <&clks IMX6UL_CLK_ENET_REF>;
843884 				clock-names = "ipg", "ahb", "ptp",
844885 					      "enet_clk_ref", "enet_out";
845
-				fsl,num-tx-queues=<1>;
846
-				fsl,num-rx-queues=<1>;
886
+				fsl,num-tx-queues = <1>;
887
+				fsl,num-rx-queues = <1>;
888
+				fsl,stop-mode = <&gpr 0x10 3>;
847889 				status = "disabled";
848890 			};
849891 
850
-			usdhc1: usdhc@2190000 {
892
+			usdhc1: mmc@2190000 {
851893 				compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
852894 				reg = <0x02190000 0x4000>;
853895 				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
....@@ -855,11 +897,13 @@
855897 					 <&clks IMX6UL_CLK_USDHC1>,
856898 					 <&clks IMX6UL_CLK_USDHC1>;
857899 				clock-names = "ipg", "ahb", "per";
900
+				fsl,tuning-step = <2>;
901
+				fsl,tuning-start-tap = <20>;
858902 				bus-width = <4>;
859903 				status = "disabled";
860904 			};
861905 
862
-			usdhc2: usdhc@2194000 {
906
+			usdhc2: mmc@2194000 {
863907 				compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
864908 				reg = <0x02194000 0x4000>;
865909 				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
....@@ -868,6 +912,8 @@
868912 					 <&clks IMX6UL_CLK_USDHC2>;
869913 				clock-names = "ipg", "ahb", "per";
870914 				bus-width = <4>;
915
+				fsl,tuning-step = <2>;
916
+				fsl,tuning-start-tap = <20>;
871917 				status = "disabled";
872918 			};
873919 
....@@ -913,12 +959,24 @@
913959 				status = "disabled";
914960 			};
915961 
916
-			mmdc: mmdc@21b0000 {
962
+			memory-controller@21b0000 {
917963 				compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
918964 				reg = <0x021b0000 0x4000>;
965
+				clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>;
919966 			};
920967 
921
-			ocotp: ocotp-ctrl@21bc000 {
968
+			weim: weim@21b8000 {
969
+				#address-cells = <2>;
970
+				#size-cells = <1>;
971
+				compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
972
+				reg = <0x021b8000 0x4000>;
973
+				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
974
+				clocks = <&clks IMX6UL_CLK_EIM>;
975
+				fsl,weim-cs-gpr = <&gpr>;
976
+				status = "disabled";
977
+			};
978
+
979
+			ocotp: efuse@21bc000 {
922980 				#address-cells = <1>;
923981 				#size-cells = <1>;
924982 				compatible = "fsl,imx6ul-ocotp", "syscon";
....@@ -938,8 +996,17 @@
938996 				};
939997 			};
940998 
999
+			csi: csi@21c4000 {
1000
+				compatible = "fsl,imx6ul-csi";
1001
+				reg = <0x021c4000 0x4000>;
1002
+				interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
1003
+				clocks = <&clks IMX6UL_CLK_CSI>;
1004
+				clock-names = "mclk";
1005
+				status = "disabled";
1006
+			};
1007
+
9411008 			lcdif: lcdif@21c8000 {
942
-				compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
1009
+				compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
9431010 				reg = <0x021c8000 0x4000>;
9441011 				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
9451012 				clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
....@@ -949,10 +1016,18 @@
9491016 				status = "disabled";
9501017 			};
9511018 
952
-			qspi: qspi@21e0000 {
1019
+			pxp: pxp@21cc000 {
1020
+				compatible = "fsl,imx6ul-pxp";
1021
+				reg = <0x021cc000 0x4000>;
1022
+				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1023
+				clocks = <&clks IMX6UL_CLK_PXP>;
1024
+				clock-names = "axi";
1025
+			};
1026
+
1027
+			qspi: spi@21e0000 {
9531028 				#address-cells = <1>;
9541029 				#size-cells = <0>;
955
-				compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi";
1030
+				compatible = "fsl,imx6ul-qspi";
9561031 				reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
9571032 				reg-names = "QuadSPI", "QuadSPI-memory";
9581033 				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
....@@ -962,7 +1037,7 @@
9621037 				status = "disabled";
9631038 			};
9641039 
965
-			wdog3: wdog@21e4000 {
1040
+			wdog3: watchdog@21e4000 {
9661041 				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
9671042 				reg = <0x021e4000 0x4000>;
9681043 				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;