add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/imx6qdl.dtsi
..
..
@@ -4,6 +4,7 @@
4
4
 // Copyright 2011 Linaro Ltd.
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5
 
6
6
 #include <dt-bindings/clock/imx6qdl-clock.h>
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+#include <dt-bindings/input/input.h>
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8
 #include <dt-bindings/interrupt-controller/arm-gic.h>
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9
 
9
10
 / {
..
..
@@ -13,10 +14,8 @@
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 	 * The decompressor and also some bootloaders rely on a
14
15
 	 * pre-existing /chosen node to be available to insert the
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 	 * command line and merge other ATAGS info.
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-	 * Also for U-Boot there must be a pre-existing /memory node.
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 	 */
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 	chosen {};
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-	memory { device_type = "memory"; };
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19
 
21
20
 	aliases {
22
21
 		ethernet0 = &fec;
..
..
@@ -46,6 +45,10 @@
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 		spi1 = &ecspi2;
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46
 		spi2 = &ecspi3;
48
47
 		spi3 = &ecspi4;
48
+		usb0 = &usbotg;
49
+		usb1 = &usbh1;
50
+		usb2 = &usbh2;
51
+		usb3 = &usbh3;
49
52
 		usbphy0 = &usbphy1;
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53
 		usbphy1 = &usbphy2;
51
54
 	};
..
..
@@ -68,15 +71,6 @@
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 			#clock-cells = <0>;
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 			clock-frequency = <24000000>;
70
73
 		};
71
-	};
72
-
73
-	tempmon: tempmon {
74
-		compatible = "fsl,imx6q-tempmon";
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-		interrupt-parent = <&gpc>;
76
-		interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
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-		fsl,tempmon = <&anatop>;
78
-		fsl,tempmon-data = <&ocotp>;
79
-		clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
80
74
 	};
81
75
 
82
76
 	ldb: ldb {
..
..
@@ -139,6 +133,16 @@
139
133
 		interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
140
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 	};
141
135
 
136
+	usbphynop1: usbphynop1 {
137
+		compatible = "usb-nop-xceiv";
138
+		#phy-cells = <0>;
139
+	};
140
+
141
+	usbphynop2: usbphynop2 {
142
+		compatible = "usb-nop-xceiv";
143
+		#phy-cells = <0>;
144
+	};
145
+
142
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 	soc {
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 		#address-cells = <1>;
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 		#size-cells = <1>;
..
..
@@ -146,7 +150,7 @@
146
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 		interrupt-parent = <&gpc>;
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 		ranges;
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152
 
149
-		dma_apbh: dma-apbh@110000 {
153
+		dma_apbh: dma-controller@110000 {
150
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 			compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
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 			reg = <0x00110000 0x2000>;
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 			interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -159,10 +163,8 @@
159
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 			clocks = <&clks IMX6QDL_CLK_APBH_DMA>;
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 		};
161
165
 
162
-		gpmi: gpmi-nand@112000 {
166
+		gpmi: nand-controller@112000 {
163
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 			compatible = "fsl,imx6q-gpmi-nand";
164
-			#address-cells = <1>;
165
-			#size-cells = <1>;
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168
 			reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
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 			reg-names = "gpmi-nand", "bch";
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 			interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -216,6 +218,7 @@
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 				 <&clks IMX6QDL_CLK_GPU3D_SHADER>;
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 			clock-names = "bus", "core", "shader";
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 			power-domains = <&pd_pu>;
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+			#cooling-cells = <2>;
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 		};
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 		gpu_2d: gpu@134000 {
..
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@@ -226,6 +229,7 @@
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 				 <&clks IMX6QDL_CLK_GPU2D_CORE>;
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 			clock-names = "bus", "core";
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 			power-domains = <&pd_pu>;
232
+			#cooling-cells = <2>;
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 		};
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 		timer@a00600 {
..
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@@ -245,7 +249,7 @@
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 			interrupt-parent = <&intc>;
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 		};
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251
 
248
-		L2: l2-cache@a02000 {
252
+		L2: cache-controller@a02000 {
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 			compatible = "arm,pl310-cache";
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 			reg = <0x00a02000 0x1000>;
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 			interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
..
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@@ -268,6 +272,7 @@
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 			ranges = <0x81000000 0 0          0x01f80000 0 0x00010000 /* downstream I/O */
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 				  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
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 			num-lanes = <1>;
275
+			num-viewport = <4>;
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 			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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 			interrupt-names = "msi";
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 			#interrupt-cells = <1>;
..
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@@ -283,7 +288,7 @@
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 			status = "disabled";
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 		};
285
290
 
286
-		aips-bus@2000000 { /* AIPS1 */
291
+		bus@2000000 { /* AIPS1 */
287
292
 			compatible = "fsl,aips-bus", "simple-bus";
288
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 			#address-cells = <1>;
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 			#size-cells = <1>;
..
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@@ -317,7 +322,7 @@
317
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 					status = "disabled";
318
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 				};
319
324
 
320
-				ecspi1: ecspi@2008000 {
325
+				ecspi1: spi@2008000 {
321
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 					#address-cells = <1>;
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 					#size-cells = <0>;
323
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 					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
..
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@@ -331,7 +336,7 @@
331
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 					status = "disabled";
332
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 				};
333
338
 
334
-				ecspi2: ecspi@200c000 {
339
+				ecspi2: spi@200c000 {
335
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 					#address-cells = <1>;
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 					#size-cells = <0>;
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 					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
..
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@@ -345,7 +350,7 @@
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 					status = "disabled";
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 				};
347
352
 
348
-				ecspi3: ecspi@2010000 {
353
+				ecspi3: spi@2010000 {
349
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 					#address-cells = <1>;
350
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 					#size-cells = <0>;
351
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 					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
..
..
@@ -359,7 +364,7 @@
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 					status = "disabled";
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 				};
361
366
 
362
-				ecspi4: ecspi@2014000 {
367
+				ecspi4: spi@2014000 {
363
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 					#address-cells = <1>;
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 					#size-cells = <0>;
365
370
 					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
..
..
@@ -498,7 +503,7 @@
498
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 			};
499
504
 
500
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 			pwm1: pwm@2080000 {
501
-				#pwm-cells = <2>;
506
+				#pwm-cells = <3>;
502
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 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
503
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 				reg = <0x02080000 0x4000>;
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 				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -509,7 +514,7 @@
509
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 			};
510
515
 
511
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 			pwm2: pwm@2084000 {
512
-				#pwm-cells = <2>;
517
+				#pwm-cells = <3>;
513
518
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
514
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 				reg = <0x02084000 0x4000>;
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 				interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
..
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@@ -520,7 +525,7 @@
520
525
 			};
521
526
 
522
527
 			pwm3: pwm@2088000 {
523
-				#pwm-cells = <2>;
528
+				#pwm-cells = <3>;
524
529
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
525
530
 				reg = <0x02088000 0x4000>;
526
531
 				interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -531,7 +536,7 @@
531
536
 			};
532
537
 
533
538
 			pwm4: pwm@208c000 {
534
-				#pwm-cells = <2>;
539
+				#pwm-cells = <3>;
535
540
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
536
541
 				reg = <0x0208c000 0x4000>;
537
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 				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -548,6 +553,7 @@
548
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 				clocks = <&clks IMX6QDL_CLK_CAN1_IPG>,
549
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 					 <&clks IMX6QDL_CLK_CAN1_SERIAL>;
550
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 				clock-names = "ipg", "per";
556
+				fsl,stop-mode = <&gpr 0x34 28 0x10 17>;
551
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 				status = "disabled";
552
558
 			};
553
559
 
..
..
@@ -558,10 +564,11 @@
558
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 				clocks = <&clks IMX6QDL_CLK_CAN2_IPG>,
559
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 					 <&clks IMX6QDL_CLK_CAN2_SERIAL>;
560
566
 				clock-names = "ipg", "per";
567
+				fsl,stop-mode = <&gpr 0x34 29 0x10 18>;
561
568
 				status = "disabled";
562
569
 			};
563
570
 
564
-			gpt: gpt@2098000 {
571
+			gpt: timer@2098000 {
565
572
 				compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
566
573
 				reg = <0x02098000 0x4000>;
567
574
 				interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -648,7 +655,7 @@
648
655
 				#interrupt-cells = <2>;
649
656
 			};
650
657
 
651
-			kpp: kpp@20b8000 {
658
+			kpp: keypad@20b8000 {
652
659
 				compatible = "fsl,imx6q-kpp", "fsl,imx21-kpp";
653
660
 				reg = <0x020b8000 0x4000>;
654
661
 				interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -656,22 +663,22 @@
656
663
 				status = "disabled";
657
664
 			};
658
665
 
659
-			wdog1: wdog@20bc000 {
666
+			wdog1: watchdog@20bc000 {
660
667
 				compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
661
668
 				reg = <0x020bc000 0x4000>;
662
669
 				interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
663
-				clocks = <&clks IMX6QDL_CLK_DUMMY>;
670
+				clocks = <&clks IMX6QDL_CLK_IPG>;
664
671
 			};
665
672
 
666
-			wdog2: wdog@20c0000 {
673
+			wdog2: watchdog@20c0000 {
667
674
 				compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
668
675
 				reg = <0x020c0000 0x4000>;
669
676
 				interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
670
-				clocks = <&clks IMX6QDL_CLK_DUMMY>;
677
+				clocks = <&clks IMX6QDL_CLK_IPG>;
671
678
 				status = "disabled";
672
679
 			};
673
680
 
674
-			clks: ccm@20c4000 {
681
+			clks: clock-controller@20c4000 {
675
682
 				compatible = "fsl,imx6q-ccm";
676
683
 				reg = <0x020c4000 0x4000>;
677
684
 				interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -680,7 +687,7 @@
680
687
 			};
681
688
 
682
689
 			anatop: anatop@20c8000 {
683
-				compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
690
+				compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
684
691
 				reg = <0x020c8000 0x1000>;
685
692
 				interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
686
693
 					     <0 54 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -753,7 +760,7 @@
753
760
 					regulator-name = "vddpu";
754
761
 					regulator-min-microvolt = <725000>;
755
762
 					regulator-max-microvolt = <1450000>;
756
-					regulator-enable-ramp-delay = <150>;
763
+					regulator-enable-ramp-delay = <380>;
757
764
 					anatop-reg-offset = <0x140>;
758
765
 					anatop-vol-bit-shift = <9>;
759
766
 					anatop-vol-bit-width = <5>;
..
..
@@ -780,6 +787,17 @@
780
787
 					anatop-min-bit-val = <1>;
781
788
 					anatop-min-voltage = <725000>;
782
789
 					anatop-max-voltage = <1450000>;
790
+				};
791
+
792
+				tempmon: tempmon {
793
+					compatible = "fsl,imx6q-tempmon";
794
+					interrupt-parent = <&gpc>;
795
+					interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
796
+					fsl,tempmon = <&anatop>;
797
+					nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
798
+					nvmem-cell-names = "calib", "temp_grade";
799
+					clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
800
+					#thermal-sensor-cells = <0>;
783
801
 				};
784
802
 			};
785
803
 
..
..
@@ -820,6 +838,15 @@
820
838
 					status = "disabled";
821
839
 				};
822
840
 
841
+				snvs_pwrkey: snvs-powerkey {
842
+					compatible = "fsl,sec-v4.0-pwrkey";
843
+					regmap = <&snvs>;
844
+					interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
845
+					linux,keycode = <KEY_POWER>;
846
+					wakeup-source;
847
+					status = "disabled";
848
+				};
849
+
823
850
 				snvs_lpgpr: snvs-lpgpr {
824
851
 					compatible = "fsl,imx6q-snvs-lpgpr";
825
852
 				};
..
..
@@ -835,7 +862,7 @@
835
862
 				interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
836
863
 			};
837
864
 
838
-			src: src@20d8000 {
865
+			src: reset-controller@20d8000 {
839
866
 				compatible = "fsl,imx6q-src", "fsl,imx51-src";
840
867
 				reg = <0x020d8000 0x4000>;
841
868
 				interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
..
..
@@ -848,8 +875,7 @@
848
875
 				reg = <0x020dc000 0x4000>;
849
876
 				interrupt-controller;
850
877
 				#interrupt-cells = <3>;
851
-				interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
852
-					     <0 90 IRQ_TYPE_LEVEL_HIGH>;
878
+				interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
853
879
 				interrupt-parent = <&intc>;
854
880
 				clocks = <&clks IMX6QDL_CLK_IPG>;
855
881
 				clock-names = "ipg";
..
..
@@ -886,7 +912,7 @@
886
912
 				};
887
913
 			};
888
914
 
889
-			iomuxc: iomuxc@20e0000 {
915
+			iomuxc: pinctrl@20e0000 {
890
916
 				compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
891
917
 				reg = <0x20e0000 0x4000>;
892
918
 			};
..
..
@@ -901,7 +927,7 @@
901
927
 				interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
902
928
 			};
903
929
 
904
-			sdma: sdma@20ec000 {
930
+			sdma: dma-controller@20ec000 {
905
931
 				compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
906
932
 				reg = <0x020ec000 0x4000>;
907
933
 				interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -913,14 +939,14 @@
913
939
 			};
914
940
 		};
915
941
 
916
-		aips-bus@2100000 { /* AIPS2 */
942
+		bus@2100000 { /* AIPS2 */
917
943
 			compatible = "fsl,aips-bus", "simple-bus";
918
944
 			#address-cells = <1>;
919
945
 			#size-cells = <1>;
920
946
 			reg = <0x02100000 0x100000>;
921
947
 			ranges;
922
948
 
923
-			crypto: caam@2100000 {
949
+			crypto: crypto@2100000 {
924
950
 				compatible = "fsl,sec-v4.0";
925
951
 				#address-cells = <1>;
926
952
 				#size-cells = <1>;
..
..
@@ -932,13 +958,13 @@
932
958
 					 <&clks IMX6QDL_CLK_EIM_SLOW>;
933
959
 				clock-names = "mem", "aclk", "ipg", "emi_slow";
934
960
 
935
-				sec_jr0: jr0@1000 {
961
+				sec_jr0: jr@1000 {
936
962
 					compatible = "fsl,sec-v4.0-job-ring";
937
963
 					reg = <0x1000 0x1000>;
938
964
 					interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
939
965
 				};
940
966
 
941
-				sec_jr1: jr1@2000 {
967
+				sec_jr1: jr@2000 {
942
968
 					compatible = "fsl,sec-v4.0-job-ring";
943
969
 					reg = <0x2000 0x1000>;
944
970
 					interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -981,6 +1007,8 @@
981
1007
 				reg = <0x02184400 0x200>;
982
1008
 				interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
983
1009
 				clocks = <&clks IMX6QDL_CLK_USBOH3>;
1010
+				fsl,usbphy = <&usbphynop1>;
1011
+				phy_type = "hsic";
984
1012
 				fsl,usbmisc = <&usbmisc 2>;
985
1013
 				dr_mode = "host";
986
1014
 				ahb-burst-config = <0x0>;
..
..
@@ -994,6 +1022,8 @@
994
1022
 				reg = <0x02184600 0x200>;
995
1023
 				interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
996
1024
 				clocks = <&clks IMX6QDL_CLK_USBOH3>;
1025
+				fsl,usbphy = <&usbphynop2>;
1026
+				phy_type = "hsic";
997
1027
 				fsl,usbmisc = <&usbmisc 3>;
998
1028
 				dr_mode = "host";
999
1029
 				ahb-burst-config = <0x0>;
..
..
@@ -1017,8 +1047,10 @@
1017
1047
 					     <0 119 IRQ_TYPE_LEVEL_HIGH>;
1018
1048
 				clocks = <&clks IMX6QDL_CLK_ENET>,
1019
1049
 					 <&clks IMX6QDL_CLK_ENET>,
1050
+					 <&clks IMX6QDL_CLK_ENET_REF>,
1020
1051
 					 <&clks IMX6QDL_CLK_ENET_REF>;
1021
-				clock-names = "ipg", "ahb", "ptp";
1052
+				clock-names = "ipg", "ahb", "ptp", "enet_out";
1053
+				fsl,stop-mode = <&gpr 0x34 27>;
1022
1054
 				status = "disabled";
1023
1055
 			};
1024
1056
 
..
..
@@ -1029,7 +1061,7 @@
1029
1061
 					     <0 126 IRQ_TYPE_LEVEL_HIGH>;
1030
1062
 			};
1031
1063
 
1032
-			usdhc1: usdhc@2190000 {
1064
+			usdhc1: mmc@2190000 {
1033
1065
 				compatible = "fsl,imx6q-usdhc";
1034
1066
 				reg = <0x02190000 0x4000>;
1035
1067
 				interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -1041,7 +1073,7 @@
1041
1073
 				status = "disabled";
1042
1074
 			};
1043
1075
 
1044
-			usdhc2: usdhc@2194000 {
1076
+			usdhc2: mmc@2194000 {
1045
1077
 				compatible = "fsl,imx6q-usdhc";
1046
1078
 				reg = <0x02194000 0x4000>;
1047
1079
 				interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -1053,7 +1085,7 @@
1053
1085
 				status = "disabled";
1054
1086
 			};
1055
1087
 
1056
-			usdhc3: usdhc@2198000 {
1088
+			usdhc3: mmc@2198000 {
1057
1089
 				compatible = "fsl,imx6q-usdhc";
1058
1090
 				reg = <0x02198000 0x4000>;
1059
1091
 				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -1065,7 +1097,7 @@
1065
1097
 				status = "disabled";
1066
1098
 			};
1067
1099
 
1068
-			usdhc4: usdhc@219c000 {
1100
+			usdhc4: mmc@219c000 {
1069
1101
 				compatible = "fsl,imx6q-usdhc";
1070
1102
 				reg = <0x0219c000 0x4000>;
1071
1103
 				interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
..
..
@@ -1111,13 +1143,16 @@
1111
1143
 				reg = <0x021ac000 0x4000>;
1112
1144
 			};
1113
1145
 
1114
-			mmdc0: mmdc@21b0000 { /* MMDC0 */
1146
+			mmdc0: memory-controller@21b0000 { /* MMDC0 */
1115
1147
 				compatible = "fsl,imx6q-mmdc";
1116
1148
 				reg = <0x021b0000 0x4000>;
1149
+				clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>;
1117
1150
 			};
1118
1151
 
1119
-			mmdc1: mmdc@21b4000 { /* MMDC1 */
1152
+			mmdc1: memory-controller@21b4000 { /* MMDC1 */
1153
+				compatible = "fsl,imx6q-mmdc";
1120
1154
 				reg = <0x021b4000 0x4000>;
1155
+				status = "disabled";
1121
1156
 			};
1122
1157
 
1123
1158
 			weim: weim@21b8000 {
..
..
@@ -1131,10 +1166,24 @@
1131
1166
 				status = "disabled";
1132
1167
 			};
1133
1168
 
1134
-			ocotp: ocotp@21bc000 {
1169
+			ocotp: efuse@21bc000 {
1135
1170
 				compatible = "fsl,imx6q-ocotp", "syscon";
1136
1171
 				reg = <0x021bc000 0x4000>;
1137
1172
 				clocks = <&clks IMX6QDL_CLK_IIM>;
1173
+				#address-cells = <1>;
1174
+				#size-cells = <1>;
1175
+
1176
+				cpu_speed_grade: speed-grade@10 {
1177
+					reg = <0x10 4>;
1178
+				};
1179
+
1180
+				tempmon_calib: calib@38 {
1181
+					reg = <0x38 4>;
1182
+				};
1183
+
1184
+				tempmon_temp_grade: temp-grade@20 {
1185
+					reg = <0x20 4>;
1186
+				};
1138
1187
 			};
1139
1188
 
1140
1189
 			tzasc@21d0000 { /* TZASC1 */