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2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/arch/arm/boot/dts/imx6qdl-apf6.dtsi
....@@ -1,66 +1,56 @@
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-/*
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- * Copyright 2015 Armadeus Systems
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- *
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- * This file is dual-licensed: you can use it either under the terms
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- * of the GPL or the X11 license, at your option. Note that this dual
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- * licensing only applies to this file, and not this project as a
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- * whole.
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- *
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- *  a) This file is free software; you can redistribute it and/or
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- *     modify it under the terms of the GNU General Public License as
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- *     published by the Free Software Foundation; either version 2 of
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- *     the License, or (at your option) any later version.
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- *
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- *     This file is distributed in the hope that it will be useful,
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- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
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- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- *     GNU General Public License for more details.
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- *
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- *     You should have received a copy of the GNU General Public
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- *     License along with this file; if not, write to the Free
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- *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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- *     MA 02110-1301 USA
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- *
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- * Or, alternatively,
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- *
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- *  b) Permission is hereby granted, free of charge, to any person
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- *     obtaining a copy of this software and associated documentation
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- *     files (the "Software"), to deal in the Software without
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- *     restriction, including without limitation the rights to use,
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- *     copy, modify, merge, publish, distribute, sublicense, and/or
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- *     sell copies of the Software, and to permit persons to whom the
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- *     Software is furnished to do so, subject to the following
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- *     conditions:
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- *
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- *     The above copyright notice and this permission notice shall be
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- *     included in all copies or substantial portions of the Software.
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- *
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- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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- *     OTHER DEALINGS IN THE SOFTWARE.
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- */
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+// SPDX-License-Identifier: GPL-2.0+ OR MIT
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+//
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+// Copyright 2015 Armadeus Systems <support@armadeus.com>
474 
485 #include <dt-bindings/gpio/gpio.h>
496 #include <dt-bindings/interrupt-controller/irq.h>
507 
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+/ {
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+	reg_1p8v: regulator-1p8v {
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+		compatible = "regulator-fixed";
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+		regulator-name = "1P8V";
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+		regulator-min-microvolt = <1800000>;
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+		regulator-max-microvolt = <1800000>;
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+		regulator-always-on;
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+		vin-supply = <&reg_3p3v>;
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+	};
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+
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+	usdhc1_pwrseq: usdhc1-pwrseq {
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+		compatible = "mmc-pwrseq-simple";
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+		reset-gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
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+		post-power-on-delay-ms = <15>;
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+		power-off-delay-us = <70>;
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+	};
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+};
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+
5126 &fec {
5227 	pinctrl-names = "default";
5328 	pinctrl-0 = <&pinctrl_enet>;
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-	phy-mode = "rgmii";
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+	phy-mode = "rgmii-id";
5530 	phy-reset-duration = <10>;
5631 	phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
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+	phy-handle = <&ethphy1>;
5733 	status = "okay";
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+
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+	mdio {
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+		#address-cells = <1>;
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+		#size-cells = <0>;
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+
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+		ethphy1: ethernet-phy@1 {
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+			compatible = "ethernet-phy-ieee802.3-c22";
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+			reg = <1>;
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+			interrupt-parent = <&gpio1>;
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+			interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
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+			status = "okay";
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+		};
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+	};
5847 };
5948 
6049 /* Bluetooth */
6150 &uart2 {
6251 	pinctrl-names = "default";
6352 	pinctrl-0 = <&pinctrl_uart2>;
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+	uart-has-rtscts;
6454 	status = "okay";
6555 };
6656 
....@@ -68,6 +58,12 @@
6858 &usdhc1 {
6959 	pinctrl-names = "default";
7060 	pinctrl-0 = <&pinctrl_usdhc1>;
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+	bus-width = <4>;
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+	mmc-pwrseq = <&usdhc1_pwrseq>;
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+	vmmc-supply = <&reg_3p3v>;
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+	vqmmc-supply = <&reg_1p8v>;
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+	cap-power-off-card;
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+	keep-power-in-suspend;
7167 	non-removable;
7268 	status = "okay";
7369 
....@@ -94,65 +90,63 @@
9490 };
9591 
9692 &iomuxc {
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-	apf6 {
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-		pinctrl_enet: enetgrp {
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-			fsl,pins = <
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-				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
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-				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
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-				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
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-				MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x130b0
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-				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x130b0
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-				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
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-				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
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-				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
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-				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
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-				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
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-				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
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-				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x13030
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-				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
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-				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
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-				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1f030
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-				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1f030
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-				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
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-			>;
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-		};
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+	pinctrl_enet: enetgrp {
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+		fsl,pins = <
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+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
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+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
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+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
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+			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x130b0
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+			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x130b0
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+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
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+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
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+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
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+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
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+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
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+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
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+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x13030
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+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
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+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
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+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1f030
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+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1f030
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+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
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+		>;
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+	};
119114 
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-		pinctrl_uart2: uart2grp {
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-			fsl,pins = <
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-				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b0
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-				MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b0
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-				MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b0
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-				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b0
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-				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x130b0 /* BT_EN */
127
-			>;
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-		};
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+	pinctrl_uart2: uart2grp {
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+		fsl,pins = <
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+			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b0
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+			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b0
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+			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b0
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+			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b0
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+			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x130b0 /* BT_EN */
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+		>;
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+	};
129124 
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-		pinctrl_usdhc1: usdhc1grp {
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-			fsl,pins = <
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-				MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17059
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-				MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10059
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-				MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17059
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-				MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17059
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-				MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17059
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-				MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17059
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-				MX6QDL_PAD_SD4_DAT0__GPIO2_IO08	0x1b0b0 /* WL_EN */
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-				MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x1b0b0 /* WL_IRQ */
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-			>;
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-		};
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+	pinctrl_usdhc1: usdhc1grp {
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+		fsl,pins = <
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+			MX6QDL_PAD_SD1_CMD__SD1_CMD	0x17059
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+			MX6QDL_PAD_SD1_CLK__SD1_CLK	0x10059
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+			MX6QDL_PAD_SD1_DAT0__SD1_DATA0	0x17059
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+			MX6QDL_PAD_SD1_DAT1__SD1_DATA1	0x17059
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+			MX6QDL_PAD_SD1_DAT2__SD1_DATA2	0x17059
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+			MX6QDL_PAD_SD1_DAT3__SD1_DATA3	0x17059
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+			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08	0x130b0 /* WL_EN */
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+			MX6QDL_PAD_SD4_DAT2__GPIO2_IO10	0x130b0 /* WL_IRQ */
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+		>;
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+	};
142137 
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-		pinctrl_usdhc3: usdhc3grp {
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-			fsl,pins = <
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-				MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
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-				MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
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-				MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
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-				MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
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-				MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
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-				MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
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-				MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
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-				MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
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-				MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
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-				MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
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-			>;
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-		};
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+	pinctrl_usdhc3: usdhc3grp {
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+		fsl,pins = <
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+			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
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+			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
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+			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
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+			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
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+			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
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+			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
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+			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
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+			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
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+			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
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+			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
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+		>;
157151 	};
158152 };