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| 1 | +// SPDX-License-Identifier: GPL-2.0+ OR MIT |
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1 | 2 | /* |
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2 | | - * Copyright 2014-2017 Toradex AG |
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| 3 | + * Copyright 2014-2020 Toradex |
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3 | 4 | * Copyright 2012 Freescale Semiconductor, Inc. |
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4 | 5 | * Copyright 2011 Linaro Ltd. |
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5 | | - * |
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6 | | - * This file is dual-licensed: you can use it either under the terms |
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7 | | - * of the GPL or the X11 license, at your option. Note that this dual |
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8 | | - * licensing only applies to this file, and not this project as a |
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9 | | - * whole. |
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10 | | - * |
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11 | | - * a) This file is free software; you can redistribute it and/or |
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12 | | - * modify it under the terms of the GNU General Public License |
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13 | | - * version 2 as published by the Free Software Foundation. |
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14 | | - * |
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15 | | - * This file is distributed in the hope that it will be useful, |
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16 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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17 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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18 | | - * GNU General Public License for more details. |
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19 | | - * |
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20 | | - * Or, alternatively, |
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21 | | - * |
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22 | | - * b) Permission is hereby granted, free of charge, to any person |
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23 | | - * obtaining a copy of this software and associated documentation |
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24 | | - * files (the "Software"), to deal in the Software without |
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25 | | - * restriction, including without limitation the rights to use, |
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26 | | - * copy, modify, merge, publish, distribute, sublicense, and/or |
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27 | | - * sell copies of the Software, and to permit persons to whom the |
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28 | | - * Software is furnished to do so, subject to the following |
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29 | | - * conditions: |
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30 | | - * |
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31 | | - * The above copyright notice and this permission notice shall be |
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32 | | - * included in all copies or substantial portions of the Software. |
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33 | | - * |
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34 | | - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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35 | | - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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36 | | - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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37 | | - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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38 | | - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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39 | | - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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40 | | - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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41 | | - * OTHER DEALINGS IN THE SOFTWARE. |
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42 | 6 | */ |
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43 | 7 | |
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44 | 8 | #include <dt-bindings/gpio/gpio.h> |
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.. | .. |
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49 | 13 | |
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50 | 14 | /* Will be filled by the bootloader */ |
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51 | 15 | memory@10000000 { |
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| 16 | + device_type = "memory"; |
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52 | 17 | reg = <0x10000000 0>; |
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53 | 18 | }; |
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54 | 19 | |
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.. | .. |
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147 | 112 | }; |
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148 | 113 | |
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149 | 114 | &can1 { |
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150 | | - pinctrl-names = "default"; |
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151 | | - pinctrl-0 = <&pinctrl_flexcan1>; |
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| 115 | + pinctrl-names = "default", "sleep"; |
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| 116 | + pinctrl-0 = <&pinctrl_flexcan1_default>; |
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| 117 | + pinctrl-1 = <&pinctrl_flexcan1_sleep>; |
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152 | 118 | status = "disabled"; |
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153 | 119 | }; |
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154 | 120 | |
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155 | 121 | &can2 { |
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156 | | - pinctrl-names = "default"; |
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157 | | - pinctrl-0 = <&pinctrl_flexcan2>; |
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| 122 | + pinctrl-names = "default", "sleep"; |
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| 123 | + pinctrl-0 = <&pinctrl_flexcan2_default>; |
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| 124 | + pinctrl-1 = <&pinctrl_flexcan2_sleep>; |
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158 | 125 | status = "disabled"; |
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159 | 126 | }; |
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160 | 127 | |
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161 | 128 | /* Apalis SPI1 */ |
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162 | 129 | &ecspi1 { |
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163 | | - cs-gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; |
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| 130 | + cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; |
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164 | 131 | pinctrl-names = "default"; |
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165 | 132 | pinctrl-0 = <&pinctrl_ecspi1>; |
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166 | 133 | status = "disabled"; |
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.. | .. |
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168 | 135 | |
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169 | 136 | /* Apalis SPI2 */ |
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170 | 137 | &ecspi2 { |
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171 | | - cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; |
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| 138 | + cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; |
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172 | 139 | pinctrl-names = "default"; |
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173 | 140 | pinctrl-0 = <&pinctrl_ecspi2>; |
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174 | 141 | status = "disabled"; |
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.. | .. |
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177 | 144 | &fec { |
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178 | 145 | pinctrl-names = "default"; |
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179 | 146 | pinctrl-0 = <&pinctrl_enet>; |
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180 | | - phy-mode = "rgmii"; |
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| 147 | + phy-mode = "rgmii-id"; |
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181 | 148 | phy-handle = <ðphy>; |
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182 | 149 | phy-reset-duration = <10>; |
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183 | 150 | phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; |
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.. | .. |
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197 | 164 | |
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198 | 165 | &hdmi { |
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199 | 166 | pinctrl-names = "default"; |
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200 | | - pinctrl-0 = <&pinctrl_hdmi_ddc>; |
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| 167 | + pinctrl-0 = <&pinctrl_hdmi_ddc &pinctrl_hdmi_cec>; |
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201 | 168 | status = "disabled"; |
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202 | 169 | }; |
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203 | 170 | |
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204 | 171 | /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ |
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205 | 172 | &i2c1 { |
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206 | 173 | clock-frequency = <100000>; |
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207 | | - pinctrl-names = "default"; |
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| 174 | + pinctrl-names = "default", "gpio"; |
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208 | 175 | pinctrl-0 = <&pinctrl_i2c1>; |
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| 176 | + pinctrl-1 = <&pinctrl_i2c1_gpio>; |
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| 177 | + scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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| 178 | + sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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209 | 179 | status = "disabled"; |
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210 | 180 | }; |
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211 | 181 | |
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.. | .. |
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215 | 185 | */ |
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216 | 186 | &i2c2 { |
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217 | 187 | clock-frequency = <100000>; |
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218 | | - pinctrl-names = "default"; |
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| 188 | + pinctrl-names = "default", "gpio"; |
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219 | 189 | pinctrl-0 = <&pinctrl_i2c2>; |
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| 190 | + pinctrl-1 = <&pinctrl_i2c2_gpio>; |
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| 191 | + scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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| 192 | + sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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220 | 193 | status = "okay"; |
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221 | 194 | |
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222 | 195 | pmic: pfuze100@8 { |
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.. | .. |
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313 | 286 | codec: sgtl5000@a { |
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314 | 287 | compatible = "fsl,sgtl5000"; |
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315 | 288 | reg = <0x0a>; |
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| 289 | + pinctrl-names = "default"; |
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| 290 | + pinctrl-0 = <&pinctrl_sgtl5000>; |
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316 | 291 | clocks = <&clks IMX6QDL_CLK_CKO>; |
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317 | 292 | VDDA-supply = <®_module_3v3_audio>; |
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318 | 293 | VDDIO-supply = <®_module_3v3>; |
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.. | .. |
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331 | 306 | id = <0>; |
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332 | 307 | blocks = <0x5>; |
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333 | 308 | irq-trigger = <0x1>; |
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| 309 | + /* 3.25 MHz ADC clock speed */ |
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| 310 | + st,adc-freq = <1>; |
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| 311 | + /* 12-bit ADC */ |
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| 312 | + st,mod-12b = <1>; |
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| 313 | + /* internal ADC reference */ |
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| 314 | + st,ref-sel = <0>; |
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| 315 | + /* ADC converstion time: 80 clocks */ |
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| 316 | + st,sample-time = <4>; |
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334 | 317 | |
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335 | 318 | stmpe_touchscreen { |
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336 | 319 | compatible = "st,stmpe-ts"; |
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337 | | - /* 3.25 MHz ADC clock speed */ |
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338 | | - st,adc-freq = <1>; |
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339 | 320 | /* 8 sample average control */ |
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340 | 321 | st,ave-ctrl = <3>; |
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341 | 322 | /* 7 length fractional part in z */ |
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.. | .. |
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345 | 326 | * current limit value |
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346 | 327 | */ |
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347 | 328 | st,i-drive = <1>; |
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348 | | - /* 12-bit ADC */ |
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349 | | - st,mod-12b = <1>; |
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350 | | - /* internal ADC reference */ |
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351 | | - st,ref-sel = <0>; |
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352 | | - /* ADC converstion time: 80 clocks */ |
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353 | | - st,sample-time = <4>; |
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354 | 329 | /* 1 ms panel driver settling time */ |
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355 | 330 | st,settling = <3>; |
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356 | 331 | /* 5 ms touch detect interrupt delay */ |
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357 | 332 | st,touch-det-delay = <5>; |
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| 333 | + }; |
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| 334 | + |
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| 335 | + stmpe_adc { |
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| 336 | + compatible = "st,stmpe-adc"; |
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| 337 | + /* forbid to use ADC channels 3-0 (touch) */ |
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| 338 | + st,norequest-mask = <0x0F>; |
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358 | 339 | }; |
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359 | 340 | }; |
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360 | 341 | }; |
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.. | .. |
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365 | 346 | */ |
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366 | 347 | &i2c3 { |
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367 | 348 | clock-frequency = <100000>; |
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368 | | - pinctrl-names = "default", "recovery"; |
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| 349 | + pinctrl-names = "default", "gpio"; |
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369 | 350 | pinctrl-0 = <&pinctrl_i2c3>; |
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370 | | - pinctrl-1 = <&pinctrl_i2c3_recovery>; |
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371 | | - scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; |
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372 | | - sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; |
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| 351 | + pinctrl-1 = <&pinctrl_i2c3_gpio>; |
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| 352 | + scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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| 353 | + sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
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373 | 354 | status = "disabled"; |
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374 | 355 | }; |
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375 | 356 | |
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.. | .. |
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392 | 373 | }; |
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393 | 374 | |
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394 | 375 | &pwm4 { |
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| 376 | + #pwm-cells = <2>; |
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395 | 377 | pinctrl-names = "default"; |
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396 | 378 | pinctrl-0 = <&pinctrl_pwm4>; |
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397 | 379 | status = "disabled"; |
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.. | .. |
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482 | 464 | }; |
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483 | 465 | |
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484 | 466 | &iomuxc { |
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485 | | - /* pins used on module */ |
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486 | | - pinctrl-names = "default"; |
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487 | | - pinctrl-0 = <&pinctrl_reset_moci>; |
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488 | | - |
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489 | 467 | pinctrl_apalis_gpio1: gpio2io04grp { |
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490 | 468 | fsl,pins = < |
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491 | 469 | MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 |
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.. | .. |
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540 | 518 | MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 |
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541 | 519 | MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 |
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542 | 520 | MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 |
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543 | | - /* SGTL5000 sys_mclk */ |
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544 | | - MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 |
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545 | 521 | >; |
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546 | 522 | }; |
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547 | 523 | |
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.. | .. |
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596 | 572 | >; |
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597 | 573 | }; |
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598 | 574 | |
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599 | | - pinctrl_flexcan1: flexcan1grp { |
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| 575 | + pinctrl_flexcan1_default: flexcan1defgrp { |
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600 | 576 | fsl,pins = < |
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601 | 577 | MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 |
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602 | 578 | MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 |
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603 | 579 | >; |
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604 | 580 | }; |
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605 | 581 | |
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606 | | - pinctrl_flexcan2: flexcan2grp { |
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| 582 | + pinctrl_flexcan1_sleep: flexcan1slpgrp { |
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| 583 | + fsl,pins = < |
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| 584 | + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0 |
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| 585 | + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0 |
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| 586 | + >; |
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| 587 | + }; |
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| 588 | + |
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| 589 | + pinctrl_flexcan2_default: flexcan2defgrp { |
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607 | 590 | fsl,pins = < |
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608 | 591 | MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 |
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609 | 592 | MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 |
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| 593 | + >; |
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| 594 | + }; |
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| 595 | + pinctrl_flexcan2_sleep: flexcan2slpgrp { |
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| 596 | + fsl,pins = < |
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| 597 | + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x0 |
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| 598 | + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x0 |
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610 | 599 | >; |
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611 | 600 | }; |
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612 | 601 | |
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.. | .. |
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643 | 632 | >; |
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644 | 633 | }; |
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645 | 634 | |
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| 635 | + pinctrl_i2c1_gpio: i2c1gpiogrp { |
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| 636 | + fsl,pins = < |
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| 637 | + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b8b1 |
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| 638 | + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b8b1 |
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| 639 | + >; |
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| 640 | + }; |
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| 641 | + |
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646 | 642 | pinctrl_i2c2: i2c2grp { |
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647 | 643 | fsl,pins = < |
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648 | 644 | MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 |
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649 | 645 | MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 |
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| 646 | + >; |
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| 647 | + }; |
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| 648 | + |
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| 649 | + pinctrl_i2c2_gpio: i2c2gpiogrp { |
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| 650 | + fsl,pins = < |
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| 651 | + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1 |
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| 652 | + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1 |
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650 | 653 | >; |
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651 | 654 | }; |
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652 | 655 | |
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.. | .. |
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657 | 660 | >; |
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658 | 661 | }; |
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659 | 662 | |
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660 | | - pinctrl_i2c3_recovery: i2c3recoverygrp { |
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| 663 | + pinctrl_i2c3_gpio: i2c3gpiogrp { |
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661 | 664 | fsl,pins = < |
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662 | 665 | MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1 |
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663 | 666 | MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1 |
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.. | .. |
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807 | 810 | >; |
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808 | 811 | }; |
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809 | 812 | |
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| 813 | + pinctrl_sgtl5000: sgtl5000grp { |
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| 814 | + fsl,pins = < |
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| 815 | + MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 |
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| 816 | + >; |
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| 817 | + }; |
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| 818 | + |
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810 | 819 | pinctrl_spdif: spdifgrp { |
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811 | 820 | fsl,pins = < |
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812 | 821 | MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 |
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