forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2
kernel/arch/arm/boot/dts/exynos54xx.dtsi
....@@ -25,75 +25,84 @@
2525 usbdrdphy1 = &usbdrd_phy1;
2626 };
2727
28
+ arm_a7_pmu: arm-a7-pmu {
29
+ compatible = "arm,cortex-a7-pmu";
30
+ interrupt-parent = <&gic>;
31
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
32
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
33
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
34
+ <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
35
+ status = "disabled";
36
+ };
37
+
38
+ arm_a15_pmu: arm-a15-pmu {
39
+ compatible = "arm,cortex-a15-pmu";
40
+ interrupt-parent = <&combiner>;
41
+ interrupts = <1 2>,
42
+ <7 0>,
43
+ <16 6>,
44
+ <19 2>;
45
+ status = "disabled";
46
+ };
47
+
48
+ timer: timer {
49
+ compatible = "arm,armv7-timer";
50
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
51
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
52
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
53
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
54
+ clock-frequency = <24000000>;
55
+ };
56
+
2857 soc: soc {
29
- arm_a7_pmu: arm-a7-pmu {
30
- compatible = "arm,cortex-a7-pmu";
31
- interrupt-parent = <&gic>;
32
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
33
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
34
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
35
- <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
36
- status = "disabled";
37
- };
38
-
39
- arm_a15_pmu: arm-a15-pmu {
40
- compatible = "arm,cortex-a15-pmu";
41
- interrupt-parent = <&combiner>;
42
- interrupts = <1 2>,
43
- <7 0>,
44
- <16 6>,
45
- <19 2>;
46
- status = "disabled";
47
- };
48
-
49
- sysram@2020000 {
58
+ sram@2020000 {
5059 compatible = "mmio-sram";
5160 reg = <0x02020000 0x54000>;
5261 #address-cells = <1>;
5362 #size-cells = <1>;
5463 ranges = <0 0x02020000 0x54000>;
5564
56
- smp-sysram@0 {
65
+ smp-sram@0 {
5766 compatible = "samsung,exynos4210-sysram";
5867 reg = <0x0 0x1000>;
5968 };
6069
61
- smp-sysram@53000 {
70
+ smp-sram@53000 {
6271 compatible = "samsung,exynos4210-sysram-ns";
6372 reg = <0x53000 0x1000>;
6473 };
6574 };
6675
67
- mct: mct@101c0000 {
76
+ mct: timer@101c0000 {
6877 compatible = "samsung,exynos4210-mct";
6978 reg = <0x101c0000 0xb00>;
70
- interrupt-parent = <&mct_map>;
71
- interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
72
- <8>, <9>, <10>, <11>;
73
-
74
- mct_map: mct-map {
75
- #interrupt-cells = <1>;
76
- #address-cells = <0>;
77
- #size-cells = <0>;
78
- interrupt-map = <0 &combiner 23 3>,
79
- <1 &combiner 23 4>,
80
- <2 &combiner 25 2>,
81
- <3 &combiner 25 3>,
82
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
83
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
84
- <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
85
- <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
86
- <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
87
- <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
88
- <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
89
- <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
90
- };
79
+ interrupts-extended = <&combiner 23 3>,
80
+ <&combiner 23 4>,
81
+ <&combiner 25 2>,
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+ <&combiner 25 3>,
83
+ <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
84
+ <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
85
+ <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
86
+ <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
87
+ <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
88
+ <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
89
+ <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
90
+ <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
9191 };
9292
9393 watchdog: watchdog@101d0000 {
9494 compatible = "samsung,exynos5420-wdt";
9595 reg = <0x101d0000 0x100>;
9696 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
97
+ };
98
+
99
+ adc: adc@12d10000 {
100
+ compatible = "samsung,exynos-adc-v2";
101
+ reg = <0x12d10000 0x100>;
102
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
103
+ #io-channel-cells = <1>;
104
+ io-channel-ranges;
105
+ status = "disabled";
97106 };
98107
99108 /* i2c_0-3 are defined in exynos5.dtsi */
....@@ -180,26 +189,16 @@
180189 compatible = "samsung,exynos4210-ehci";
181190 reg = <0x12110000 0x100>;
182191 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
183
-
184
- #address-cells = <1>;
185
- #size-cells = <0>;
186
- port@0 {
187
- reg = <0>;
188
- phys = <&usb2_phy 1>;
189
- };
192
+ phys = <&usb2_phy 1>;
193
+ phy-names = "host";
190194 };
191195
192196 usbhost1: usb@12120000 {
193197 compatible = "samsung,exynos4210-ohci";
194198 reg = <0x12120000 0x100>;
195199 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
196
-
197
- #address-cells = <1>;
198
- #size-cells = <0>;
199
- port@0 {
200
- reg = <0>;
201
- phys = <&usb2_phy 1>;
202
- };
200
+ phys = <&usb2_phy 1>;
201
+ phy-names = "host";
203202 };
204203
205204 usb2_phy: phy@12130000 {