add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/dra72-evm-revc.dts
..
..
@@ -1,9 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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- * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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+ * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
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  */
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 #include "dra72-evm-common.dtsi"
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 #include "dra72x-mmc-iodelay.dtsi"
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@@ -15,6 +12,33 @@
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 	memory@0 {
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 		device_type = "memory";
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 		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
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+	};
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+
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+	reserved-memory {
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+		#address-cells = <2>;
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+		#size-cells = <2>;
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+		ranges;
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+
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+		ipu2_cma_pool: ipu2_cma@95800000 {
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+			compatible = "shared-dma-pool";
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+			reg = <0x0 0x95800000 0x0 0x3800000>;
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+			reusable;
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+			status = "okay";
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+		};
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+
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+		dsp1_cma_pool: dsp1_cma@99000000 {
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+			compatible = "shared-dma-pool";
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+			reg = <0x0 0x99000000 0x0 0x4000000>;
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+			reusable;
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+			status = "okay";
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+		};
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+
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+		ipu1_cma_pool: ipu1_cma@9d000000 {
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+			compatible = "shared-dma-pool";
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+			reg = <0x0 0x9d000000 0x0 0x2000000>;
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+			reusable;
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+			status = "okay";
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+		};
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 	};
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 	evm_1v8_sw: fixedregulator-evm_1v8 {
..
..
@@ -53,26 +77,26 @@
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 	interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
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 };
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-&mac {
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+&mac_sw {
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 	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
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 		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */
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 		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */
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-	dual_emac;
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+	status = "okay";
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 };
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-&cpsw_emac0 {
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-	phy_id = <&davinci_mdio>, <2>;
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+&cpsw_port1 {
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+	phy-handle = <&dp83867_0>;
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 	phy-mode = "rgmii-id";
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-	dual_emac_res_vlan = <1>;
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+	ti,dual-emac-pvid = <1>;
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 };
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-&cpsw_emac1 {
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-	phy_id = <&davinci_mdio>, <3>;
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+&cpsw_port2 {
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+	phy-handle = <&dp83867_1>;
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 	phy-mode = "rgmii-id";
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-	dual_emac_res_vlan = <2>;
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+	ti,dual-emac-pvid = <2>;
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 };
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-&davinci_mdio {
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+&davinci_mdio_sw {
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 	dp83867_0: ethernet-phy@2 {
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 		reg = <2>;
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 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
..
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@@ -116,3 +140,18 @@
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 	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
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 	vmmc-supply = <&evm_1v8_sw>;
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 };
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+
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+&ipu2 {
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+	status = "okay";
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+	memory-region = <&ipu2_cma_pool>;
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+};
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+
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+&ipu1 {
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+	status = "okay";
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+	memory-region = <&ipu1_cma_pool>;
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+};
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+
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+&dsp1 {
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+	status = "okay";
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+	memory-region = <&dsp1_cma_pool>;
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+};