add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/at91sam9m10g45ek.dts
..
..
@@ -1,10 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
1
2
 /*
2
3
  * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
3
4
  *
4
5
  *  Copyright (C) 2011 Atmel,
5
6
  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
6
- *
7
- * Licensed under GPLv2 or later.
8
7
  */
9
8
 /dts-v1/;
10
9
 #include "at91sam9g45.dtsi"
..
..
@@ -19,7 +18,7 @@
19
18
 		stdout-path = "serial0:115200n8";
20
19
 	};
21
20
 
22
-	memory {
21
+	memory@70000000 {
23
22
 		reg = <0x70000000 0x4000000>;
24
23
 	};
25
24
 
..
..
@@ -73,9 +72,9 @@
73
72
 					pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
74
73
 					resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>;
75
74
 					pwdn-gpios = <&pioD 13 GPIO_ACTIVE_HIGH>;
76
-					clocks = <&pck1>;
75
+					clocks = <&pmc PMC_TYPE_SYSTEM 9>;
77
76
 					clock-names = "xvclk";
78
-					assigned-clocks = <&pck1>;
77
+					assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
79
78
 					assigned-clock-rates = <25000000>;
80
79
 
81
80
 					port {
..
..
@@ -100,6 +99,7 @@
100
99
 					&pinctrl_board_mmc0
101
100
 					&pinctrl_mmc0_slot0_clk_cmd_dat0
102
101
 					&pinctrl_mmc0_slot0_dat1_3>;
102
+				pinctrl-names = "default";
103
103
 				status = "okay";
104
104
 				slot@0 {
105
105
 					reg = <0>;
..
..
@@ -113,6 +113,7 @@
113
113
 					&pinctrl_board_mmc1
114
114
 					&pinctrl_mmc1_slot0_clk_cmd_dat0
115
115
 					&pinctrl_mmc1_slot0_dat1_3>;
116
+				pinctrl-names = "default";
116
117
 				status = "okay";
117
118
 				slot@0 {
118
119
 					reg = <0>;
..
..
@@ -236,7 +237,7 @@
236
237
 			display = <&display0>;
237
238
 			status = "okay";
238
239
 
239
-			display0: display {
240
+			display0: panel {
240
241
 				bits-per-pixel = <32>;
241
242
 				atmel,lcdcon-backlight;
242
243
 				atmel,dmacon = <0x1>;