forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2
kernel/arch/arm/boot/dts/at91sam9g20.dtsi
....@@ -1,9 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
34 *
45 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5
- *
6
- * Licensed under GPLv2.
76 */
87
98 #include "at91sam9260.dtsi"
....@@ -12,7 +11,7 @@
1211 model = "Atmel AT91SAM9G20 family SoC";
1312 compatible = "atmel,at91sam9g20";
1413
15
- memory {
14
+ memory@20000000 {
1615 reg = <0x20000000 0x08000000>;
1716 };
1817
....@@ -23,6 +22,9 @@
2322 sram1: sram@2fc000 {
2423 compatible = "mmio-sram";
2524 reg = <0x002fc000 0x8000>;
25
+ #address-cells = <1>;
26
+ #size-cells = <1>;
27
+ ranges = <0 0x002fc000 0x8000>;
2628 };
2729
2830 ahb {
....@@ -40,28 +42,7 @@
4042 };
4143
4244 pmc: pmc@fffffc00 {
43
- plla: pllack {
44
- atmel,clk-input-range = <2000000 32000000>;
45
- atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
46
- <695000000 750000000 1 0>,
47
- <645000000 700000000 2 0>,
48
- <595000000 650000000 3 0>,
49
- <545000000 600000000 0 1>,
50
- <495000000 550000000 1 1>,
51
- <445000000 500000000 2 1>,
52
- <400000000 450000000 3 1>;
53
- };
54
-
55
- pllb: pllbck {
56
- compatible = "atmel,at91sam9g20-clk-pllb";
57
- atmel,clk-input-range = <2000000 32000000>;
58
- atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
59
- };
60
-
61
- mck: masterck {
62
- atmel,clk-output-range = <0 133000000>;
63
- atmel,clk-divisors = <1 2 4 6>;
64
- };
45
+ compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
6546 };
6647 };
6748 };