add driver 5G

hc

2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2

 kernel/arch/arm/boot/dts/at91sam9261.dtsi
..
..
@@ -1,18 +1,18 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
1
2
 /*
2
3
  * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3
4
  *
4
5
  *  Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5
- *
6
- * Licensed under GPLv2 only.
7
6
  */
8
7
 
9
-#include "skeleton.dtsi"
10
8
 #include <dt-bindings/pinctrl/at91.h>
11
9
 #include <dt-bindings/interrupt-controller/irq.h>
12
10
 #include <dt-bindings/gpio/gpio.h>
13
11
 #include <dt-bindings/clock/at91.h>
14
12
 
15
13
 / {
14
+	#address-cells = <1>;
15
+	#size-cells = <1>;
16
16
 	model = "Atmel AT91SAM9261 family SoC";
17
17
 	compatible = "atmel,at91sam9261";
18
18
 	interrupt-parent = <&aic>;
..
..
@@ -33,16 +33,18 @@
33
33
 	};
34
34
 
35
35
 	cpus {
36
-		#address-cells = <0>;
36
+		#address-cells = <1>;
37
37
 		#size-cells = <0>;
38
38
 
39
-		cpu {
39
+		cpu@0 {
40
40
 			compatible = "arm,arm926ej-s";
41
41
 			device_type = "cpu";
42
+			reg = <0>;
42
43
 		};
43
44
 	};
44
45
 
45
-	memory {
46
+	memory@20000000 {
47
+		device_type = "memory";
46
48
 		reg = <0x20000000 0x08000000>;
47
49
 	};
48
50
 
..
..
@@ -63,6 +65,9 @@
63
65
 	sram: sram@300000 {
64
66
 		compatible = "mmio-sram";
65
67
 		reg = <0x00300000 0x28000>;
68
+		#address-cells = <1>;
69
+		#size-cells = <1>;
70
+		ranges = <0 0x00300000 0x28000>;
66
71
 	};
67
72
 
68
73
 	ahb {
..
..
@@ -75,7 +80,7 @@
75
80
 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76
81
 			reg = <0x00500000 0x100000>;
77
82
 			interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78
-			clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
83
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
79
84
 			clock-names = "ohci_clk", "hclk", "uhpck";
80
85
 			status = "disabled";
81
86
 		};
..
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@@ -86,7 +91,7 @@
86
91
 			interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87
92
 			pinctrl-names = "default";
88
93
 			pinctrl-0 = <&pinctrl_fb>;
89
-			clocks = <&lcd_clk>, <&hclk1>;
94
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
90
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 			clock-names = "lcdc_clk", "hclk";
91
96
 			status = "disabled";
92
97
 		};
..
..
@@ -106,7 +111,7 @@
106
111
 				  0x5 0x0 0x60000000 0x10000000
107
112
 				  0x6 0x0 0x70000000 0x10000000
108
113
 				  0x7 0x0 0x80000000 0x10000000>;
109
-			clocks = <&mck>;
114
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
110
115
 			status = "disabled";
111
116
 
112
117
 			nand_controller: nand-controller {
..
..
@@ -132,7 +137,7 @@
132
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 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
133
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 					     <18 IRQ_TYPE_LEVEL_HIGH 0>,
134
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 					     <19 IRQ_TYPE_LEVEL_HIGH 0>;
135
-				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
140
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
136
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 				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
137
142
 			};
138
143
 
..
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@@ -140,7 +145,7 @@
140
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 				compatible = "atmel,at91sam9261-udc";
141
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 				reg = <0xfffa4000 0x4000>;
142
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 				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
143
-				clocks = <&udc_clk>, <&udpck>;
148
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
144
149
 				clock-names = "pclk", "hclk";
145
150
 				atmel,matrix = <&matrix>;
146
151
 				status = "disabled";
..
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@@ -154,7 +159,7 @@
154
159
 				pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
155
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 				#address-cells = <1>;
156
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 				#size-cells = <0>;
157
-				clocks = <&mci0_clk>;
162
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
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 				clock-names = "mci_clk";
159
164
 				status = "disabled";
160
165
 			};
..
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@@ -167,7 +172,7 @@
167
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 				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
168
173
 				#address-cells = <1>;
169
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 				#size-cells = <0>;
170
-				clocks = <&twi0_clk>;
175
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
171
176
 				status = "disabled";
172
177
 			};
173
178
 
..
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@@ -179,7 +184,7 @@
179
184
 				atmel,use-dma-tx;
180
185
 				pinctrl-names = "default";
181
186
 				pinctrl-0 = <&pinctrl_usart0>;
182
-				clocks = <&usart0_clk>;
187
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
183
188
 				clock-names = "usart";
184
189
 				status = "disabled";
185
190
 			};
..
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@@ -192,7 +197,7 @@
192
197
 				atmel,use-dma-tx;
193
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 				pinctrl-names = "default";
194
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 				pinctrl-0 = <&pinctrl_usart1>;
195
-				clocks = <&usart1_clk>;
200
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
196
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 				clock-names = "usart";
197
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 				status = "disabled";
198
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 			};
..
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@@ -205,7 +210,7 @@
205
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 				atmel,use-dma-tx;
206
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 				pinctrl-names = "default";
207
212
 				pinctrl-0 = <&pinctrl_usart2>;
208
-				clocks = <&usart2_clk>;
213
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
209
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 				clock-names = "usart";
210
215
 				status = "disabled";
211
216
 			};
..
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@@ -216,7 +221,7 @@
216
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 				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
217
222
 				pinctrl-names = "default";
218
223
 				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
219
-				clocks = <&ssc0_clk>;
224
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
220
225
 				clock-names = "pclk";
221
226
 				status = "disabled";
222
227
 			};
..
..
@@ -227,7 +232,7 @@
227
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 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
228
233
 				pinctrl-names = "default";
229
234
 				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
230
-				clocks = <&ssc1_clk>;
235
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
231
236
 				clock-names = "pclk";
232
237
 				status = "disabled";
233
238
 			};
..
..
@@ -238,7 +243,7 @@
238
243
 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
239
244
 				pinctrl-names = "default";
240
245
 				pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
241
-				clocks = <&ssc2_clk>;
246
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
242
247
 				clock-names = "pclk";
243
248
 				status = "disabled";
244
249
 			};
..
..
@@ -252,7 +257,7 @@
252
257
 				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
253
258
 				pinctrl-names = "default";
254
259
 				pinctrl-0 = <&pinctrl_spi0>;
255
-				clocks = <&spi0_clk>;
260
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
256
261
 				clock-names = "spi_clk";
257
262
 				status = "disabled";
258
263
 			};
..
..
@@ -265,7 +270,7 @@
265
270
 				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
266
271
 				pinctrl-names = "default";
267
272
 				pinctrl-0 = <&pinctrl_spi1>;
268
-				clocks = <&spi1_clk>;
273
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
269
274
 				clock-names = "spi_clk";
270
275
 				status = "disabled";
271
276
 			};
..
..
@@ -299,7 +304,7 @@
299
304
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
300
305
 				pinctrl-names = "default";
301
306
 				pinctrl-0 = <&pinctrl_dbgu>;
302
-				clocks = <&mck>;
307
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
303
308
 				clock-names = "usart";
304
309
 				status = "disabled";
305
310
 			};
..
..
@@ -563,7 +568,7 @@
563
568
 					gpio-controller;
564
569
 					interrupt-controller;
565
570
 					#interrupt-cells = <2>;
566
-					clocks = <&pioA_clk>;
571
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
567
572
 				};
568
573
 
569
574
 				pioB: gpio@fffff600 {
..
..
@@ -574,7 +579,7 @@
574
579
 					gpio-controller;
575
580
 					interrupt-controller;
576
581
 					#interrupt-cells = <2>;
577
-					clocks = <&pioB_clk>;
582
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
578
583
 				};
579
584
 
580
585
 				pioC: gpio@fffff800 {
..
..
@@ -585,7 +590,7 @@
585
590
 					gpio-controller;
586
591
 					interrupt-controller;
587
592
 					#interrupt-cells = <2>;
588
-					clocks = <&pioC_clk>;
593
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
589
594
 				};
590
595
 			};
591
596
 
..
..
@@ -593,250 +598,9 @@
593
598
 				compatible = "atmel,at91sam9261-pmc", "syscon";
594
599
 				reg = <0xfffffc00 0x100>;
595
600
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
596
-				interrupt-controller;
597
-				#address-cells = <1>;
598
-				#size-cells = <0>;
599
-				#interrupt-cells = <1>;
600
-
601
-				main_osc: main_osc {
602
-					compatible = "atmel,at91rm9200-clk-main-osc";
603
-					#clock-cells = <0>;
604
-					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
605
-					clocks = <&main_xtal>;
606
-				};
607
-
608
-				main: mainck {
609
-					compatible = "atmel,at91rm9200-clk-main";
610
-					#clock-cells = <0>;
611
-					clocks = <&main_osc>;
612
-				};
613
-
614
-				plla: pllack {
615
-					compatible = "atmel,at91rm9200-clk-pll";
616
-					#clock-cells = <0>;
617
-					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
618
-					clocks = <&main>;
619
-					reg = <0>;
620
-					atmel,clk-input-range = <1000000 32000000>;
621
-					#atmel,pll-clk-output-range-cells = <4>;
622
-					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
623
-								<190000000 240000000 2 1>;
624
-				};
625
-
626
-				pllb: pllbck {
627
-					compatible = "atmel,at91rm9200-clk-pll";
628
-					#clock-cells = <0>;
629
-					interrupts-extended = <&pmc AT91_PMC_LOCKB>;
630
-					clocks = <&main>;
631
-					reg = <1>;
632
-					atmel,clk-input-range = <1000000 5000000>;
633
-					#atmel,pll-clk-output-range-cells = <4>;
634
-					atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
635
-				};
636
-
637
-				mck: masterck {
638
-					compatible = "atmel,at91rm9200-clk-master";
639
-					#clock-cells = <0>;
640
-					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
641
-					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
642
-					atmel,clk-output-range = <0 94000000>;
643
-					atmel,clk-divisors = <1 2 4 0>;
644
-				};
645
-
646
-				usb: usbck {
647
-					compatible = "atmel,at91rm9200-clk-usb";
648
-					#clock-cells = <0>;
649
-					atmel,clk-divisors = <1 2 4 0>;
650
-					clocks = <&pllb>;
651
-				};
652
-
653
-				prog: progck {
654
-					compatible = "atmel,at91rm9200-clk-programmable";
655
-					#address-cells = <1>;
656
-					#size-cells = <0>;
657
-					interrupt-parent = <&pmc>;
658
-					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
659
-
660
-					prog0: prog0 {
661
-						#clock-cells = <0>;
662
-						reg = <0>;
663
-						interrupts = <AT91_PMC_PCKRDY(0)>;
664
-					};
665
-
666
-					prog1: prog1 {
667
-						#clock-cells = <0>;
668
-						reg = <1>;
669
-						interrupts = <AT91_PMC_PCKRDY(1)>;
670
-					};
671
-
672
-					prog2: prog2 {
673
-						#clock-cells = <0>;
674
-						reg = <2>;
675
-						interrupts = <AT91_PMC_PCKRDY(2)>;
676
-					};
677
-
678
-					prog3: prog3 {
679
-						#clock-cells = <0>;
680
-						reg = <3>;
681
-						interrupts = <AT91_PMC_PCKRDY(3)>;
682
-					};
683
-				};
684
-
685
-				systemck {
686
-					compatible = "atmel,at91rm9200-clk-system";
687
-					#address-cells = <1>;
688
-					#size-cells = <0>;
689
-
690
-					uhpck: uhpck {
691
-						#clock-cells = <0>;
692
-						reg = <6>;
693
-						clocks = <&usb>;
694
-					};
695
-
696
-					udpck: udpck {
697
-						#clock-cells = <0>;
698
-						reg = <7>;
699
-						clocks = <&usb>;
700
-					};
701
-
702
-					pck0: pck0 {
703
-						#clock-cells = <0>;
704
-						reg = <8>;
705
-						clocks = <&prog0>;
706
-					};
707
-
708
-					pck1: pck1 {
709
-						#clock-cells = <0>;
710
-						reg = <9>;
711
-						clocks = <&prog1>;
712
-					};
713
-
714
-					pck2: pck2 {
715
-						#clock-cells = <0>;
716
-						reg = <10>;
717
-						clocks = <&prog2>;
718
-					};
719
-
720
-					pck3: pck3 {
721
-						#clock-cells = <0>;
722
-						reg = <11>;
723
-						clocks = <&prog3>;
724
-					};
725
-
726
-					hclk0: hclk0 {
727
-						#clock-cells = <0>;
728
-						reg = <16>;
729
-						clocks = <&mck>;
730
-					};
731
-
732
-					hclk1: hclk1 {
733
-						#clock-cells = <0>;
734
-						reg = <17>;
735
-						clocks = <&mck>;
736
-					};
737
-				};
738
-
739
-				periphck {
740
-					compatible = "atmel,at91rm9200-clk-peripheral";
741
-					#address-cells = <1>;
742
-					#size-cells = <0>;
743
-					clocks = <&mck>;
744
-
745
-					pioA_clk: pioA_clk {
746
-						#clock-cells = <0>;
747
-						reg = <2>;
748
-					};
749
-
750
-					pioB_clk: pioB_clk {
751
-						#clock-cells = <0>;
752
-						reg = <3>;
753
-					};
754
-
755
-					pioC_clk: pioC_clk {
756
-						#clock-cells = <0>;
757
-						reg = <4>;
758
-					};
759
-
760
-					usart0_clk: usart0_clk {
761
-						#clock-cells = <0>;
762
-						reg = <6>;
763
-					};
764
-
765
-					usart1_clk: usart1_clk {
766
-						#clock-cells = <0>;
767
-						reg = <7>;
768
-					};
769
-
770
-					usart2_clk: usart2_clk {
771
-						#clock-cells = <0>;
772
-						reg = <8>;
773
-					};
774
-
775
-					mci0_clk: mci0_clk {
776
-						#clock-cells = <0>;
777
-						reg = <9>;
778
-					};
779
-
780
-					udc_clk: udc_clk {
781
-						#clock-cells = <0>;
782
-						reg = <10>;
783
-					};
784
-
785
-					twi0_clk: twi0_clk {
786
-						reg = <11>;
787
-						#clock-cells = <0>;
788
-					};
789
-
790
-					spi0_clk: spi0_clk {
791
-						#clock-cells = <0>;
792
-						reg = <12>;
793
-					};
794
-
795
-					spi1_clk: spi1_clk {
796
-						#clock-cells = <0>;
797
-						reg = <13>;
798
-					};
799
-
800
-					ssc0_clk: ssc0_clk {
801
-						#clock-cells = <0>;
802
-						reg = <14>;
803
-					};
804
-
805
-					ssc1_clk: ssc1_clk {
806
-						#clock-cells = <0>;
807
-						reg = <15>;
808
-					};
809
-
810
-					ssc2_clk: ssc2_clk {
811
-						#clock-cells = <0>;
812
-						reg = <16>;
813
-					};
814
-
815
-					tc0_clk: tc0_clk {
816
-						#clock-cells = <0>;
817
-						reg = <17>;
818
-					};
819
-
820
-					tc1_clk: tc1_clk {
821
-						#clock-cells = <0>;
822
-						reg = <18>;
823
-					};
824
-
825
-					tc2_clk: tc2_clk {
826
-						#clock-cells = <0>;
827
-						reg = <19>;
828
-					};
829
-
830
-					ohci_clk: ohci_clk {
831
-						#clock-cells = <0>;
832
-						reg = <20>;
833
-					};
834
-
835
-					lcd_clk: lcd_clk {
836
-						#clock-cells = <0>;
837
-						reg = <21>;
838
-					};
839
-				};
601
+				#clock-cells = <2>;
602
+				clocks = <&slow_xtal>, <&main_xtal>;
603
+				clock-names = "slow_xtal", "main_xtal";
840
604
 			};
841
605
 
842
606
 			rstc@fffffd00 {
..
..
@@ -855,7 +619,7 @@
855
619
 				compatible = "atmel,at91sam9260-pit";
856
620
 				reg = <0xfffffd30 0xf>;
857
621
 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
858
-				clocks = <&mck>;
622
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
859
623
 			};
860
624
 
861
625
 			rtc@fffffd20 {