forked from ~ljy/RK356X_SDK_RELEASE
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2024-01-31 f9004dbfff8a3fbbd7e2a88c8a4327c7f2f8e5b2 
 kernel/arch/arm/boot/dts/am33xx.dtsi
....@@ -1,13 +1,14 @@
11 /*
22  * Device Tree Source for AM33XX SoC
33  *
4
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4
+ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
55  *
66  * This file is licensed under the terms of the GNU General Public License
77  * version 2.  This program is licensed "as is" without any warranty of any
88  * kind, whether express or implied.
99  */
1010 
11
+#include <dt-bindings/bus/ti-sysc.h>
1112 #include <dt-bindings/gpio/gpio.h>
1213 #include <dt-bindings/pinctrl/am33xx.h>
1314 #include <dt-bindings/clock/am3.h>
....@@ -49,6 +50,7 @@
4950 		#size-cells = <0>;
5051 		cpu@0 {
5152 			compatible = "arm,cortex-a8";
53
+			enable-method = "ti,am3352";
5254 			device_type = "cpu";
5355 			reg = <0>;
5456 
....@@ -58,6 +60,17 @@
5860 			clock-names = "cpu";
5961 
6062 			clock-latency = <300000>; /* From omap-cpufreq driver */
63
+			cpu-idle-states = <&mpu_gate>;
64
+		};
65
+
66
+		idle-states {
67
+			mpu_gate: mpu_gate {
68
+				compatible = "arm,idle-state";
69
+				entry-latency-us = <40>;
70
+				exit-latency-us = <90>;
71
+				min-residency-us = <300>;
72
+				ti,idle-wkup-m3;
73
+			};
6174 		};
6275 	};
6376 
....@@ -162,94 +175,30 @@
162175 	 * for the moment, just use a fake OCP bus entry to represent
163176 	 * the whole bus hierarchy.
164177 	 */
165
-	ocp {
178
+	ocp: ocp {
166179 		compatible = "simple-bus";
167180 		#address-cells = <1>;
168181 		#size-cells = <1>;
169182 		ranges;
170183 		ti,hwmods = "l3_main";
171184 
172
-		l4_wkup: l4_wkup@44c00000 {
173
-			compatible = "ti,am3-l4-wkup", "simple-bus";
174
-			#address-cells = <1>;
175
-			#size-cells = <1>;
176
-			ranges = <0 0x44c00000 0x280000>;
177
-
185
+		l4_wkup: interconnect@44c00000 {
178186 			wkup_m3: wkup_m3@100000 {
179187 				compatible = "ti,am3352-wkup-m3";
180188 				reg = <0x100000 0x4000>,
181
-				      <0x180000	0x2000>;
189
+				      <0x180000 0x2000>;
182190 				reg-names = "umem", "dmem";
183191 				ti,hwmods = "wkup_m3";
184192 				ti,pm-firmware = "am335x-pm-firmware.elf";
185193 			};
186
-
187
-			prcm: prcm@200000 {
188
-				compatible = "ti,am3-prcm", "simple-bus";
189
-				reg = <0x200000 0x4000>;
190
-				#address-cells = <1>;
191
-				#size-cells = <1>;
192
-				ranges = <0 0x200000 0x4000>;
193
-
194
-				prcm_clocks: clocks {
195
-					#address-cells = <1>;
196
-					#size-cells = <0>;
197
-				};
198
-
199
-				prcm_clockdomains: clockdomains {
200
-				};
201
-			};
202
-
203
-			scm: scm@210000 {
204
-				compatible = "ti,am3-scm", "simple-bus";
205
-				reg = <0x210000 0x2000>;
206
-				#address-cells = <1>;
207
-				#size-cells = <1>;
208
-				#pinctrl-cells = <1>;
209
-				ranges = <0 0x210000 0x2000>;
210
-
211
-				am33xx_pinmux: pinmux@800 {
212
-					compatible = "pinctrl-single";
213
-					reg = <0x800 0x238>;
214
-					#address-cells = <1>;
215
-					#size-cells = <0>;
216
-					#pinctrl-cells = <1>;
217
-					pinctrl-single,register-width = <32>;
218
-					pinctrl-single,function-mask = <0x7f>;
219
-				};
220
-
221
-				scm_conf: scm_conf@0 {
222
-					compatible = "syscon", "simple-bus";
223
-					reg = <0x0 0x800>;
224
-					#address-cells = <1>;
225
-					#size-cells = <1>;
226
-					ranges = <0 0 0x800>;
227
-
228
-					scm_clocks: clocks {
229
-						#address-cells = <1>;
230
-						#size-cells = <0>;
231
-					};
232
-				};
233
-
234
-				wkup_m3_ipc: wkup_m3_ipc@1324 {
235
-					compatible = "ti,am3352-wkup-m3-ipc";
236
-					reg = <0x1324 0x24>;
237
-					interrupts = <78>;
238
-					ti,rproc = <&wkup_m3>;
239
-					mboxes = <&mailbox &mbox_wkupm3>;
240
-				};
241
-
242
-				edma_xbar: dma-router@f90 {
243
-					compatible = "ti,am335x-edma-crossbar";
244
-					reg = <0xf90 0x40>;
245
-					#dma-cells = <3>;
246
-					dma-requests = <32>;
247
-					dma-masters = <&edma>;
248
-				};
249
-
250
-				scm_clockdomains: clockdomains {
251
-				};
252
-			};
194
+		};
195
+		l4_per: interconnect@48000000 {
196
+		};
197
+		l4_fw: interconnect@47c00000 {
198
+		};
199
+		l4_fast: interconnect@4a000000 {
200
+		};
201
+		l4_mpuss: interconnect@4b140000 {
253202 		};
254203 
255204 		intc: interrupt-controller@48200000 {
....@@ -259,398 +208,163 @@
259208 			reg = <0x48200000 0x1000>;
260209 		};
261210 
262
-		edma: edma@49000000 {
263
-			compatible = "ti,edma3-tpcc";
264
-			ti,hwmods = "tpcc";
265
-			reg =	<0x49000000 0x10000>;
266
-			reg-names = "edma3_cc";
267
-			interrupts = <12 13 14>;
268
-			interrupt-names = "edma3_ccint", "edma3_mperr",
269
-					  "edma3_ccerrint";
270
-			dma-requests = <64>;
271
-			#dma-cells = <2>;
272
-
273
-			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
274
-				   <&edma_tptc2 0>;
275
-
276
-			ti,edma-memcpy-channels = <20 21>;
277
-		};
278
-
279
-		edma_tptc0: tptc@49800000 {
280
-			compatible = "ti,edma3-tptc";
281
-			ti,hwmods = "tptc0";
282
-			reg =	<0x49800000 0x100000>;
283
-			interrupts = <112>;
284
-			interrupt-names = "edma3_tcerrint";
285
-		};
286
-
287
-		edma_tptc1: tptc@49900000 {
288
-			compatible = "ti,edma3-tptc";
289
-			ti,hwmods = "tptc1";
290
-			reg =	<0x49900000 0x100000>;
291
-			interrupts = <113>;
292
-			interrupt-names = "edma3_tcerrint";
293
-		};
294
-
295
-		edma_tptc2: tptc@49a00000 {
296
-			compatible = "ti,edma3-tptc";
297
-			ti,hwmods = "tptc2";
298
-			reg =	<0x49a00000 0x100000>;
299
-			interrupts = <114>;
300
-			interrupt-names = "edma3_tcerrint";
301
-		};
302
-
303
-		gpio0: gpio@44e07000 {
304
-			compatible = "ti,omap4-gpio";
305
-			ti,hwmods = "gpio1";
306
-			gpio-controller;
307
-			#gpio-cells = <2>;
308
-			interrupt-controller;
309
-			#interrupt-cells = <2>;
310
-			reg = <0x44e07000 0x1000>;
311
-			interrupts = <96>;
312
-		};
313
-
314
-		gpio1: gpio@4804c000 {
315
-			compatible = "ti,omap4-gpio";
316
-			ti,hwmods = "gpio2";
317
-			gpio-controller;
318
-			#gpio-cells = <2>;
319
-			interrupt-controller;
320
-			#interrupt-cells = <2>;
321
-			reg = <0x4804c000 0x1000>;
322
-			interrupts = <98>;
323
-		};
324
-
325
-		gpio2: gpio@481ac000 {
326
-			compatible = "ti,omap4-gpio";
327
-			ti,hwmods = "gpio3";
328
-			gpio-controller;
329
-			#gpio-cells = <2>;
330
-			interrupt-controller;
331
-			#interrupt-cells = <2>;
332
-			reg = <0x481ac000 0x1000>;
333
-			interrupts = <32>;
334
-		};
335
-
336
-		gpio3: gpio@481ae000 {
337
-			compatible = "ti,omap4-gpio";
338
-			ti,hwmods = "gpio4";
339
-			gpio-controller;
340
-			#gpio-cells = <2>;
341
-			interrupt-controller;
342
-			#interrupt-cells = <2>;
343
-			reg = <0x481ae000 0x1000>;
344
-			interrupts = <62>;
345
-		};
346
-
347
-		uart0: serial@44e09000 {
348
-			compatible = "ti,am3352-uart", "ti,omap3-uart";
349
-			ti,hwmods = "uart1";
350
-			clock-frequency = <48000000>;
351
-			reg = <0x44e09000 0x2000>;
352
-			interrupts = <72>;
353
-			status = "disabled";
354
-			dmas = <&edma 26 0>, <&edma 27 0>;
355
-			dma-names = "tx", "rx";
356
-		};
357
-
358
-		uart1: serial@48022000 {
359
-			compatible = "ti,am3352-uart", "ti,omap3-uart";
360
-			ti,hwmods = "uart2";
361
-			clock-frequency = <48000000>;
362
-			reg = <0x48022000 0x2000>;
363
-			interrupts = <73>;
364
-			status = "disabled";
365
-			dmas = <&edma 28 0>, <&edma 29 0>;
366
-			dma-names = "tx", "rx";
367
-		};
368
-
369
-		uart2: serial@48024000 {
370
-			compatible = "ti,am3352-uart", "ti,omap3-uart";
371
-			ti,hwmods = "uart3";
372
-			clock-frequency = <48000000>;
373
-			reg = <0x48024000 0x2000>;
374
-			interrupts = <74>;
375
-			status = "disabled";
376
-			dmas = <&edma 30 0>, <&edma 31 0>;
377
-			dma-names = "tx", "rx";
378
-		};
379
-
380
-		uart3: serial@481a6000 {
381
-			compatible = "ti,am3352-uart", "ti,omap3-uart";
382
-			ti,hwmods = "uart4";
383
-			clock-frequency = <48000000>;
384
-			reg = <0x481a6000 0x2000>;
385
-			interrupts = <44>;
386
-			status = "disabled";
387
-		};
388
-
389
-		uart4: serial@481a8000 {
390
-			compatible = "ti,am3352-uart", "ti,omap3-uart";
391
-			ti,hwmods = "uart5";
392
-			clock-frequency = <48000000>;
393
-			reg = <0x481a8000 0x2000>;
394
-			interrupts = <45>;
395
-			status = "disabled";
396
-		};
397
-
398
-		uart5: serial@481aa000 {
399
-			compatible = "ti,am3352-uart", "ti,omap3-uart";
400
-			ti,hwmods = "uart6";
401
-			clock-frequency = <48000000>;
402
-			reg = <0x481aa000 0x2000>;
403
-			interrupts = <46>;
404
-			status = "disabled";
405
-		};
406
-
407
-		i2c0: i2c@44e0b000 {
408
-			compatible = "ti,omap4-i2c";
409
-			#address-cells = <1>;
410
-			#size-cells = <0>;
411
-			ti,hwmods = "i2c1";
412
-			reg = <0x44e0b000 0x1000>;
413
-			interrupts = <70>;
414
-			status = "disabled";
415
-		};
416
-
417
-		i2c1: i2c@4802a000 {
418
-			compatible = "ti,omap4-i2c";
419
-			#address-cells = <1>;
420
-			#size-cells = <0>;
421
-			ti,hwmods = "i2c2";
422
-			reg = <0x4802a000 0x1000>;
423
-			interrupts = <71>;
424
-			status = "disabled";
425
-		};
426
-
427
-		i2c2: i2c@4819c000 {
428
-			compatible = "ti,omap4-i2c";
429
-			#address-cells = <1>;
430
-			#size-cells = <0>;
431
-			ti,hwmods = "i2c3";
432
-			reg = <0x4819c000 0x1000>;
433
-			interrupts = <30>;
434
-			status = "disabled";
435
-		};
436
-
437
-		mmc1: mmc@48060000 {
438
-			compatible = "ti,omap4-hsmmc";
439
-			ti,hwmods = "mmc1";
440
-			ti,dual-volt;
441
-			ti,needs-special-reset;
442
-			ti,needs-special-hs-handling;
443
-			dmas = <&edma_xbar 24 0 0
444
-				&edma_xbar 25 0 0>;
445
-			dma-names = "tx", "rx";
446
-			interrupts = <64>;
447
-			reg = <0x48060000 0x1000>;
448
-			status = "disabled";
449
-		};
450
-
451
-		mmc2: mmc@481d8000 {
452
-			compatible = "ti,omap4-hsmmc";
453
-			ti,hwmods = "mmc2";
454
-			ti,needs-special-reset;
455
-			dmas = <&edma 2 0
456
-				&edma 3 0>;
457
-			dma-names = "tx", "rx";
458
-			interrupts = <28>;
459
-			reg = <0x481d8000 0x1000>;
460
-			status = "disabled";
461
-		};
462
-
463
-		mmc3: mmc@47810000 {
464
-			compatible = "ti,omap4-hsmmc";
465
-			ti,hwmods = "mmc3";
466
-			ti,needs-special-reset;
467
-			interrupts = <29>;
468
-			reg = <0x47810000 0x1000>;
469
-			status = "disabled";
470
-		};
471
-
472
-		hwspinlock: spinlock@480ca000 {
473
-			compatible = "ti,omap4-hwspinlock";
474
-			reg = <0x480ca000 0x1000>;
475
-			ti,hwmods = "spinlock";
476
-			#hwlock-cells = <1>;
477
-		};
478
-
479
-		wdt2: wdt@44e35000 {
480
-			compatible = "ti,omap3-wdt";
481
-			ti,hwmods = "wd_timer2";
482
-			reg = <0x44e35000 0x1000>;
483
-			interrupts = <91>;
484
-		};
485
-
486
-		dcan0: can@481cc000 {
487
-			compatible = "ti,am3352-d_can";
488
-			ti,hwmods = "d_can0";
489
-			reg = <0x481cc000 0x2000>;
490
-			clocks = <&dcan0_fck>;
211
+		target-module@49000000 {
212
+			compatible = "ti,sysc-omap4", "ti,sysc";
213
+			reg = <0x49000000 0x4>;
214
+			reg-names = "rev";
215
+			clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
491216 			clock-names = "fck";
492
-			syscon-raminit = <&scm_conf 0x644 0>;
493
-			interrupts = <52>;
494
-			status = "disabled";
495
-		};
496
-
497
-		dcan1: can@481d0000 {
498
-			compatible = "ti,am3352-d_can";
499
-			ti,hwmods = "d_can1";
500
-			reg = <0x481d0000 0x2000>;
501
-			clocks = <&dcan1_fck>;
502
-			clock-names = "fck";
503
-			syscon-raminit = <&scm_conf 0x644 1>;
504
-			interrupts = <55>;
505
-			status = "disabled";
506
-		};
507
-
508
-		mailbox: mailbox@480c8000 {
509
-			compatible = "ti,omap4-mailbox";
510
-			reg = <0x480C8000 0x200>;
511
-			interrupts = <77>;
512
-			ti,hwmods = "mailbox";
513
-			#mbox-cells = <1>;
514
-			ti,mbox-num-users = <4>;
515
-			ti,mbox-num-fifos = <8>;
516
-			mbox_wkupm3: wkup_m3 {
517
-				ti,mbox-send-noirq;
518
-				ti,mbox-tx = <0 0 0>;
519
-				ti,mbox-rx = <0 0 3>;
520
-			};
521
-		};
522
-
523
-		timer1: timer@44e31000 {
524
-			compatible = "ti,am335x-timer-1ms";
525
-			reg = <0x44e31000 0x400>;
526
-			interrupts = <67>;
527
-			ti,hwmods = "timer1";
528
-			ti,timer-alwon;
529
-			clocks = <&timer1_fck>;
530
-			clock-names = "fck";
531
-		};
532
-
533
-		timer2: timer@48040000 {
534
-			compatible = "ti,am335x-timer";
535
-			reg = <0x48040000 0x400>;
536
-			interrupts = <68>;
537
-			ti,hwmods = "timer2";
538
-			clocks = <&timer2_fck>;
539
-			clock-names = "fck";
540
-		};
541
-
542
-		timer3: timer@48042000 {
543
-			compatible = "ti,am335x-timer";
544
-			reg = <0x48042000 0x400>;
545
-			interrupts = <69>;
546
-			ti,hwmods = "timer3";
547
-		};
548
-
549
-		timer4: timer@48044000 {
550
-			compatible = "ti,am335x-timer";
551
-			reg = <0x48044000 0x400>;
552
-			interrupts = <92>;
553
-			ti,hwmods = "timer4";
554
-			ti,timer-pwm;
555
-		};
556
-
557
-		timer5: timer@48046000 {
558
-			compatible = "ti,am335x-timer";
559
-			reg = <0x48046000 0x400>;
560
-			interrupts = <93>;
561
-			ti,hwmods = "timer5";
562
-			ti,timer-pwm;
563
-		};
564
-
565
-		timer6: timer@48048000 {
566
-			compatible = "ti,am335x-timer";
567
-			reg = <0x48048000 0x400>;
568
-			interrupts = <94>;
569
-			ti,hwmods = "timer6";
570
-			ti,timer-pwm;
571
-		};
572
-
573
-		timer7: timer@4804a000 {
574
-			compatible = "ti,am335x-timer";
575
-			reg = <0x4804a000 0x400>;
576
-			interrupts = <95>;
577
-			ti,hwmods = "timer7";
578
-			ti,timer-pwm;
579
-		};
580
-
581
-		rtc: rtc@44e3e000 {
582
-			compatible = "ti,am3352-rtc", "ti,da830-rtc";
583
-			reg = <0x44e3e000 0x1000>;
584
-			interrupts = <75
585
-				      76>;
586
-			ti,hwmods = "rtc";
587
-			clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
588
-			clock-names = "int-clk";
589
-		};
590
-
591
-		spi0: spi@48030000 {
592
-			compatible = "ti,omap4-mcspi";
593
-			#address-cells = <1>;
594
-			#size-cells = <0>;
595
-			reg = <0x48030000 0x400>;
596
-			interrupts = <65>;
597
-			ti,spi-num-cs = <2>;
598
-			ti,hwmods = "spi0";
599
-			dmas = <&edma 16 0
600
-				&edma 17 0
601
-				&edma 18 0
602
-				&edma 19 0>;
603
-			dma-names = "tx0", "rx0", "tx1", "rx1";
604
-			status = "disabled";
605
-		};
606
-
607
-		spi1: spi@481a0000 {
608
-			compatible = "ti,omap4-mcspi";
609
-			#address-cells = <1>;
610
-			#size-cells = <0>;
611
-			reg = <0x481a0000 0x400>;
612
-			interrupts = <125>;
613
-			ti,spi-num-cs = <2>;
614
-			ti,hwmods = "spi1";
615
-			dmas = <&edma 42 0
616
-				&edma 43 0
617
-				&edma 44 0
618
-				&edma 45 0>;
619
-			dma-names = "tx0", "rx0", "tx1", "rx1";
620
-			status = "disabled";
621
-		};
622
-
623
-		usb: usb@47400000 {
624
-			compatible = "ti,am33xx-usb";
625
-			reg = <0x47400000 0x1000>;
626
-			ranges;
627217 			#address-cells = <1>;
628218 			#size-cells = <1>;
629
-			ti,hwmods = "usb_otg_hs";
630
-			status = "disabled";
219
+			ranges = <0x0 0x49000000 0x10000>;
631220 
632
-			usb_ctrl_mod: control@44e10620 {
633
-				compatible = "ti,am335x-usb-ctrl-module";
634
-				reg = <0x44e10620 0x10
635
-					0x44e10648 0x4>;
636
-				reg-names = "phy_ctrl", "wakeup";
221
+			edma: dma@0 {
222
+				compatible = "ti,edma3-tpcc";
223
+				reg = <0 0x10000>;
224
+				reg-names = "edma3_cc";
225
+				interrupts = <12 13 14>;
226
+				interrupt-names = "edma3_ccint", "edma3_mperr",
227
+						  "edma3_ccerrint";
228
+				dma-requests = <64>;
229
+				#dma-cells = <2>;
230
+
231
+				ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
232
+					   <&edma_tptc2 0>;
233
+
234
+				ti,edma-memcpy-channels = <20 21>;
235
+			};
236
+		};
237
+
238
+		target-module@49800000 {
239
+			compatible = "ti,sysc-omap4", "ti,sysc";
240
+			reg = <0x49800000 0x4>,
241
+			      <0x49800010 0x4>;
242
+			reg-names = "rev", "sysc";
243
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
244
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
245
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
246
+					<SYSC_IDLE_SMART>;
247
+			clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
248
+			clock-names = "fck";
249
+			#address-cells = <1>;
250
+			#size-cells = <1>;
251
+			ranges = <0x0 0x49800000 0x100000>;
252
+
253
+			edma_tptc0: dma@0 {
254
+				compatible = "ti,edma3-tptc";
255
+				reg = <0 0x100000>;
256
+				interrupts = <112>;
257
+				interrupt-names = "edma3_tcerrint";
258
+			};
259
+		};
260
+
261
+		target-module@49900000 {
262
+			compatible = "ti,sysc-omap4", "ti,sysc";
263
+			reg = <0x49900000 0x4>,
264
+			      <0x49900010 0x4>;
265
+			reg-names = "rev", "sysc";
266
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
267
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
268
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
269
+					<SYSC_IDLE_SMART>;
270
+			clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
271
+			clock-names = "fck";
272
+			#address-cells = <1>;
273
+			#size-cells = <1>;
274
+			ranges = <0x0 0x49900000 0x100000>;
275
+
276
+			edma_tptc1: dma@0 {
277
+				compatible = "ti,edma3-tptc";
278
+				reg = <0 0x100000>;
279
+				interrupts = <113>;
280
+				interrupt-names = "edma3_tcerrint";
281
+			};
282
+		};
283
+
284
+		target-module@49a00000 {
285
+			compatible = "ti,sysc-omap4", "ti,sysc";
286
+			reg = <0x49a00000 0x4>,
287
+			      <0x49a00010 0x4>;
288
+			reg-names = "rev", "sysc";
289
+			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
290
+			ti,sysc-midle = <SYSC_IDLE_FORCE>;
291
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
292
+					<SYSC_IDLE_SMART>;
293
+			clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
294
+			clock-names = "fck";
295
+			#address-cells = <1>;
296
+			#size-cells = <1>;
297
+			ranges = <0x0 0x49a00000 0x100000>;
298
+
299
+			edma_tptc2: dma@0 {
300
+				compatible = "ti,edma3-tptc";
301
+				reg = <0 0x100000>;
302
+				interrupts = <114>;
303
+				interrupt-names = "edma3_tcerrint";
304
+			};
305
+		};
306
+
307
+		target-module@47810000 {
308
+			compatible = "ti,sysc-omap2", "ti,sysc";
309
+			reg = <0x478102fc 0x4>,
310
+			      <0x47810110 0x4>,
311
+			      <0x47810114 0x4>;
312
+			reg-names = "rev", "sysc", "syss";
313
+			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
314
+					 SYSC_OMAP2_ENAWAKEUP |
315
+					 SYSC_OMAP2_SOFTRESET |
316
+					 SYSC_OMAP2_AUTOIDLE)>;
317
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318
+					<SYSC_IDLE_NO>,
319
+					<SYSC_IDLE_SMART>;
320
+			ti,syss-mask = <1>;
321
+			clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
322
+			clock-names = "fck";
323
+			#address-cells = <1>;
324
+			#size-cells = <1>;
325
+			ranges = <0x0 0x47810000 0x1000>;
326
+
327
+			mmc3: mmc@0 {
328
+				compatible = "ti,am335-sdhci";
329
+				ti,needs-special-reset;
330
+				interrupts = <29>;
331
+				reg = <0x0 0x1000>;
637332 				status = "disabled";
638333 			};
334
+		};
639335 
640
-			usb0_phy: usb-phy@47401300 {
336
+		usb: target-module@47400000 {
337
+			compatible = "ti,sysc-omap4", "ti,sysc";
338
+			reg = <0x47400000 0x4>,
339
+			      <0x47400010 0x4>;
340
+			reg-names = "rev", "sysc";
341
+			ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
342
+					 SYSC_OMAP4_SOFTRESET)>;
343
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
344
+					<SYSC_IDLE_NO>,
345
+					<SYSC_IDLE_SMART>;
346
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
347
+					<SYSC_IDLE_NO>,
348
+					<SYSC_IDLE_SMART>,
349
+					<SYSC_IDLE_SMART_WKUP>;
350
+			clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
351
+			clock-names = "fck";
352
+			#address-cells = <1>;
353
+			#size-cells = <1>;
354
+			ranges = <0x0 0x47400000 0x8000>;
355
+
356
+			usb0_phy: usb-phy@1300 {
641357 				compatible = "ti,am335x-usb-phy";
642
-				reg = <0x47401300 0x100>;
358
+				reg = <0x1300 0x100>;
643359 				reg-names = "phy";
644
-				status = "disabled";
645360 				ti,ctrl_mod = <&usb_ctrl_mod>;
646361 				#phy-cells = <0>;
647362 			};
648363 
649
-			usb0: usb@47401000 {
364
+			usb0: usb@1400 {
650365 				compatible = "ti,musb-am33xx";
651
-				status = "disabled";
652
-				reg = <0x47401400 0x400
653
-					0x47401000 0x200>;
366
+				reg = <0x1400 0x400>,
367
+				      <0x1000 0x200>;
654368 				reg-names = "mc", "control";
655369 
656370 				interrupts = <18>;
....@@ -686,20 +400,18 @@
686400 					"tx14", "tx15";
687401 			};
688402 
689
-			usb1_phy: usb-phy@47401b00 {
403
+			usb1_phy: usb-phy@1b00 {
690404 				compatible = "ti,am335x-usb-phy";
691
-				reg = <0x47401b00 0x100>;
405
+				reg = <0x1b00 0x100>;
692406 				reg-names = "phy";
693
-				status = "disabled";
694407 				ti,ctrl_mod = <&usb_ctrl_mod>;
695408 				#phy-cells = <0>;
696409 			};
697410 
698
-			usb1: usb@47401800 {
411
+			usb1: usb@1800 {
699412 				compatible = "ti,musb-am33xx";
700
-				status = "disabled";
701
-				reg = <0x47401c00 0x400
702
-					0x47401800 0x200>;
413
+				reg = <0x1c00 0x400>,
414
+				      <0x1800 0x200>;
703415 				reg-names = "mc", "control";
704416 				interrupts = <19>;
705417 				interrupt-names = "mc";
....@@ -734,230 +446,38 @@
734446 					"tx14", "tx15";
735447 			};
736448 
737
-			cppi41dma: dma-controller@47402000 {
449
+			cppi41dma: dma-controller@2000 {
738450 				compatible = "ti,am3359-cppi41";
739
-				reg =  <0x47400000 0x1000
740
-					0x47402000 0x1000
741
-					0x47403000 0x1000
742
-					0x47404000 0x4000>;
451
+				reg =  <0x0000 0x1000>,
452
+				       <0x2000 0x1000>,
453
+				       <0x3000 0x1000>,
454
+				       <0x4000 0x4000>;
743455 				reg-names = "glue", "controller", "scheduler", "queuemgr";
744456 				interrupts = <17>;
745457 				interrupt-names = "glue";
746458 				#dma-cells = <2>;
747459 				#dma-channels = <30>;
748460 				#dma-requests = <256>;
749
-				status = "disabled";
750461 			};
751462 		};
752463 
753
-		epwmss0: epwmss@48300000 {
754
-			compatible = "ti,am33xx-pwmss";
755
-			reg = <0x48300000 0x10>;
756
-			ti,hwmods = "epwmss0";
757
-			#address-cells = <1>;
758
-			#size-cells = <1>;
759
-			status = "disabled";
760
-			ranges = <0x48300100 0x48300100 0x80   /* ECAP */
761
-				  0x48300180 0x48300180 0x80   /* EQEP */
762
-				  0x48300200 0x48300200 0x80>; /* EHRPWM */
763
-
764
-			ecap0: ecap@48300100 {
765
-				compatible = "ti,am3352-ecap",
766
-					     "ti,am33xx-ecap";
767
-				#pwm-cells = <3>;
768
-				reg = <0x48300100 0x80>;
769
-				clocks = <&l4ls_gclk>;
770
-				clock-names = "fck";
771
-				interrupts = <31>;
772
-				interrupt-names = "ecap0";
773
-				status = "disabled";
774
-			};
775
-
776
-			ehrpwm0: pwm@48300200 {
777
-				compatible = "ti,am3352-ehrpwm",
778
-					     "ti,am33xx-ehrpwm";
779
-				#pwm-cells = <3>;
780
-				reg = <0x48300200 0x80>;
781
-				clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
782
-				clock-names = "tbclk", "fck";
783
-				status = "disabled";
784
-			};
785
-		};
786
-
787
-		epwmss1: epwmss@48302000 {
788
-			compatible = "ti,am33xx-pwmss";
789
-			reg = <0x48302000 0x10>;
790
-			ti,hwmods = "epwmss1";
791
-			#address-cells = <1>;
792
-			#size-cells = <1>;
793
-			status = "disabled";
794
-			ranges = <0x48302100 0x48302100 0x80   /* ECAP */
795
-				  0x48302180 0x48302180 0x80   /* EQEP */
796
-				  0x48302200 0x48302200 0x80>; /* EHRPWM */
797
-
798
-			ecap1: ecap@48302100 {
799
-				compatible = "ti,am3352-ecap",
800
-					     "ti,am33xx-ecap";
801
-				#pwm-cells = <3>;
802
-				reg = <0x48302100 0x80>;
803
-				clocks = <&l4ls_gclk>;
804
-				clock-names = "fck";
805
-				interrupts = <47>;
806
-				interrupt-names = "ecap1";
807
-				status = "disabled";
808
-			};
809
-
810
-			ehrpwm1: pwm@48302200 {
811
-				compatible = "ti,am3352-ehrpwm",
812
-					     "ti,am33xx-ehrpwm";
813
-				#pwm-cells = <3>;
814
-				reg = <0x48302200 0x80>;
815
-				clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
816
-				clock-names = "tbclk", "fck";
817
-				status = "disabled";
818
-			};
819
-		};
820
-
821
-		epwmss2: epwmss@48304000 {
822
-			compatible = "ti,am33xx-pwmss";
823
-			reg = <0x48304000 0x10>;
824
-			ti,hwmods = "epwmss2";
825
-			#address-cells = <1>;
826
-			#size-cells = <1>;
827
-			status = "disabled";
828
-			ranges = <0x48304100 0x48304100 0x80   /* ECAP */
829
-				  0x48304180 0x48304180 0x80   /* EQEP */
830
-				  0x48304200 0x48304200 0x80>; /* EHRPWM */
831
-
832
-			ecap2: ecap@48304100 {
833
-				compatible = "ti,am3352-ecap",
834
-					     "ti,am33xx-ecap";
835
-				#pwm-cells = <3>;
836
-				reg = <0x48304100 0x80>;
837
-				clocks = <&l4ls_gclk>;
838
-				clock-names = "fck";
839
-				interrupts = <61>;
840
-				interrupt-names = "ecap2";
841
-				status = "disabled";
842
-			};
843
-
844
-			ehrpwm2: pwm@48304200 {
845
-				compatible = "ti,am3352-ehrpwm",
846
-					     "ti,am33xx-ehrpwm";
847
-				#pwm-cells = <3>;
848
-				reg = <0x48304200 0x80>;
849
-				clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
850
-				clock-names = "tbclk", "fck";
851
-				status = "disabled";
852
-			};
853
-		};
854
-
855
-		mac: ethernet@4a100000 {
856
-			compatible = "ti,am335x-cpsw","ti,cpsw";
857
-			ti,hwmods = "cpgmac0";
858
-			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
859
-			clock-names = "fck", "cpts";
860
-			cpdma_channels = <8>;
861
-			ale_entries = <1024>;
862
-			bd_ram_size = <0x2000>;
863
-			mac_control = <0x20>;
864
-			slaves = <2>;
865
-			active_slave = <0>;
866
-			cpts_clock_mult = <0x80000000>;
867
-			cpts_clock_shift = <29>;
868
-			reg = <0x4a100000 0x800
869
-			       0x4a101200 0x100>;
870
-			#address-cells = <1>;
871
-			#size-cells = <1>;
872
-			/*
873
-			 * c0_rx_thresh_pend
874
-			 * c0_rx_pend
875
-			 * c0_tx_pend
876
-			 * c0_misc_pend
877
-			 */
878
-			interrupts = <40 41 42 43>;
879
-			ranges;
880
-			syscon = <&scm_conf>;
881
-			status = "disabled";
882
-
883
-			davinci_mdio: mdio@4a101000 {
884
-				compatible = "ti,cpsw-mdio","ti,davinci_mdio";
885
-				#address-cells = <1>;
886
-				#size-cells = <0>;
887
-				ti,hwmods = "davinci_mdio";
888
-				bus_freq = <1000000>;
889
-				reg = <0x4a101000 0x100>;
890
-				status = "disabled";
891
-			};
892
-
893
-			cpsw_emac0: slave@4a100200 {
894
-				/* Filled in by U-Boot */
895
-				mac-address = [ 00 00 00 00 00 00 ];
896
-			};
897
-
898
-			cpsw_emac1: slave@4a100300 {
899
-				/* Filled in by U-Boot */
900
-				mac-address = [ 00 00 00 00 00 00 ];
901
-			};
902
-
903
-			phy_sel: cpsw-phy-sel@44e10650 {
904
-				compatible = "ti,am3352-cpsw-phy-sel";
905
-				reg= <0x44e10650 0x4>;
906
-				reg-names = "gmii-sel";
907
-			};
908
-		};
909
-
910
-		ocmcram: ocmcram@40300000 {
464
+		ocmcram: sram@40300000 {
911465 			compatible = "mmio-sram";
912466 			reg = <0x40300000 0x10000>; /* 64k */
913467 			ranges = <0x0 0x40300000 0x10000>;
914468 			#address-cells = <1>;
915469 			#size-cells = <1>;
916470 
917
-			pm_sram_code: pm-sram-code@0 {
471
+			pm_sram_code: pm-code-sram@0 {
918472 				compatible = "ti,sram";
919473 				reg = <0x0 0x1000>;
920474 				protect-exec;
921475 			};
922476 
923
-			pm_sram_data: pm-sram-data@1000 {
477
+			pm_sram_data: pm-data-sram@1000 {
924478 				compatible = "ti,sram";
925479 				reg = <0x1000 0x1000>;
926480 				pool;
927
-			};
928
-		};
929
-
930
-		elm: elm@48080000 {
931
-			compatible = "ti,am3352-elm";
932
-			reg = <0x48080000 0x2000>;
933
-			interrupts = <4>;
934
-			ti,hwmods = "elm";
935
-			status = "disabled";
936
-		};
937
-
938
-		lcdc: lcdc@4830e000 {
939
-			compatible = "ti,am33xx-tilcdc";
940
-			reg = <0x4830e000 0x1000>;
941
-			interrupts = <36>;
942
-			ti,hwmods = "lcdc";
943
-			status = "disabled";
944
-		};
945
-
946
-		tscadc: tscadc@44e0d000 {
947
-			compatible = "ti,am3359-tscadc";
948
-			reg = <0x44e0d000 0x1000>;
949
-			interrupts = <16>;
950
-			ti,hwmods = "adc_tsc";
951
-			status = "disabled";
952
-			dmas = <&edma 53 0>, <&edma 57 0>;
953
-			dma-names = "fifo0", "fifo1";
954
-
955
-			tsc {
956
-				compatible = "ti,am3359-tsc";
957
-			};
958
-			am335x_adc: adc {
959
-				#io-channel-cells = <1>;
960
-				compatible = "ti,am3359-adc";
961481 			};
962482 		};
963483 
....@@ -990,60 +510,138 @@
990510 			status = "disabled";
991511 		};
992512 
993
-		sham: sham@53100000 {
994
-			compatible = "ti,omap4-sham";
995
-			ti,hwmods = "sham";
996
-			reg = <0x53100000 0x200>;
997
-			interrupts = <109>;
998
-			dmas = <&edma 36 0>;
999
-			dma-names = "rx";
513
+		sham_target: target-module@53100000 {
514
+			compatible = "ti,sysc-omap3-sham", "ti,sysc";
515
+			reg = <0x53100100 0x4>,
516
+			      <0x53100110 0x4>,
517
+			      <0x53100114 0x4>;
518
+			reg-names = "rev", "sysc", "syss";
519
+			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
520
+					 SYSC_OMAP2_AUTOIDLE)>;
521
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
522
+					<SYSC_IDLE_NO>,
523
+					<SYSC_IDLE_SMART>;
524
+			ti,syss-mask = <1>;
525
+			/* Domains (P, C): per_pwrdm, l3_clkdm */
526
+			clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
527
+			clock-names = "fck";
528
+			#address-cells = <1>;
529
+			#size-cells = <1>;
530
+			ranges = <0x0 0x53100000 0x1000>;
531
+
532
+			sham: sham@0 {
533
+				compatible = "ti,omap4-sham";
534
+				reg = <0 0x200>;
535
+				interrupts = <109>;
536
+				dmas = <&edma 36 0>;
537
+				dma-names = "rx";
538
+			};
1000539 		};
1001540 
1002
-		aes: aes@53500000 {
1003
-			compatible = "ti,omap4-aes";
1004
-			ti,hwmods = "aes";
1005
-			reg = <0x53500000 0xa0>;
1006
-			interrupts = <103>;
1007
-			dmas = <&edma 6 0>,
1008
-			       <&edma 5 0>;
1009
-			dma-names = "tx", "rx";
541
+		aes_target: target-module@53500000 {
542
+			compatible = "ti,sysc-omap2", "ti,sysc";
543
+			reg = <0x53500080 0x4>,
544
+			      <0x53500084 0x4>,
545
+			      <0x53500088 0x4>;
546
+			reg-names = "rev", "sysc", "syss";
547
+			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
548
+					 SYSC_OMAP2_AUTOIDLE)>;
549
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
550
+					<SYSC_IDLE_NO>,
551
+					<SYSC_IDLE_SMART>,
552
+					<SYSC_IDLE_SMART_WKUP>;
553
+			ti,syss-mask = <1>;
554
+			/* Domains (P, C): per_pwrdm, l3_clkdm */
555
+			clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
556
+			clock-names = "fck";
557
+			#address-cells = <1>;
558
+			#size-cells = <1>;
559
+			ranges = <0x0 0x53500000 0x1000>;
560
+
561
+			aes: aes@0 {
562
+				compatible = "ti,omap4-aes";
563
+				reg = <0 0xa0>;
564
+				interrupts = <103>;
565
+				dmas = <&edma 6 0>,
566
+				       <&edma 5 0>;
567
+				dma-names = "tx", "rx";
568
+			};
1010569 		};
1011570 
1012
-		mcasp0: mcasp@48038000 {
1013
-			compatible = "ti,am33xx-mcasp-audio";
1014
-			ti,hwmods = "mcasp0";
1015
-			reg = <0x48038000 0x2000>,
1016
-			      <0x46000000 0x400000>;
1017
-			reg-names = "mpu", "dat";
1018
-			interrupts = <80>, <81>;
1019
-			interrupt-names = "tx", "rx";
1020
-			status = "disabled";
1021
-			dmas = <&edma 8 2>,
1022
-				<&edma 9 2>;
1023
-			dma-names = "tx", "rx";
1024
-		};
571
+		target-module@56000000 {
572
+			compatible = "ti,sysc-omap4", "ti,sysc";
573
+			reg = <0x5600fe00 0x4>,
574
+			      <0x5600fe10 0x4>;
575
+			reg-names = "rev", "sysc";
576
+			ti,sysc-midle = <SYSC_IDLE_FORCE>,
577
+					<SYSC_IDLE_NO>,
578
+					<SYSC_IDLE_SMART>;
579
+			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
580
+					<SYSC_IDLE_NO>,
581
+					<SYSC_IDLE_SMART>;
582
+			clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
583
+			clock-names = "fck";
584
+			power-domains = <&prm_gfx>;
585
+			resets = <&prm_gfx 0>;
586
+			reset-names = "rstctrl";
587
+			#address-cells = <1>;
588
+			#size-cells = <1>;
589
+			ranges = <0 0x56000000 0x1000000>;
1025590 
1026
-		mcasp1: mcasp@4803c000 {
1027
-			compatible = "ti,am33xx-mcasp-audio";
1028
-			ti,hwmods = "mcasp1";
1029
-			reg = <0x4803C000 0x2000>,
1030
-			      <0x46400000 0x400000>;
1031
-			reg-names = "mpu", "dat";
1032
-			interrupts = <82>, <83>;
1033
-			interrupt-names = "tx", "rx";
1034
-			status = "disabled";
1035
-			dmas = <&edma 10 2>,
1036
-				<&edma 11 2>;
1037
-			dma-names = "tx", "rx";
1038
-		};
1039
-
1040
-		rng: rng@48310000 {
1041
-			compatible = "ti,omap4-rng";
1042
-			ti,hwmods = "rng";
1043
-			reg = <0x48310000 0x2000>;
1044
-			interrupts = <111>;
591
+			/*
592
+			 * Closed source PowerVR driver, no child device
593
+			 * binding or driver in mainline
594
+			 */
1045595 		};
1046596 	};
1047597 };
1048598 
599
+#include "am33xx-l4.dtsi"
1049600 #include "am33xx-clocks.dtsi"
601
+
602
+&prcm {
603
+	prm_per: prm@c00 {
604
+		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
605
+		reg = <0xc00 0x100>;
606
+		#reset-cells = <1>;
607
+	};
608
+
609
+	prm_wkup: prm@d00 {
610
+		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
611
+		reg = <0xd00 0x100>;
612
+		#reset-cells = <1>;
613
+	};
614
+
615
+	prm_device: prm@f00 {
616
+		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
617
+		reg = <0xf00 0x100>;
618
+		#reset-cells = <1>;
619
+	};
620
+
621
+	prm_gfx: prm@1100 {
622
+		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
623
+		reg = <0x1100 0x100>;
624
+		#power-domain-cells = <0>;
625
+		#reset-cells = <1>;
626
+	};
627
+};
628
+
629
+/* Preferred always-on timer for clocksource */
630
+&timer1_target {
631
+	ti,no-reset-on-init;
632
+	ti,no-idle;
633
+	timer@0 {
634
+		assigned-clocks = <&timer1_fck>;
635
+		assigned-clock-parents = <&sys_clkin_ck>;
636
+	};
637
+};
638
+
639
+/* Preferred timer for clockevent */
640
+&timer2_target {
641
+	ti,no-reset-on-init;
642
+	ti,no-idle;
643
+	timer@0 {
644
+		assigned-clocks = <&timer2_fck>;
645
+		assigned-clock-parents = <&sys_clkin_ck>;
646
+	};
647
+};