add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/sound/soc/codecs/wm9081.c
..
..
@@ -1,14 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
1
2
 /*
2
3
  * wm9081.c  --  WM9081 ALSA SoC Audio driver
3
4
  *
4
5
  * Author: Mark Brown
5
6
  *
6
7
  * Copyright 2009-12 Wolfson Microelectronics plc
7
- *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License version 2 as
10
- * published by the Free Software Foundation.
11
- *
12
8
  */
13
9
 
14
10
 #include <linux/module.h>
..
..
@@ -342,7 +338,7 @@
342
338
 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
343
339
 	unsigned int reg;
344
340
 
345
-	reg = snd_soc_component_read32(component, WM9081_ANALOGUE_SPEAKER_2);
341
+	reg = snd_soc_component_read(component, WM9081_ANALOGUE_SPEAKER_2);
346
342
 	if (reg & WM9081_SPK_MODE)
347
343
 		ucontrol->value.enumerated.item[0] = 1;
348
344
 	else
..
..
@@ -361,8 +357,8 @@
361
357
 			    struct snd_ctl_elem_value *ucontrol)
362
358
 {
363
359
 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
364
-	unsigned int reg_pwr = snd_soc_component_read32(component, WM9081_POWER_MANAGEMENT);
365
-	unsigned int reg2 = snd_soc_component_read32(component, WM9081_ANALOGUE_SPEAKER_2);
360
+	unsigned int reg_pwr = snd_soc_component_read(component, WM9081_POWER_MANAGEMENT);
361
+	unsigned int reg2 = snd_soc_component_read(component, WM9081_ANALOGUE_SPEAKER_2);
366
362
 
367
363
 	/* Are we changing anything? */
368
364
 	if (ucontrol->value.enumerated.item[0] ==
..
..
@@ -572,7 +568,7 @@
572
568
 	if (ret != 0)
573
569
 		return ret;
574
570
 
575
-	reg5 = snd_soc_component_read32(component, WM9081_FLL_CONTROL_5);
571
+	reg5 = snd_soc_component_read(component, WM9081_FLL_CONTROL_5);
576
572
 	reg5 &= ~WM9081_FLL_CLK_SRC_MASK;
577
573
 
578
574
 	switch (fll_id) {
..
..
@@ -586,14 +582,14 @@
586
582
 	}
587
583
 
588
584
 	/* Disable CLK_SYS while we reconfigure */
589
-	clk_sys_reg = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_3);
585
+	clk_sys_reg = snd_soc_component_read(component, WM9081_CLOCK_CONTROL_3);
590
586
 	if (clk_sys_reg & WM9081_CLK_SYS_ENA)
591
587
 		snd_soc_component_write(component, WM9081_CLOCK_CONTROL_3,
592
588
 			     clk_sys_reg & ~WM9081_CLK_SYS_ENA);
593
589
 
594
590
 	/* Any FLL configuration change requires that the FLL be
595
591
 	 * disabled first. */
596
-	reg1 = snd_soc_component_read32(component, WM9081_FLL_CONTROL_1);
592
+	reg1 = snd_soc_component_read(component, WM9081_FLL_CONTROL_1);
597
593
 	reg1 &= ~WM9081_FLL_ENA;
598
594
 	snd_soc_component_write(component, WM9081_FLL_CONTROL_1, reg1);
599
595
 
..
..
@@ -609,7 +605,7 @@
609
605
 		     (fll_div.fll_fratio << WM9081_FLL_FRATIO_SHIFT));
610
606
 	snd_soc_component_write(component, WM9081_FLL_CONTROL_3, fll_div.k);
611
607
 
612
-	reg4 = snd_soc_component_read32(component, WM9081_FLL_CONTROL_4);
608
+	reg4 = snd_soc_component_read(component, WM9081_FLL_CONTROL_4);
613
609
 	reg4 &= ~WM9081_FLL_N_MASK;
614
610
 	reg4 |= fll_div.n << WM9081_FLL_N_SHIFT;
615
611
 	snd_soc_component_write(component, WM9081_FLL_CONTROL_4, reg4);
..
..
@@ -711,14 +707,14 @@
711
707
 		return -EINVAL;
712
708
 	}
713
709
 
714
-	reg = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_1);
710
+	reg = snd_soc_component_read(component, WM9081_CLOCK_CONTROL_1);
715
711
 	if (mclkdiv)
716
712
 		reg |= WM9081_MCLKDIV2;
717
713
 	else
718
714
 		reg &= ~WM9081_MCLKDIV2;
719
715
 	snd_soc_component_write(component, WM9081_CLOCK_CONTROL_1, reg);
720
716
 
721
-	reg = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_3);
717
+	reg = snd_soc_component_read(component, WM9081_CLOCK_CONTROL_3);
722
718
 	if (fll)
723
719
 		reg |= WM9081_CLK_SRC_SEL;
724
720
 	else
..
..
@@ -905,7 +901,7 @@
905
901
 {
906
902
 	struct snd_soc_component *component = dai->component;
907
903
 	struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
908
-	unsigned int aif2 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_2);
904
+	unsigned int aif2 = snd_soc_component_read(component, WM9081_AUDIO_INTERFACE_2);
909
905
 
910
906
 	aif2 &= ~(WM9081_AIF_BCLK_INV | WM9081_AIF_LRCLK_INV |
911
907
 		  WM9081_BCLK_DIR | WM9081_LRCLK_DIR | WM9081_AIF_FMT_MASK);
..
..
@@ -933,7 +929,7 @@
933
929
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
934
930
 	case SND_SOC_DAIFMT_DSP_B:
935
931
 		aif2 |= WM9081_AIF_LRCLK_INV;
936
-		/* fall through */
932
+		fallthrough;
937
933
 	case SND_SOC_DAIFMT_DSP_A:
938
934
 		aif2 |= 0x3;
939
935
 		break;
..
..
@@ -1001,18 +997,18 @@
1001
997
 	int ret, i, best, best_val, cur_val;
1002
998
 	unsigned int clk_ctrl2, aif1, aif2, aif3, aif4;
1003
999
 
1004
-	clk_ctrl2 = snd_soc_component_read32(component, WM9081_CLOCK_CONTROL_2);
1000
+	clk_ctrl2 = snd_soc_component_read(component, WM9081_CLOCK_CONTROL_2);
1005
1001
 	clk_ctrl2 &= ~(WM9081_CLK_SYS_RATE_MASK | WM9081_SAMPLE_RATE_MASK);
1006
1002
 
1007
-	aif1 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_1);
1003
+	aif1 = snd_soc_component_read(component, WM9081_AUDIO_INTERFACE_1);
1008
1004
 
1009
-	aif2 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_2);
1005
+	aif2 = snd_soc_component_read(component, WM9081_AUDIO_INTERFACE_2);
1010
1006
 	aif2 &= ~WM9081_AIF_WL_MASK;
1011
1007
 
1012
-	aif3 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_3);
1008
+	aif3 = snd_soc_component_read(component, WM9081_AUDIO_INTERFACE_3);
1013
1009
 	aif3 &= ~WM9081_BCLK_DIV_MASK;
1014
1010
 
1015
-	aif4 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_4);
1011
+	aif4 = snd_soc_component_read(component, WM9081_AUDIO_INTERFACE_4);
1016
1012
 	aif4 &= ~WM9081_LRCLK_RATE_MASK;
1017
1013
 
1018
1014
 	wm9081->fs = params_rate(params);
..
..
@@ -1131,7 +1127,7 @@
1131
1127
 			s->name, s->rate);
1132
1128
 
1133
1129
 		/* If the EQ is enabled then disable it while we write out */
1134
-		eq1 = snd_soc_component_read32(component, WM9081_EQ_1) & WM9081_EQ_ENA;
1130
+		eq1 = snd_soc_component_read(component, WM9081_EQ_1) & WM9081_EQ_ENA;
1135
1131
 		if (eq1 & WM9081_EQ_ENA)
1136
1132
 			snd_soc_component_write(component, WM9081_EQ_1, 0);
1137
1133
 
..
..
@@ -1151,12 +1147,12 @@
1151
1147
 	return 0;
1152
1148
 }
1153
1149
 
1154
-static int wm9081_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1150
+static int wm9081_mute(struct snd_soc_dai *codec_dai, int mute, int direction)
1155
1151
 {
1156
1152
 	struct snd_soc_component *component = codec_dai->component;
1157
1153
 	unsigned int reg;
1158
1154
 
1159
-	reg = snd_soc_component_read32(component, WM9081_DAC_DIGITAL_2);
1155
+	reg = snd_soc_component_read(component, WM9081_DAC_DIGITAL_2);
1160
1156
 
1161
1157
 	if (mute)
1162
1158
 		reg |= WM9081_DAC_MUTE;
..
..
@@ -1192,7 +1188,7 @@
1192
1188
 {
1193
1189
 	struct snd_soc_component *component = dai->component;
1194
1190
 	struct wm9081_priv *wm9081 = snd_soc_component_get_drvdata(component);
1195
-	unsigned int aif1 = snd_soc_component_read32(component, WM9081_AUDIO_INTERFACE_1);
1191
+	unsigned int aif1 = snd_soc_component_read(component, WM9081_AUDIO_INTERFACE_1);
1196
1192
 
1197
1193
 	aif1 &= ~(WM9081_AIFDAC_TDM_SLOT_MASK | WM9081_AIFDAC_TDM_MODE_MASK);
1198
1194
 
..
..
@@ -1236,8 +1232,9 @@
1236
1232
 static const struct snd_soc_dai_ops wm9081_dai_ops = {
1237
1233
 	.hw_params = wm9081_hw_params,
1238
1234
 	.set_fmt = wm9081_set_dai_fmt,
1239
-	.digital_mute = wm9081_digital_mute,
1235
+	.mute_stream = wm9081_mute,
1240
1236
 	.set_tdm_slot = wm9081_set_tdm_slot,
1237
+	.no_capture_mute = 1,
1241
1238
 };
1242
1239
 
1243
1240
 /* We report two channels because the CODEC processes a stereo signal, even