add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/sound/soc/codecs/tlv320aic32x4.h
..
..
@@ -1,9 +1,6 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
1
2
 /*
2
3
  * tlv320aic32x4.h
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
7
4
  */
8
5
 
9
6
 
..
..
@@ -16,6 +13,7 @@
16
13
 extern const struct regmap_config aic32x4_regmap_config;
17
14
 int aic32x4_probe(struct device *dev, struct regmap *regmap);
18
15
 int aic32x4_remove(struct device *dev);
16
+int aic32x4_register_clocks(struct device *dev, const char *mclk_name);
19
17
 
20
18
 /* tlv320aic32x4 register space (in decimal to match datasheet) */
21
19
 
..
..
@@ -77,6 +75,8 @@
77
75
 
78
76
 #define AIC32X4_PWRCFG		AIC32X4_REG(1, 1)
79
77
 #define AIC32X4_LDOCTL		AIC32X4_REG(1, 2)
78
+#define AIC32X4_LPLAYBACK	AIC32X4_REG(1, 3)
79
+#define AIC32X4_RPLAYBACK	AIC32X4_REG(1, 4)
80
80
 #define AIC32X4_OUTPWRCTL	AIC32X4_REG(1, 9)
81
81
 #define AIC32X4_CMMODE		AIC32X4_REG(1, 10)
82
82
 #define AIC32X4_HPLROUTE	AIC32X4_REG(1, 12)
..
..
@@ -96,6 +96,7 @@
96
96
 #define AIC32X4_FLOATINGINPUT	AIC32X4_REG(1, 58)
97
97
 #define AIC32X4_LMICPGAVOL	AIC32X4_REG(1, 59)
98
98
 #define AIC32X4_RMICPGAVOL	AIC32X4_REG(1, 60)
99
+#define AIC32X4_REFPOWERUP	AIC32X4_REG(1, 123)
99
100
 
100
101
 /* Bits, masks, and shifts */
101
102
 
..
..
@@ -195,6 +196,7 @@
195
196
 /* AIC32X4_MICBIAS */
196
197
 #define AIC32X4_MICBIAS_LDOIN		BIT(3)
197
198
 #define AIC32X4_MICBIAS_2075V		0x60
199
+#define AIC32x4_MICBIAS_MASK            GENMASK(6, 3)
198
200
 
199
201
 /* AIC32X4_LMICPGANIN */
200
202
 #define AIC32X4_LMICPGANIN_IN2R_10K	0x10
..
..
@@ -204,4 +206,20 @@
204
206
 #define AIC32X4_RMICPGANIN_IN1L_10K	0x10
205
207
 #define AIC32X4_RMICPGANIN_CM1R_10K	0x40
206
208
 
209
+/* AIC32X4_REFPOWERUP */
210
+#define AIC32X4_REFPOWERUP_SLOW		0x04
211
+#define AIC32X4_REFPOWERUP_40MS		0x05
212
+#define AIC32X4_REFPOWERUP_80MS		0x06
213
+#define AIC32X4_REFPOWERUP_120MS	0x07
214
+
215
+/* Common mask and enable for all of the dividers */
216
+#define AIC32X4_DIVEN           BIT(7)
217
+#define AIC32X4_DIV_MASK        GENMASK(6, 0)
218
+
219
+/* Clock Limits */
220
+#define AIC32X4_MAX_DOSR_FREQ		6200000
221
+#define AIC32X4_MIN_DOSR_FREQ		2800000
222
+#define AIC32X4_MAX_CODEC_CLKIN_FREQ    110000000
223
+#define AIC32X4_MAX_PLL_CLKIN		20000000
224
+
207
225
 #endif				/* _TLV320AIC32X4_H */