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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * max98090.c -- MAX98090 ALSA SoC Audio driver |
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3 | 4 | * |
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4 | 5 | * Copyright 2011-2012 Maxim Integrated Products |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify |
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7 | | - * it under the terms of the GNU General Public License version 2 as |
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8 | | - * published by the Free Software Foundation. |
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9 | 6 | */ |
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10 | 7 | |
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11 | 8 | #include <linux/delay.h> |
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.. | .. |
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314 | 311 | static const DECLARE_TLV_DB_SCALE(max98090_dvg_tlv, 0, 600, 0); |
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315 | 312 | static const DECLARE_TLV_DB_SCALE(max98090_dv_tlv, -1500, 100, 0); |
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316 | 313 | |
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317 | | -static const DECLARE_TLV_DB_SCALE(max98090_sidetone_tlv, -6050, 200, 0); |
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318 | | - |
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319 | | -static const DECLARE_TLV_DB_SCALE(max98090_alc_tlv, -1500, 100, 0); |
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320 | 314 | static const DECLARE_TLV_DB_SCALE(max98090_alcmakeup_tlv, 0, 100, 0); |
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321 | 315 | static const DECLARE_TLV_DB_SCALE(max98090_alccomp_tlv, -3100, 100, 0); |
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322 | 316 | static const DECLARE_TLV_DB_SCALE(max98090_drcexp_tlv, -6600, 100, 0); |
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.. | .. |
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359 | 353 | struct soc_mixer_control *mc = |
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360 | 354 | (struct soc_mixer_control *)kcontrol->private_value; |
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361 | 355 | unsigned int mask = (1 << fls(mc->max)) - 1; |
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362 | | - unsigned int val = snd_soc_component_read32(component, mc->reg); |
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| 356 | + unsigned int val = snd_soc_component_read(component, mc->reg); |
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363 | 357 | unsigned int *select; |
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364 | 358 | |
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365 | 359 | switch (mc->reg) { |
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.. | .. |
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399 | 393 | struct soc_mixer_control *mc = |
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400 | 394 | (struct soc_mixer_control *)kcontrol->private_value; |
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401 | 395 | unsigned int mask = (1 << fls(mc->max)) - 1; |
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402 | | - unsigned int sel = ucontrol->value.integer.value[0]; |
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403 | | - unsigned int val = snd_soc_component_read32(component, mc->reg); |
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| 396 | + int sel_unchecked = ucontrol->value.integer.value[0]; |
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| 397 | + unsigned int sel; |
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| 398 | + unsigned int val = snd_soc_component_read(component, mc->reg); |
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404 | 399 | unsigned int *select; |
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405 | 400 | |
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406 | 401 | switch (mc->reg) { |
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.. | .. |
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419 | 414 | |
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420 | 415 | val = (val >> mc->shift) & mask; |
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421 | 416 | |
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| 417 | + if (sel_unchecked < 0 || sel_unchecked > mc->max) |
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| 418 | + return -EINVAL; |
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| 419 | + sel = sel_unchecked; |
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| 420 | + |
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422 | 421 | *select = sel; |
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423 | 422 | |
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424 | 423 | /* Setting a volume is only valid if it is already On */ |
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.. | .. |
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433 | 432 | mask << mc->shift, |
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434 | 433 | sel << mc->shift); |
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435 | 434 | |
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436 | | - return 0; |
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| 435 | + return *select != val; |
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437 | 436 | } |
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438 | 437 | |
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439 | 438 | static const char *max98090_perf_pwr_text[] = |
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.. | .. |
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736 | 735 | struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); |
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737 | 736 | struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component); |
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738 | 737 | |
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739 | | - unsigned int val = snd_soc_component_read32(component, w->reg); |
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| 738 | + unsigned int val = snd_soc_component_read(component, w->reg); |
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740 | 739 | |
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741 | 740 | if (w->reg == M98090_REG_MIC1_INPUT_LEVEL) |
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742 | 741 | val = (val & M98090_MIC_PA1EN_MASK) >> M98090_MIC_PA1EN_SHIFT; |
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.. | .. |
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816 | 815 | |
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817 | 816 | static const struct snd_kcontrol_new max98090_dmic_mux = |
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818 | 817 | SOC_DAPM_ENUM("DMIC Mux", dmic_mux_enum); |
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819 | | - |
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820 | | -static const char *max98090_micpre_text[] = { "Off", "On" }; |
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821 | | - |
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822 | | -static SOC_ENUM_SINGLE_DECL(max98090_pa1en_enum, |
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823 | | - M98090_REG_MIC1_INPUT_LEVEL, |
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824 | | - M98090_MIC_PA1EN_SHIFT, |
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825 | | - max98090_micpre_text); |
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826 | | - |
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827 | | -static SOC_ENUM_SINGLE_DECL(max98090_pa2en_enum, |
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828 | | - M98090_REG_MIC2_INPUT_LEVEL, |
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829 | | - M98090_MIC_PA2EN_SHIFT, |
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830 | | - max98090_micpre_text); |
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831 | 818 | |
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832 | 819 | /* LINEA mixer switch */ |
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833 | 820 | static const struct snd_kcontrol_new max98090_linea_mixer_controls[] = { |
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.. | .. |
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1514 | 1501 | } |
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1515 | 1502 | |
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1516 | 1503 | /* Skip configuration when operating as slave */ |
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1517 | | - if (!(snd_soc_component_read32(component, M98090_REG_MASTER_MODE) & |
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| 1504 | + if (!(snd_soc_component_read(component, M98090_REG_MASTER_MODE) & |
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1518 | 1505 | M98090_MAS_MASK)) { |
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1519 | 1506 | return; |
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1520 | 1507 | } |
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.. | .. |
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2035 | 2022 | return 0; |
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2036 | 2023 | } |
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2037 | 2024 | |
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2038 | | -static int max98090_dai_digital_mute(struct snd_soc_dai *codec_dai, int mute) |
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| 2025 | +static int max98090_dai_mute(struct snd_soc_dai *codec_dai, int mute, |
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| 2026 | + int direction) |
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2039 | 2027 | { |
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2040 | 2028 | struct snd_soc_component *component = codec_dai->component; |
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2041 | 2029 | int regval; |
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.. | .. |
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2057 | 2045 | case SNDRV_PCM_TRIGGER_START: |
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2058 | 2046 | case SNDRV_PCM_TRIGGER_RESUME: |
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2059 | 2047 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
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2060 | | - if (!max98090->master && dai->active == 1) |
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| 2048 | + if (!max98090->master && snd_soc_dai_active(dai) == 1) |
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2061 | 2049 | queue_delayed_work(system_power_efficient_wq, |
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2062 | 2050 | &max98090->pll_det_enable_work, |
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2063 | 2051 | msecs_to_jiffies(10)); |
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.. | .. |
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2065 | 2053 | case SNDRV_PCM_TRIGGER_STOP: |
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2066 | 2054 | case SNDRV_PCM_TRIGGER_SUSPEND: |
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2067 | 2055 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
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2068 | | - if (!max98090->master && dai->active == 1) |
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| 2056 | + if (!max98090->master && snd_soc_dai_active(dai) == 1) |
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2069 | 2057 | schedule_work(&max98090->pll_det_disable_work); |
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2070 | 2058 | break; |
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2071 | 2059 | default: |
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.. | .. |
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2124 | 2112 | static void max98090_pll_work(struct max98090_priv *max98090) |
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2125 | 2113 | { |
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2126 | 2114 | struct snd_soc_component *component = max98090->component; |
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| 2115 | + unsigned int pll; |
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| 2116 | + int i; |
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2127 | 2117 | |
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2128 | | - if (!snd_soc_component_is_active(component)) |
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| 2118 | + if (!snd_soc_component_active(component)) |
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2129 | 2119 | return; |
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2130 | 2120 | |
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2131 | 2121 | dev_info_ratelimited(component->dev, "PLL unlocked\n"); |
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.. | .. |
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2143 | 2133 | snd_soc_component_update_bits(component, M98090_REG_DEVICE_SHUTDOWN, |
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2144 | 2134 | M98090_SHDNN_MASK, M98090_SHDNN_MASK); |
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2145 | 2135 | |
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2146 | | - /* Give PLL time to lock */ |
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2147 | | - msleep(10); |
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| 2136 | + for (i = 0; i < 10; ++i) { |
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| 2137 | + /* Give PLL time to lock */ |
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| 2138 | + usleep_range(1000, 1200); |
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| 2139 | + |
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| 2140 | + /* Check lock status */ |
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| 2141 | + pll = snd_soc_component_read( |
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| 2142 | + component, M98090_REG_DEVICE_STATUS); |
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| 2143 | + if (!(pll & M98090_ULK_MASK)) |
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| 2144 | + break; |
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| 2145 | + } |
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2148 | 2146 | } |
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2149 | 2147 | |
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2150 | 2148 | static void max98090_jack_work(struct work_struct *work) |
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.. | .. |
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2165 | 2163 | |
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2166 | 2164 | msleep(50); |
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2167 | 2165 | |
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2168 | | - reg = snd_soc_component_read32(component, M98090_REG_JACK_STATUS); |
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| 2166 | + reg = snd_soc_component_read(component, M98090_REG_JACK_STATUS); |
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2169 | 2167 | |
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2170 | 2168 | /* Weak pull up allows only insertion detection */ |
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2171 | 2169 | snd_soc_component_update_bits(component, M98090_REG_JACK_DETECT, |
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2172 | 2170 | M98090_JDWK_MASK, M98090_JDWK_MASK); |
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2173 | 2171 | } else { |
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2174 | | - reg = snd_soc_component_read32(component, M98090_REG_JACK_STATUS); |
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| 2172 | + reg = snd_soc_component_read(component, M98090_REG_JACK_STATUS); |
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2175 | 2173 | } |
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2176 | 2174 | |
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2177 | | - reg = snd_soc_component_read32(component, M98090_REG_JACK_STATUS); |
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| 2175 | + reg = snd_soc_component_read(component, M98090_REG_JACK_STATUS); |
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2178 | 2176 | |
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2179 | 2177 | switch (reg & (M98090_LSNS_MASK | M98090_JKSNS_MASK)) { |
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2180 | 2178 | case M98090_LSNS_MASK | M98090_JKSNS_MASK: |
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.. | .. |
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2355 | 2353 | .set_fmt = max98090_dai_set_fmt, |
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2356 | 2354 | .set_tdm_slot = max98090_set_tdm_slot, |
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2357 | 2355 | .hw_params = max98090_dai_hw_params, |
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2358 | | - .digital_mute = max98090_dai_digital_mute, |
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| 2356 | + .mute_stream = max98090_dai_mute, |
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2359 | 2357 | .trigger = max98090_dai_trigger, |
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| 2358 | + .no_capture_mute = 1, |
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2360 | 2359 | }; |
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2361 | 2360 | |
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2362 | 2361 | static struct snd_soc_dai_driver max98090_dai[] = { |
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.. | .. |
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2414 | 2413 | max98090->pa1en = 0; |
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2415 | 2414 | max98090->pa2en = 0; |
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2416 | 2415 | |
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2417 | | - ret = snd_soc_component_read32(component, M98090_REG_REVISION_ID); |
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| 2416 | + ret = snd_soc_component_read(component, M98090_REG_REVISION_ID); |
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2418 | 2417 | if (ret < 0) { |
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2419 | 2418 | dev_err(component->dev, "Failed to read device revision: %d\n", |
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2420 | 2419 | ret); |
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.. | .. |
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2454 | 2453 | * An old interrupt ocurring prior to installing the ISR |
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2455 | 2454 | * can keep a new interrupt from generating a trigger. |
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2456 | 2455 | */ |
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2457 | | - snd_soc_component_read32(component, M98090_REG_DEVICE_STATUS); |
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| 2456 | + snd_soc_component_read(component, M98090_REG_DEVICE_STATUS); |
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2458 | 2457 | |
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2459 | 2458 | /* High Performance is default */ |
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2460 | 2459 | snd_soc_component_update_bits(component, M98090_REG_DAC_CONTROL, |
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.. | .. |
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2659 | 2658 | |
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2660 | 2659 | return 0; |
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2661 | 2660 | } |
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2662 | | - |
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2663 | | -static int max98090_suspend(struct device *dev) |
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2664 | | -{ |
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2665 | | - return 0; |
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2666 | | -} |
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2667 | 2661 | #endif |
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2668 | 2662 | |
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2669 | 2663 | static const struct dev_pm_ops max98090_pm = { |
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2670 | 2664 | SET_RUNTIME_PM_OPS(max98090_runtime_suspend, |
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2671 | 2665 | max98090_runtime_resume, NULL) |
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2672 | | - SET_SYSTEM_SLEEP_PM_OPS(max98090_suspend, max98090_resume) |
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| 2666 | + SET_SYSTEM_SLEEP_PM_OPS(NULL, max98090_resume) |
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2673 | 2667 | }; |
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2674 | 2668 | |
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2675 | 2669 | static const struct i2c_device_id max98090_i2c_id[] = { |
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