forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920
kernel/drivers/scsi/smartpqi/smartpqi_sis.c
....@@ -1,18 +1,11 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23 * driver for Microsemi PQI-based storage controllers
3
- * Copyright (c) 2016-2017 Microsemi Corporation
4
+ * Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
5
+ * Copyright (c) 2016-2018 Microsemi Corporation
46 * Copyright (c) 2016 PMC-Sierra, Inc.
57 *
6
- * This program is free software; you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License as published by
8
- * the Free Software Foundation; version 2 of the License.
9
- *
10
- * This program is distributed in the hope that it will be useful,
11
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
12
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13
- * NON INFRINGEMENT. See the GNU General Public License for more details.
14
- *
15
- * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
8
+ * Questions/Comments/Bugfixes to storagedev@microchip.com
169 *
1710 */
1811
....@@ -34,6 +27,7 @@
3427 #define SIS_REENABLE_SIS_MODE 0x1
3528 #define SIS_ENABLE_MSIX 0x40
3629 #define SIS_ENABLE_INTX 0x80
30
+#define SIS_SOFT_RESET 0x100
3731 #define SIS_CMD_READY 0x200
3832 #define SIS_TRIGGER_SHUTDOWN 0x800000
3933 #define SIS_PQI_RESET_QUIESCE 0x1000000
....@@ -90,7 +84,7 @@
9084 unsigned long timeout;
9185 u32 status;
9286
93
- timeout = (timeout_secs * HZ) + jiffies;
87
+ timeout = (timeout_secs * PQI_HZ) + jiffies;
9488
9589 while (1) {
9690 status = readl(&ctrl_info->registers->sis_firmware_status);
....@@ -202,7 +196,7 @@
202196 * the top of the loop in order to give the controller time to start
203197 * processing the command before we start polling.
204198 */
205
- timeout = (SIS_CMD_COMPLETE_TIMEOUT_SECS * HZ) + jiffies;
199
+ timeout = (SIS_CMD_COMPLETE_TIMEOUT_SECS * PQI_HZ) + jiffies;
206200 while (1) {
207201 msleep(SIS_CMD_COMPLETE_POLL_INTERVAL_MSECS);
208202 doorbell = readl(&registers->sis_ctrl_to_host_doorbell);
....@@ -316,9 +310,9 @@
316310 put_unaligned_le32(ctrl_info->max_io_slots,
317311 &base_struct->error_buffer_num_elements);
318312
319
- bus_address = pci_map_single(ctrl_info->pci_dev, base_struct,
320
- sizeof(*base_struct), PCI_DMA_TODEVICE);
321
- if (pci_dma_mapping_error(ctrl_info->pci_dev, bus_address)) {
313
+ bus_address = dma_map_single(&ctrl_info->pci_dev->dev, base_struct,
314
+ sizeof(*base_struct), DMA_TO_DEVICE);
315
+ if (dma_mapping_error(&ctrl_info->pci_dev->dev, bus_address)) {
322316 rc = -ENOMEM;
323317 goto out;
324318 }
....@@ -331,9 +325,8 @@
331325 rc = sis_send_sync_cmd(ctrl_info, SIS_CMD_INIT_BASE_STRUCT_ADDRESS,
332326 &params);
333327
334
- pci_unmap_single(ctrl_info->pci_dev, bus_address, sizeof(*base_struct),
335
- PCI_DMA_TODEVICE);
336
-
328
+ dma_unmap_single(&ctrl_info->pci_dev->dev, bus_address,
329
+ sizeof(*base_struct), DMA_TO_DEVICE);
337330 out:
338331 kfree(base_struct_unaligned);
339332
....@@ -349,7 +342,7 @@
349342 u32 doorbell_register;
350343 unsigned long timeout;
351344
352
- timeout = (SIS_DOORBELL_BIT_CLEAR_TIMEOUT_SECS * HZ) + jiffies;
345
+ timeout = (SIS_DOORBELL_BIT_CLEAR_TIMEOUT_SECS * PQI_HZ) + jiffies;
353346
354347 while (1) {
355348 doorbell_register =
....@@ -421,6 +414,12 @@
421414 return readl(&ctrl_info->registers->sis_driver_scratch);
422415 }
423416
417
+void sis_soft_reset(struct pqi_ctrl_info *ctrl_info)
418
+{
419
+ writel(SIS_SOFT_RESET,
420
+ &ctrl_info->registers->sis_host_to_ctrl_doorbell);
421
+}
422
+
424423 static void __attribute__((unused)) verify_structures(void)
425424 {
426425 BUILD_BUG_ON(offsetof(struct sis_base_struct,