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2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920 
 kernel/drivers/scsi/lpfc/lpfc_hw4.h
....@@ -1,7 +1,7 @@
11 /*******************************************************************
22  * This file is part of the Emulex Linux Device Driver for         *
33  * Fibre Channel Host Bus Adapters.                                *
4
- * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
4
+ * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
55  * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.  *
66  * Copyright (C) 2009-2016 Emulex.  All rights reserved.           *
77  * EMULEX and SLI are trademarks of Emulex.                        *
....@@ -19,6 +19,8 @@
1919  * more details, a copy of which can be found in the file COPYING  *
2020  * included with this package.                                     *
2121  *******************************************************************/
22
+
23
+#include <uapi/scsi/fc/fc_els.h>
2224 
2325 /* Macros to deal with bit fields. Each bit field must have 3 #defines
2426  * associated with it (_SHIFT, _MASK, and _WORD).
....@@ -187,6 +189,7 @@
187189 #define LPFC_CTL_PDEV_CTL_FRL_ALL	0x00
188190 #define LPFC_CTL_PDEV_CTL_FRL_FC_FCOE	0x10
189191 #define LPFC_CTL_PDEV_CTL_FRL_NIC	0x20
192
+#define LPFC_CTL_PDEV_CTL_DDL_RAS	0x1000000
190193 
191194 #define LPFC_FW_DUMP_REQUEST    (LPFC_CTL_PDEV_CTL_DD | LPFC_CTL_PDEV_CTL_FRST)
192195 
....@@ -194,8 +197,12 @@
194197 #define LPFC_ACT_INTR_CNT	4
195198 
196199 /* Algrithmns for scheduling FCP commands to WQs */
197
-#define	LPFC_FCP_SCHED_ROUND_ROBIN	0
200
+#define	LPFC_FCP_SCHED_BY_HDWQ		0
198201 #define	LPFC_FCP_SCHED_BY_CPU		1
202
+
203
+/* Algrithmns for NameServer Query after RSCN */
204
+#define LPFC_NS_QUERY_GID_FT	0
205
+#define LPFC_NS_QUERY_GID_PT	1
199206 
200207 /* Delay Multiplier constant */
201208 #define LPFC_DMULT_CONST       651042
....@@ -204,12 +211,17 @@
204211 /* Configuration of Interrupts / sec for entire HBA port */
205212 #define LPFC_MIN_IMAX          5000
206213 #define LPFC_MAX_IMAX          5000000
207
-#define LPFC_DEF_IMAX          150000
214
+#define LPFC_DEF_IMAX          0
215
+
216
+#define LPFC_MAX_AUTO_EQ_DELAY 120
217
+#define LPFC_EQ_DELAY_STEP     15
218
+#define LPFC_EQD_ISR_TRIGGER   20000
219
+/* 1s intervals */
220
+#define LPFC_EQ_DELAY_MSECS    1000
208221 
209222 #define LPFC_MIN_CPU_MAP       0
210
-#define LPFC_MAX_CPU_MAP       2
223
+#define LPFC_MAX_CPU_MAP       1
211224 #define LPFC_HBA_CPU_MAP       1
212
-#define LPFC_DRIVER_CPU_MAP    2  /* Default */
213225 
214226 /* PORT_CAPABILITIES constants. */
215227 #define LPFC_MAX_SUPPORTED_PAGES	8
....@@ -639,6 +651,9 @@
639651 #define lpfc_sliport_status_oti_SHIFT	29
640652 #define lpfc_sliport_status_oti_MASK	0x1
641653 #define lpfc_sliport_status_oti_WORD	word0
654
+#define lpfc_sliport_status_dip_SHIFT	25
655
+#define lpfc_sliport_status_dip_MASK	0x1
656
+#define lpfc_sliport_status_dip_WORD	word0
642657 #define lpfc_sliport_status_rn_SHIFT	24
643658 #define lpfc_sliport_status_rn_MASK	0x1
644659 #define lpfc_sliport_status_rn_WORD	word0
....@@ -965,6 +980,7 @@
965980 /* Subsystem Definitions */
966981 #define LPFC_MBOX_SUBSYSTEM_NA		0x0
967982 #define LPFC_MBOX_SUBSYSTEM_COMMON	0x1
983
+#define LPFC_MBOX_SUBSYSTEM_LOWLEVEL	0xB
968984 #define LPFC_MBOX_SUBSYSTEM_FCOE	0xC
969985 
970986 /* Device Specific Definitions */
....@@ -1030,6 +1046,10 @@
10301046 #define LPFC_MBOX_OPCODE_FCOE_SET_FCLINK_SETTINGS	0x21
10311047 #define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE		0x22
10321048 #define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK	0x23
1049
+#define LPFC_MBOX_OPCODE_FCOE_FC_SET_TRUNK_MODE		0x42
1050
+
1051
+/* Low level Opcodes */
1052
+#define LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION		0x37
10331053 
10341054 /* Mailbox command structures */
10351055 struct eq_context {
....@@ -1162,6 +1182,45 @@
11621182 	struct mbox_header header;
11631183 	uint32_t context[2];
11641184 };
1185
+
1186
+
1187
+
1188
+struct lpfc_mbx_set_ras_fwlog {
1189
+	struct mbox_header header;
1190
+	union {
1191
+		struct {
1192
+			uint32_t word4;
1193
+#define lpfc_fwlog_enable_SHIFT		0
1194
+#define lpfc_fwlog_enable_MASK		0x00000001
1195
+#define lpfc_fwlog_enable_WORD		word4
1196
+#define lpfc_fwlog_loglvl_SHIFT		8
1197
+#define lpfc_fwlog_loglvl_MASK		0x0000000F
1198
+#define lpfc_fwlog_loglvl_WORD		word4
1199
+#define lpfc_fwlog_ra_SHIFT		15
1200
+#define lpfc_fwlog_ra_WORD		0x00000008
1201
+#define lpfc_fwlog_buffcnt_SHIFT	16
1202
+#define lpfc_fwlog_buffcnt_MASK		0x000000FF
1203
+#define lpfc_fwlog_buffcnt_WORD		word4
1204
+#define lpfc_fwlog_buffsz_SHIFT		24
1205
+#define lpfc_fwlog_buffsz_MASK		0x000000FF
1206
+#define lpfc_fwlog_buffsz_WORD		word4
1207
+			uint32_t word5;
1208
+#define lpfc_fwlog_acqe_SHIFT		0
1209
+#define lpfc_fwlog_acqe_MASK		0x0000FFFF
1210
+#define lpfc_fwlog_acqe_WORD		word5
1211
+#define lpfc_fwlog_cqid_SHIFT		16
1212
+#define lpfc_fwlog_cqid_MASK		0x0000FFFF
1213
+#define lpfc_fwlog_cqid_WORD		word5
1214
+#define LPFC_MAX_FWLOG_PAGE	16
1215
+			struct dma_address lwpd;
1216
+			struct dma_address buff_fwlog[LPFC_MAX_FWLOG_PAGE];
1217
+		} request;
1218
+		struct {
1219
+			uint32_t word0;
1220
+		} response;
1221
+	} u;
1222
+};
1223
+
11651224 
11661225 struct cq_context {
11671226 	uint32_t word0;
....@@ -1840,18 +1899,19 @@
18401899 	union {
18411900 		struct {
18421901 			uint32_t word0;
1843
-#define lpfc_mbx_set_diag_lpbk_type_SHIFT	0
1844
-#define lpfc_mbx_set_diag_lpbk_type_MASK	0x00000003
1845
-#define lpfc_mbx_set_diag_lpbk_type_WORD	word0
1846
-#define LPFC_DIAG_LOOPBACK_TYPE_DISABLE		0x0
1847
-#define LPFC_DIAG_LOOPBACK_TYPE_INTERNAL	0x1
1848
-#define LPFC_DIAG_LOOPBACK_TYPE_SERDES		0x2
1849
-#define lpfc_mbx_set_diag_lpbk_link_num_SHIFT	16
1850
-#define lpfc_mbx_set_diag_lpbk_link_num_MASK	0x0000003F
1851
-#define lpfc_mbx_set_diag_lpbk_link_num_WORD	word0
1852
-#define lpfc_mbx_set_diag_lpbk_link_type_SHIFT	22
1853
-#define lpfc_mbx_set_diag_lpbk_link_type_MASK	0x00000003
1854
-#define lpfc_mbx_set_diag_lpbk_link_type_WORD	word0
1902
+#define lpfc_mbx_set_diag_lpbk_type_SHIFT		0
1903
+#define lpfc_mbx_set_diag_lpbk_type_MASK		0x00000003
1904
+#define lpfc_mbx_set_diag_lpbk_type_WORD		word0
1905
+#define LPFC_DIAG_LOOPBACK_TYPE_DISABLE			0x0
1906
+#define LPFC_DIAG_LOOPBACK_TYPE_INTERNAL		0x1
1907
+#define LPFC_DIAG_LOOPBACK_TYPE_SERDES			0x2
1908
+#define LPFC_DIAG_LOOPBACK_TYPE_EXTERNAL_TRUNKED	0x3
1909
+#define lpfc_mbx_set_diag_lpbk_link_num_SHIFT		16
1910
+#define lpfc_mbx_set_diag_lpbk_link_num_MASK		0x0000003F
1911
+#define lpfc_mbx_set_diag_lpbk_link_num_WORD		word0
1912
+#define lpfc_mbx_set_diag_lpbk_link_type_SHIFT		22
1913
+#define lpfc_mbx_set_diag_lpbk_link_type_MASK		0x00000003
1914
+#define lpfc_mbx_set_diag_lpbk_link_type_WORD		word0
18551915 		} req;
18561916 		struct {
18571917 			uint32_t word0;
....@@ -1993,6 +2053,23 @@
19932053 #define lpfc_sli4_sge_last_MASK		0x00000001
19942054 #define lpfc_sli4_sge_last_WORD		word2
19952055 	uint32_t sge_len;
2056
+};
2057
+
2058
+struct sli4_hybrid_sgl {
2059
+	struct list_head list_node;
2060
+	struct sli4_sge *dma_sgl;
2061
+	dma_addr_t dma_phys_sgl;
2062
+};
2063
+
2064
+struct fcp_cmd_rsp_buf {
2065
+	struct list_head list_node;
2066
+
2067
+	/* for storing cmd/rsp dma alloc'ed virt_addr */
2068
+	struct fcp_cmnd *fcp_cmnd;
2069
+	struct fcp_rsp *fcp_rsp;
2070
+
2071
+	/* for storing this cmd/rsp's dma mapped phys addr from per CPU pool */
2072
+	dma_addr_t fcp_cmd_rsp_dma_handle;
19962073 };
19972074 
19982075 struct sli4_sge_diseed {	/* SLI-4 */
....@@ -2248,6 +2325,7 @@
22482325 #define ADD_STATUS_OPERATION_ALREADY_ACTIVE		0x67
22492326 #define ADD_STATUS_FW_NOT_SUPPORTED			0xEB
22502327 #define ADD_STATUS_INVALID_REQUEST			0x4B
2328
+#define ADD_STATUS_FW_DOWNLOAD_HW_DISABLED              0x58
22512329 
22522330 struct lpfc_mbx_sli4_config {
22532331 	struct mbox_header header;
....@@ -2734,6 +2812,18 @@
27342812 #define lpfc_mbx_rd_conf_lnk_ldv_SHIFT		8
27352813 #define lpfc_mbx_rd_conf_lnk_ldv_MASK		0x00000001
27362814 #define lpfc_mbx_rd_conf_lnk_ldv_WORD		word2
2815
+#define lpfc_mbx_rd_conf_trunk_SHIFT		12
2816
+#define lpfc_mbx_rd_conf_trunk_MASK		0x0000000F
2817
+#define lpfc_mbx_rd_conf_trunk_WORD		word2
2818
+#define lpfc_mbx_rd_conf_pt_SHIFT		20
2819
+#define lpfc_mbx_rd_conf_pt_MASK		0x00000003
2820
+#define lpfc_mbx_rd_conf_pt_WORD		word2
2821
+#define lpfc_mbx_rd_conf_tf_SHIFT		22
2822
+#define lpfc_mbx_rd_conf_tf_MASK		0x00000001
2823
+#define lpfc_mbx_rd_conf_tf_WORD		word2
2824
+#define lpfc_mbx_rd_conf_ptv_SHIFT		23
2825
+#define lpfc_mbx_rd_conf_ptv_MASK		0x00000001
2826
+#define lpfc_mbx_rd_conf_ptv_WORD		word2
27372827 #define lpfc_mbx_rd_conf_topology_SHIFT		24
27382828 #define lpfc_mbx_rd_conf_topology_MASK		0x000000FF
27392829 #define lpfc_mbx_rd_conf_topology_WORD		word2
....@@ -3220,6 +3310,9 @@
32203310 #define cfg_xib_SHIFT				4
32213311 #define cfg_xib_MASK				0x00000001
32223312 #define cfg_xib_WORD				word19
3313
+#define cfg_xpsgl_SHIFT				6
3314
+#define cfg_xpsgl_MASK				0x00000001
3315
+#define cfg_xpsgl_WORD				word19
32233316 #define cfg_eqdr_SHIFT				8
32243317 #define cfg_eqdr_MASK				0x00000001
32253318 #define cfg_eqdr_WORD				word19
....@@ -3230,6 +3323,13 @@
32303323 #define cfg_bv1s_SHIFT                          10
32313324 #define cfg_bv1s_MASK                           0x00000001
32323325 #define cfg_bv1s_WORD                           word19
3326
+#define cfg_pvl_SHIFT				13
3327
+#define cfg_pvl_MASK				0x00000001
3328
+#define cfg_pvl_WORD				word19
3329
+
3330
+#define cfg_nsler_SHIFT                         12
3331
+#define cfg_nsler_MASK                          0x00000001
3332
+#define cfg_nsler_WORD                          word19
32333333 
32343334 	uint32_t word20;
32353335 #define cfg_max_tow_xri_SHIFT			0
....@@ -3264,7 +3364,8 @@
32643364 };
32653365 
32663366 #define LPFC_SET_UE_RECOVERY		0x10
3267
-#define LPFC_SET_MDS_DIAGS		0x11
3367
+#define LPFC_SET_MDS_DIAGS		0x12
3368
+#define LPFC_SET_DUAL_DUMP		0x1e
32683369 struct lpfc_mbx_set_feature {
32693370 	struct mbox_header header;
32703371 	uint32_t feature;
....@@ -3273,12 +3374,21 @@
32733374 #define lpfc_mbx_set_feature_UER_SHIFT  0
32743375 #define lpfc_mbx_set_feature_UER_MASK   0x00000001
32753376 #define lpfc_mbx_set_feature_UER_WORD   word6
3276
-#define lpfc_mbx_set_feature_mds_SHIFT  0
3377
+#define lpfc_mbx_set_feature_mds_SHIFT  2
32773378 #define lpfc_mbx_set_feature_mds_MASK   0x00000001
32783379 #define lpfc_mbx_set_feature_mds_WORD   word6
32793380 #define lpfc_mbx_set_feature_mds_deep_loopbk_SHIFT  1
32803381 #define lpfc_mbx_set_feature_mds_deep_loopbk_MASK   0x00000001
32813382 #define lpfc_mbx_set_feature_mds_deep_loopbk_WORD   word6
3383
+#define lpfc_mbx_set_feature_dd_SHIFT		0
3384
+#define lpfc_mbx_set_feature_dd_MASK		0x00000001
3385
+#define lpfc_mbx_set_feature_dd_WORD		word6
3386
+#define lpfc_mbx_set_feature_ddquery_SHIFT	1
3387
+#define lpfc_mbx_set_feature_ddquery_MASK	0x00000001
3388
+#define lpfc_mbx_set_feature_ddquery_WORD	word6
3389
+#define LPFC_DISABLE_DUAL_DUMP		0
3390
+#define LPFC_ENABLE_DUAL_DUMP		1
3391
+#define LPFC_QUERY_OP_DUAL_DUMP		2
32823392 	uint32_t word7;
32833393 #define lpfc_mbx_set_feature_UERP_SHIFT 0
32843394 #define lpfc_mbx_set_feature_UERP_MASK  0x0000ffff
....@@ -3298,6 +3408,15 @@
32983408 	uint8_t  data[LPFC_HOST_OS_DRIVER_VERSION_SIZE];
32993409 };
33003410 
3411
+struct lpfc_mbx_set_trunk_mode {
3412
+	struct mbox_header header;
3413
+	uint32_t word0;
3414
+#define lpfc_mbx_set_trunk_mode_WORD      word0
3415
+#define lpfc_mbx_set_trunk_mode_SHIFT     0
3416
+#define lpfc_mbx_set_trunk_mode_MASK      0xFF
3417
+	uint32_t word1;
3418
+	uint32_t word2;
3419
+};
33013420 
33023421 struct lpfc_mbx_get_sli4_parameters {
33033422 	struct mbox_header header;
....@@ -3619,6 +3738,9 @@
36193738 #define lpfc_wr_object_eof_SHIFT		31
36203739 #define lpfc_wr_object_eof_MASK			0x00000001
36213740 #define lpfc_wr_object_eof_WORD			word4
3741
+#define lpfc_wr_object_eas_SHIFT		29
3742
+#define lpfc_wr_object_eas_MASK			0x00000001
3743
+#define lpfc_wr_object_eas_WORD			word4
36223744 #define lpfc_wr_object_write_length_SHIFT	0
36233745 #define lpfc_wr_object_write_length_MASK	0x00FFFFFF
36243746 #define lpfc_wr_object_write_length_WORD	word4
....@@ -3629,6 +3751,18 @@
36293751 		} request;
36303752 		struct {
36313753 			uint32_t actual_write_length;
3754
+			uint32_t word5;
3755
+#define lpfc_wr_object_change_status_SHIFT	0
3756
+#define lpfc_wr_object_change_status_MASK	0x000000FF
3757
+#define lpfc_wr_object_change_status_WORD	word5
3758
+#define LPFC_CHANGE_STATUS_NO_RESET_NEEDED	0x00
3759
+#define LPFC_CHANGE_STATUS_PHYS_DEV_RESET	0x01
3760
+#define LPFC_CHANGE_STATUS_FW_RESET		0x02
3761
+#define LPFC_CHANGE_STATUS_PORT_MIGRATION	0x04
3762
+#define LPFC_CHANGE_STATUS_PCI_RESET		0x05
3763
+#define lpfc_wr_object_csf_SHIFT		8
3764
+#define lpfc_wr_object_csf_MASK			0x00000001
3765
+#define lpfc_wr_object_csf_WORD			word5
36323766 		} response;
36333767 	} u;
36343768 };
....@@ -3695,7 +3829,9 @@
36953829 		struct lpfc_mbx_set_feature  set_feature;
36963830 		struct lpfc_mbx_memory_dump_type3 mem_dump_type3;
36973831 		struct lpfc_mbx_set_host_data set_host_data;
3832
+		struct lpfc_mbx_set_trunk_mode set_trunk_mode;
36983833 		struct lpfc_mbx_nop nop;
3834
+		struct lpfc_mbx_set_ras_fwlog ras_fwlog;
36993835 	} un;
37003836 };
37013837 
....@@ -3830,6 +3966,8 @@
38303966 	uint32_t trailer;
38313967 };
38323968 
3969
+extern const char *const trunk_errmsg[];
3970
+
38333971 struct lpfc_acqe_fc_la {
38343972 	uint32_t word0;
38353973 #define lpfc_acqe_fc_la_speed_SHIFT		24
....@@ -3863,6 +4001,7 @@
38634001 #define LPFC_FC_LA_TYPE_MDS_LINK_DOWN	0x4
38644002 #define LPFC_FC_LA_TYPE_MDS_LOOPBACK	0x5
38654003 #define LPFC_FC_LA_TYPE_UNEXP_WWPN	0x6
4004
+#define LPFC_FC_LA_TYPE_TRUNKING_EVENT  0x7
38664005 #define lpfc_acqe_fc_la_port_type_SHIFT		6
38674006 #define lpfc_acqe_fc_la_port_type_MASK		0x00000003
38684007 #define lpfc_acqe_fc_la_port_type_WORD		word0
....@@ -3871,6 +4010,32 @@
38714010 #define lpfc_acqe_fc_la_port_number_SHIFT	0
38724011 #define lpfc_acqe_fc_la_port_number_MASK	0x0000003F
38734012 #define lpfc_acqe_fc_la_port_number_WORD	word0
4013
+
4014
+/* Attention Type is 0x07 (Trunking Event) word0 */
4015
+#define lpfc_acqe_fc_la_trunk_link_status_port0_SHIFT	16
4016
+#define lpfc_acqe_fc_la_trunk_link_status_port0_MASK	0x0000001
4017
+#define lpfc_acqe_fc_la_trunk_link_status_port0_WORD	word0
4018
+#define lpfc_acqe_fc_la_trunk_link_status_port1_SHIFT	17
4019
+#define lpfc_acqe_fc_la_trunk_link_status_port1_MASK	0x0000001
4020
+#define lpfc_acqe_fc_la_trunk_link_status_port1_WORD	word0
4021
+#define lpfc_acqe_fc_la_trunk_link_status_port2_SHIFT	18
4022
+#define lpfc_acqe_fc_la_trunk_link_status_port2_MASK	0x0000001
4023
+#define lpfc_acqe_fc_la_trunk_link_status_port2_WORD	word0
4024
+#define lpfc_acqe_fc_la_trunk_link_status_port3_SHIFT	19
4025
+#define lpfc_acqe_fc_la_trunk_link_status_port3_MASK	0x0000001
4026
+#define lpfc_acqe_fc_la_trunk_link_status_port3_WORD	word0
4027
+#define lpfc_acqe_fc_la_trunk_config_port0_SHIFT	20
4028
+#define lpfc_acqe_fc_la_trunk_config_port0_MASK		0x0000001
4029
+#define lpfc_acqe_fc_la_trunk_config_port0_WORD		word0
4030
+#define lpfc_acqe_fc_la_trunk_config_port1_SHIFT	21
4031
+#define lpfc_acqe_fc_la_trunk_config_port1_MASK		0x0000001
4032
+#define lpfc_acqe_fc_la_trunk_config_port1_WORD		word0
4033
+#define lpfc_acqe_fc_la_trunk_config_port2_SHIFT	22
4034
+#define lpfc_acqe_fc_la_trunk_config_port2_MASK		0x0000001
4035
+#define lpfc_acqe_fc_la_trunk_config_port2_WORD		word0
4036
+#define lpfc_acqe_fc_la_trunk_config_port3_SHIFT	23
4037
+#define lpfc_acqe_fc_la_trunk_config_port3_MASK		0x0000001
4038
+#define lpfc_acqe_fc_la_trunk_config_port3_WORD		word0
38744039 	uint32_t word1;
38754040 #define lpfc_acqe_fc_la_llink_spd_SHIFT		16
38764041 #define lpfc_acqe_fc_la_llink_spd_MASK		0x0000FFFF
....@@ -3878,6 +4043,12 @@
38784043 #define lpfc_acqe_fc_la_fault_SHIFT		0
38794044 #define lpfc_acqe_fc_la_fault_MASK		0x000000FF
38804045 #define lpfc_acqe_fc_la_fault_WORD		word1
4046
+#define lpfc_acqe_fc_la_trunk_fault_SHIFT		0
4047
+#define lpfc_acqe_fc_la_trunk_fault_MASK		0x0000000F
4048
+#define lpfc_acqe_fc_la_trunk_fault_WORD		word1
4049
+#define lpfc_acqe_fc_la_trunk_linkmask_SHIFT		4
4050
+#define lpfc_acqe_fc_la_trunk_linkmask_MASK		0x000000F
4051
+#define lpfc_acqe_fc_la_trunk_linkmask_WORD		word1
38814052 #define LPFC_FC_LA_FAULT_NONE		0x0
38824053 #define LPFC_FC_LA_FAULT_LOCAL		0x1
38834054 #define LPFC_FC_LA_FAULT_REMOTE		0x2
....@@ -3948,6 +4119,8 @@
39484119 #define LPFC_SLI_EVENT_TYPE_DIAG_DUMP		0x5
39494120 #define LPFC_SLI_EVENT_TYPE_MISCONFIGURED	0x9
39504121 #define LPFC_SLI_EVENT_TYPE_REMOTE_DPORT	0xA
4122
+#define LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN	0xF
4123
+#define LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE	0x10
39514124 };
39524125 
39534126 /*
....@@ -4025,6 +4198,12 @@
40254198 #define wqe_rcvoxid_SHIFT     16
40264199 #define wqe_rcvoxid_MASK      0x0000FFFF
40274200 #define wqe_rcvoxid_WORD      word9
4201
+#define wqe_sof_SHIFT         24
4202
+#define wqe_sof_MASK          0x000000FF
4203
+#define wqe_sof_WORD          word9
4204
+#define wqe_eof_SHIFT         16
4205
+#define wqe_eof_MASK          0x000000FF
4206
+#define wqe_eof_WORD          word9
40284207 	uint32_t word10;
40294208 #define wqe_ebde_cnt_SHIFT    0
40304209 #define wqe_ebde_cnt_MASK     0x0000000f
....@@ -4102,6 +4281,9 @@
41024281 #define wqe_sup_SHIFT         6
41034282 #define wqe_sup_MASK          0x00000001
41044283 #define wqe_sup_WORD          word11
4284
+#define wqe_ffrq_SHIFT         6
4285
+#define wqe_ffrq_MASK          0x00000001
4286
+#define wqe_ffrq_WORD          word11
41054287 #define wqe_wqec_SHIFT        7
41064288 #define wqe_wqec_MASK         0x00000001
41074289 #define wqe_wqec_WORD         word11
....@@ -4306,6 +4488,7 @@
43064488 #define prli_type_code_WORD             word1
43074489 	uint32_t word_rsvd2;
43084490 	uint32_t word_rsvd3;
4491
+
43094492 	uint32_t word4;
43104493 #define prli_fba_SHIFT                  0
43114494 #define prli_fba_MASK                   0x00000001
....@@ -4322,6 +4505,9 @@
43224505 #define prli_conf_SHIFT                 7
43234506 #define prli_conf_MASK                  0x00000001
43244507 #define prli_conf_WORD                  word4
4508
+#define prli_nsler_SHIFT		8
4509
+#define prli_nsler_MASK			0x00000001
4510
+#define prli_nsler_WORD			word4
43254511 	uint32_t word5;
43264512 #define prli_fb_sz_SHIFT                0
43274513 #define prli_fb_sz_MASK                 0x0000ffff
....@@ -4336,6 +4522,7 @@
43364522 	uint32_t rsvd_12_15[4];         /* word 12-15 */
43374523 };
43384524 
4525
+#define INHIBIT_ABORT 1
43394526 #define T_REQUEST_TAG 3
43404527 #define T_XRI_TAG 1
43414528 
....@@ -4444,6 +4631,23 @@
44444631 	uint32_t fc_hdr_wd5;           /* word 15 */
44454632 };
44464633 
4634
+#define ELS_RDF_REG_TAG_CNT		4
4635
+struct lpfc_els_rdf_reg_desc {
4636
+	struct fc_df_desc_fpin_reg	reg_desc;	/* descriptor header */
4637
+	__be32				desc_tags[ELS_RDF_REG_TAG_CNT];
4638
+							/* tags in reg_desc */
4639
+};
4640
+
4641
+struct lpfc_els_rdf_req {
4642
+	struct fc_els_rdf		rdf;	   /* hdr up to descriptors */
4643
+	struct lpfc_els_rdf_reg_desc	reg_d1;	/* 1st descriptor */
4644
+};
4645
+
4646
+struct lpfc_els_rdf_rsp {
4647
+	struct fc_els_rdf_resp		rdf_resp;  /* hdr up to descriptors */
4648
+	struct lpfc_els_rdf_reg_desc	reg_d1;	/* 1st descriptor */
4649
+};
4650
+
44474651 union lpfc_wqe {
44484652 	uint32_t words[16];
44494653 	struct lpfc_wqe_generic generic;
....@@ -4484,8 +4688,8 @@
44844688 	struct send_frame_wqe send_frame;
44854689 };
44864690 
4487
-#define MAGIC_NUMER_G6 0xFEAA0003
4488
-#define MAGIC_NUMER_G7 0xFEAA0005
4691
+#define MAGIC_NUMBER_G6 0xFEAA0003
4692
+#define MAGIC_NUMBER_G7 0xFEAA0005
44894693 
44904694 struct lpfc_grp_hdr {
44914695 	uint32_t size;