add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/phy/amlogic/phy-meson8b-usb2.c
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@@ -1,14 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Meson8, Meson8b and GXBB USB2 PHY driver
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  *
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  * Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program. If not, see <http://www.gnu.org/licenses/>.
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  */
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7
 
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 #include <linux/clk.h>
..
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@@ -16,6 +10,8 @@
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 #include <linux/io.h>
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11
 #include <linux/module.h>
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 #include <linux/of_device.h>
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+#include <linux/property.h>
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+#include <linux/regmap.h>
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 #include <linux/reset.h>
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 #include <linux/phy/phy.h>
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 #include <linux/platform_device.h>
..
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@@ -82,6 +78,17 @@
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 	#define REG_ADP_BC_ACA_PIN_FLOAT		BIT(26)
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79
 
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 #define REG_DBG_UART					0x10
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+	#define REG_DBG_UART_BYPASS_SEL			BIT(0)
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+	#define REG_DBG_UART_BYPASS_DM_EN		BIT(1)
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+	#define REG_DBG_UART_BYPASS_DP_EN		BIT(2)
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+	#define REG_DBG_UART_BYPASS_DM_DATA		BIT(3)
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+	#define REG_DBG_UART_BYPASS_DP_DATA		BIT(4)
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+	#define REG_DBG_UART_FSV_MINUS			BIT(5)
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+	#define REG_DBG_UART_FSV_PLUS			BIT(6)
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+	#define REG_DBG_UART_FSV_BURN_IN_TEST		BIT(7)
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+	#define REG_DBG_UART_LOOPBACK_EN_B		BIT(8)
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+	#define REG_DBG_UART_SET_IDDQ			BIT(9)
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+	#define REG_DBG_UART_ATE_RESET			BIT(10)
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92
 
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 #define REG_TEST					0x14
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 	#define REG_TEST_DATA_IN_MASK			GENMASK(3, 0)
..
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@@ -110,35 +117,30 @@
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 #define RESET_COMPLETE_TIME				500
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 #define ACA_ENABLE_COMPLETE_TIME			50
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119
 
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-struct phy_meson8b_usb2_priv {
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-	void __iomem		*regs;
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-	enum usb_dr_mode	dr_mode;
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-	struct clk		*clk_usb_general;
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-	struct clk		*clk_usb;
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-	struct reset_control	*reset;
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+struct phy_meson8b_usb2_match_data {
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+	bool			host_enable_aca;
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122
 };
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123
 
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-static u32 phy_meson8b_usb2_read(struct phy_meson8b_usb2_priv *phy_priv,
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-				 u32 reg)
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-{
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-	return readl(phy_priv->regs + reg);
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-}
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+struct phy_meson8b_usb2_priv {
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+	struct regmap					*regmap;
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+	enum usb_dr_mode				dr_mode;
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+	struct clk					*clk_usb_general;
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+	struct clk					*clk_usb;
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+	struct reset_control				*reset;
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+	const struct phy_meson8b_usb2_match_data	*match;
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+};
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132
 
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-static void phy_meson8b_usb2_mask_bits(struct phy_meson8b_usb2_priv *phy_priv,
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-				       u32 reg, u32 mask, u32 value)
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-{
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-	u32 data;
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-
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-	data = phy_meson8b_usb2_read(phy_priv, reg);
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-	data &= ~mask;
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-	data |= (value & mask);
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-
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-	writel(data, phy_priv->regs + reg);
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-}
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+static const struct regmap_config phy_meson8b_usb2_regmap_conf = {
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+	.reg_bits = 8,
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+	.val_bits = 32,
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+	.reg_stride = 4,
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+	.max_register = REG_TUNE,
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+};
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139
 
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 static int phy_meson8b_usb2_power_on(struct phy *phy)
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 {
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 	struct phy_meson8b_usb2_priv *priv = phy_get_drvdata(phy);
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+	u32 reg;
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 	int ret;
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 	if (!IS_ERR_OR_NULL(priv->reset)) {
..
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@@ -162,38 +164,43 @@
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 		return ret;
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 	}
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-	phy_meson8b_usb2_mask_bits(priv, REG_CONFIG, REG_CONFIG_CLK_32k_ALTSEL,
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-				   REG_CONFIG_CLK_32k_ALTSEL);
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+	regmap_update_bits(priv->regmap, REG_CONFIG, REG_CONFIG_CLK_32k_ALTSEL,
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+			   REG_CONFIG_CLK_32k_ALTSEL);
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169
 
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-	phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK,
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-				   0x2 << REG_CTRL_REF_CLK_SEL_SHIFT);
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+	regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK,
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+			   0x2 << REG_CTRL_REF_CLK_SEL_SHIFT);
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-	phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_FSEL_MASK,
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-				   0x5 << REG_CTRL_FSEL_SHIFT);
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+	regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK,
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+			   0x5 << REG_CTRL_FSEL_SHIFT);
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 	/* reset the PHY */
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-	phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_POWER_ON_RESET,
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-				   REG_CTRL_POWER_ON_RESET);
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+	regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET,
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+			   REG_CTRL_POWER_ON_RESET);
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 	udelay(RESET_COMPLETE_TIME);
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-	phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_POWER_ON_RESET, 0);
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+	regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, 0);
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 	udelay(RESET_COMPLETE_TIME);
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182
 
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-	phy_meson8b_usb2_mask_bits(priv, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT,
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-				   REG_CTRL_SOF_TOGGLE_OUT);
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+	regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT,
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+			   REG_CTRL_SOF_TOGGLE_OUT);
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 	if (priv->dr_mode == USB_DR_MODE_HOST) {
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-		phy_meson8b_usb2_mask_bits(priv, REG_ADP_BC,
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+		regmap_update_bits(priv->regmap, REG_DBG_UART,
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+				   REG_DBG_UART_SET_IDDQ, 0);
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+
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+		if (priv->match->host_enable_aca) {
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+			regmap_update_bits(priv->regmap, REG_ADP_BC,
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 					   REG_ADP_BC_ACA_ENABLE,
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 					   REG_ADP_BC_ACA_ENABLE);
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-		udelay(ACA_ENABLE_COMPLETE_TIME);
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+			udelay(ACA_ENABLE_COMPLETE_TIME);
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196
 
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-		if (phy_meson8b_usb2_read(priv, REG_ADP_BC) &
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-			REG_ADP_BC_ACA_PIN_FLOAT) {
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-			dev_warn(&phy->dev, "USB ID detect failed!\n");
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-			clk_disable_unprepare(priv->clk_usb);
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-			clk_disable_unprepare(priv->clk_usb_general);
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-			return -EINVAL;
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+			regmap_read(priv->regmap, REG_ADP_BC, &reg);
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+			if (reg & REG_ADP_BC_ACA_PIN_FLOAT) {
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+				dev_warn(&phy->dev, "USB ID detect failed!\n");
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+				clk_disable_unprepare(priv->clk_usb);
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+				clk_disable_unprepare(priv->clk_usb_general);
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+				return -EINVAL;
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+			}
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 		}
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 	}
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..
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@@ -203,6 +210,11 @@
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 static int phy_meson8b_usb2_power_off(struct phy *phy)
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 {
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 	struct phy_meson8b_usb2_priv *priv = phy_get_drvdata(phy);
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+
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+	if (priv->dr_mode == USB_DR_MODE_HOST)
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+		regmap_update_bits(priv->regmap, REG_DBG_UART,
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+				   REG_DBG_UART_SET_IDDQ,
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+				   REG_DBG_UART_SET_IDDQ);
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 	clk_disable_unprepare(priv->clk_usb);
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 	clk_disable_unprepare(priv->clk_usb_general);
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@@ -219,18 +231,26 @@
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 static int phy_meson8b_usb2_probe(struct platform_device *pdev)
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 {
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 	struct phy_meson8b_usb2_priv *priv;
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-	struct resource *res;
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 	struct phy *phy;
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 	struct phy_provider *phy_provider;
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+	void __iomem *base;
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237
 
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 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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 	if (!priv)
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 		return -ENOMEM;
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-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	priv->regs = devm_ioremap_resource(&pdev->dev, res);
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-	if (IS_ERR(priv->regs))
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-		return PTR_ERR(priv->regs);
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+	base = devm_platform_ioremap_resource(pdev, 0);
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+	if (IS_ERR(base))
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+		return PTR_ERR(base);
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+
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+	priv->match = device_get_match_data(&pdev->dev);
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+	if (!priv->match)
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+		return -ENODEV;
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+
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+	priv->regmap = devm_regmap_init_mmio(&pdev->dev, base,
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+					     &phy_meson8b_usb2_regmap_conf);
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+	if (IS_ERR(priv->regmap))
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+		return PTR_ERR(priv->regmap);
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 	priv->clk_usb_general = devm_clk_get(&pdev->dev, "usb_general");
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 	if (IS_ERR(priv->clk_usb_general))
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@@ -241,8 +261,9 @@
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 		return PTR_ERR(priv->clk_usb);
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 	priv->reset = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
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-	if (PTR_ERR(priv->reset) == -EPROBE_DEFER)
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-		return PTR_ERR(priv->reset);
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+	if (IS_ERR(priv->reset))
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+		return dev_err_probe(&pdev->dev, PTR_ERR(priv->reset),
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+				     "Failed to get the reset line");
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 	priv->dr_mode = of_usb_get_dr_mode_by_phy(pdev->dev.of_node, -1);
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 	if (priv->dr_mode == USB_DR_MODE_UNKNOWN) {
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@@ -265,11 +286,32 @@
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 	return PTR_ERR_OR_ZERO(phy_provider);
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 }
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288
 
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+static const struct phy_meson8b_usb2_match_data phy_meson8_usb2_match_data = {
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+	.host_enable_aca = false,
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+};
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+
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+static const struct phy_meson8b_usb2_match_data phy_meson8b_usb2_match_data = {
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+	.host_enable_aca = true,
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+};
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+
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 static const struct of_device_id phy_meson8b_usb2_of_match[] = {
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-	{ .compatible = "amlogic,meson8-usb2-phy", },
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-	{ .compatible = "amlogic,meson8b-usb2-phy", },
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-	{ .compatible = "amlogic,meson-gxbb-usb2-phy", },
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-	{ },
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+	{
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+		.compatible = "amlogic,meson8-usb2-phy",
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+		.data = &phy_meson8_usb2_match_data
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+	},
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+	{
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+		.compatible = "amlogic,meson8b-usb2-phy",
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+		.data = &phy_meson8b_usb2_match_data
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+	},
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+	{
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+		.compatible = "amlogic,meson8m2-usb2-phy",
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+		.data = &phy_meson8b_usb2_match_data
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+	},
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+	{
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+		.compatible = "amlogic,meson-gxbb-usb2-phy",
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+		.data = &phy_meson8b_usb2_match_data
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+	},
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+	{ /* sentinel */ }
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 };
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 MODULE_DEVICE_TABLE(of, phy_meson8b_usb2_of_match);
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317
 
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@@ -283,5 +325,5 @@
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 module_platform_driver(phy_meson8b_usb2_driver);
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 MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
286
-MODULE_DESCRIPTION("Meson8, Meson8b and GXBB USB2 PHY driver");
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+MODULE_DESCRIPTION("Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY driver");
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 MODULE_LICENSE("GPL");