add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/net/wireless/rsi/rsi_hal.h
..
..
@@ -81,6 +81,21 @@
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 #define RSI_WATCH_DOG_DELAY_TIMER_2		0x16f
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 #define RSI_WATCH_DOG_TIMER_ENABLE		0x170
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83
 
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+/* Watchdog timer addresses for 9116 */
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+#define NWP_AHB_BASE_ADDR		0x41300000
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+#define NWP_WWD_INTERRUPT_TIMER		(NWP_AHB_BASE_ADDR + 0x300)
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+#define NWP_WWD_SYSTEM_RESET_TIMER	(NWP_AHB_BASE_ADDR + 0x304)
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+#define NWP_WWD_WINDOW_TIMER		(NWP_AHB_BASE_ADDR + 0x308)
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+#define NWP_WWD_TIMER_SETTINGS		(NWP_AHB_BASE_ADDR + 0x30C)
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+#define NWP_WWD_MODE_AND_RSTART		(NWP_AHB_BASE_ADDR + 0x310)
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+#define NWP_WWD_RESET_BYPASS		(NWP_AHB_BASE_ADDR + 0x314)
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+#define NWP_FSM_INTR_MASK_REG		(NWP_AHB_BASE_ADDR + 0x104)
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+
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+/* Watchdog timer values */
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+#define NWP_WWD_INT_TIMER_CLKS		5
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+#define NWP_WWD_SYS_RESET_TIMER_CLKS	4
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+#define NWP_WWD_TIMER_DISABLE		0xAA0001
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+
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 #define RSI_ULP_WRITE_0			00
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 #define RSI_ULP_WRITE_2			02
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 #define RSI_ULP_WRITE_50		50
..
..
@@ -124,9 +139,18 @@
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 #define BBP_INFO_40MHZ 0x6
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140
 
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 #define FW_FLASH_OFFSET			0x820
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-#define LMAC_VER_OFFSET			(FW_FLASH_OFFSET + 0x200)
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+#define LMAC_VER_OFFSET_9113		(FW_FLASH_OFFSET + 0x200)
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+#define LMAC_VER_OFFSET_9116		0x22C2
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 #define MAX_DWORD_ALIGN_BYTES		64
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 #define RSI_COMMON_REG_SIZE		2
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+#define RSI_9116_REG_SIZE		4
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+#define FW_ALIGN_SIZE			4
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+#define RSI_9116_FW_MAGIC_WORD		0x5aa5
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+
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+#define MEM_ACCESS_CTRL_FROM_HOST	0x41300000
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+#define RAM_384K_ACCESS_FROM_TA		(BIT(2) | BIT(3) | BIT(4) | BIT(5) | \
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+					 BIT(20) | BIT(21) | BIT(22) | \
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+					 BIT(23) | BIT(24) | BIT(25))
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154
 
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 struct bl_header {
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 	__le32 flags;
..
..
@@ -141,6 +165,24 @@
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 	unsigned int address;
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 };
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167
 
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+#define RSI_BL_CTRL_LEN_MASK			0xFFFFFF
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+#define RSI_BL_CTRL_SPI_32BIT_MODE		BIT(27)
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+#define RSI_BL_CTRL_REL_TA_SOFTRESET		BIT(28)
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+#define RSI_BL_CTRL_START_FROM_ROM_PC		BIT(29)
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+#define RSI_BL_CTRL_SPI_8BIT_MODE		BIT(30)
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+#define RSI_BL_CTRL_LAST_ENTRY			BIT(31)
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+struct bootload_entry {
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+	__le32 control;
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+	__le32 dst_addr;
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+} __packed;
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+
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+struct bootload_ds {
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+	__le16 fixed_pattern;
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+	__le16 offset;
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+	__le32 reserved;
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+	struct bootload_entry bl_entry[7];
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+} __packed;
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+
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 struct rsi_mgmt_desc {
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 	__le16 len_qno;
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 	u8 frame_type;