add lvds1024*800

hc

2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920

 kernel/drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h
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@@ -5,7 +5,7 @@
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  *
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  * GPL LICENSE SUMMARY
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  *
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- * Copyright(c) 2018 Intel Corporation
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+ * Copyright(c) 2018, 2020 Intel Corporation
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  *
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  * This program is free software; you can redistribute it and/or modify
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  * it under the terms of version 2 of the GNU General Public License as
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@@ -18,7 +18,7 @@
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  *
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  * BSD LICENSE
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  *
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- * Copyright(c) 2018 Intel Corporation
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+ * Copyright(c) 2018, 2020 Intel Corporation
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  * All rights reserved.
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  *
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  * Redistribution and use in source and binary forms, with or without
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@@ -93,6 +93,11 @@
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  * @IWL_PRPH_SCRATCH_MTR_FORMAT: a mask for the size of the tfd.
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  *	There are 4 optional values: 0: 16 bit, 1: 32 bit, 2: 64 bit,
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  *	3: 256 bit.
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+ * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_MASK: RB size full information, ignored
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+ *	by older firmware versions, so set IWL_PRPH_SCRATCH_RB_SIZE_4K
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+ *	appropriately; use the below values for this.
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+ * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_8K: 8kB RB size
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+ * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_12K: 12kB RB size
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  */
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 enum iwl_prph_scratch_flags {
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 	IWL_PRPH_SCRATCH_EARLY_DEBUG_EN		= BIT(4),
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@@ -103,6 +108,9 @@
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 	IWL_PRPH_SCRATCH_RB_SIZE_4K		= BIT(16),
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 	IWL_PRPH_SCRATCH_MTR_MODE		= BIT(17),
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 	IWL_PRPH_SCRATCH_MTR_FORMAT		= BIT(18) | BIT(19),
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+	IWL_PRPH_SCRATCH_RB_SIZE_EXT_MASK	= 0xf << 20,
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+	IWL_PRPH_SCRATCH_RB_SIZE_EXT_8K		= 8 << 20,
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+	IWL_PRPH_SCRATCH_RB_SIZE_EXT_12K	= 9 << 20,
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 };
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 /*
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@@ -130,16 +138,16 @@
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 } __packed; /* PERIPH_SCRATCH_CONTROL_S */
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 /*
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- * struct iwl_prph_scratch_ror_cfg - ror config
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- * @ror_base_addr: ror start address
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- * @ror_size: ror size in DWs
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+ * struct iwl_prph_scratch_pnvm_cfg - ror config
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+ * @pnvm_base_addr: PNVM start address
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+ * @pnvm_size: PNVM size in DWs
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  * @reserved: reserved
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  */
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-struct iwl_prph_scratch_ror_cfg {
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-	__le64 ror_base_addr;
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-	__le32 ror_size;
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+struct iwl_prph_scratch_pnvm_cfg {
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+	__le64 pnvm_base_addr;
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+	__le32 pnvm_size;
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 	__le32 reserved;
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-} __packed; /* PERIPH_SCRATCH_ROR_CFG_S */
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+} __packed; /* PERIPH_SCRATCH_PNVM_CFG_S */
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 /*
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  * struct iwl_prph_scratch_hwm_cfg - hwm config
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@@ -167,14 +175,14 @@
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  * struct iwl_prph_scratch_ctrl_cfg - prph scratch ctrl and config
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  * @version: version information of context info and HW
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  * @control: control flags of FH configurations
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- * @ror_cfg: ror configuration
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+ * @pnvm_cfg: ror configuration
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  * @hwm_cfg: hwm configuration
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  * @rbd_cfg: default RX queue configuration
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  */
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 struct iwl_prph_scratch_ctrl_cfg {
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 	struct iwl_prph_scratch_version version;
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 	struct iwl_prph_scratch_control control;
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-	struct iwl_prph_scratch_ror_cfg ror_cfg;
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+	struct iwl_prph_scratch_pnvm_cfg pnvm_cfg;
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 	struct iwl_prph_scratch_hwm_cfg hwm_cfg;
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 	struct iwl_prph_scratch_rbd_cfg rbd_cfg;
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 } __packed; /* PERIPH_SCRATCH_CTRL_CFG_S */
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@@ -283,4 +291,7 @@
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 				 const struct fw_img *fw);
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 void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans);
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+int iwl_trans_pcie_ctx_info_gen3_set_pnvm(struct iwl_trans *trans,
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+					  const void *data, u32 len);
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+
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 #endif /* __iwl_context_info_file_gen3_h__ */