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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | |
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3 | 4 | Broadcom B43 wireless driver |
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.. | .. |
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10 | 11 | Copyright (C) 2002 David S. Miller |
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11 | 12 | Copyright (C) Pekka Pietikainen |
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12 | 13 | |
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13 | | - This program is free software; you can redistribute it and/or modify |
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14 | | - it under the terms of the GNU General Public License as published by |
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15 | | - the Free Software Foundation; either version 2 of the License, or |
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16 | | - (at your option) any later version. |
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17 | | - |
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18 | | - This program is distributed in the hope that it will be useful, |
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19 | | - but WITHOUT ANY WARRANTY; without even the implied warranty of |
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20 | | - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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21 | | - GNU General Public License for more details. |
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22 | | - |
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23 | | - You should have received a copy of the GNU General Public License |
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24 | | - along with this program; see the file COPYING. If not, write to |
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25 | | - the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, |
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26 | | - Boston, MA 02110-1301, USA. |
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27 | 14 | |
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28 | 15 | */ |
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29 | 16 | |
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.. | .. |
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50 | 37 | static u32 b43_dma_address(struct b43_dma *dma, dma_addr_t dmaaddr, |
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51 | 38 | enum b43_addrtype addrtype) |
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52 | 39 | { |
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53 | | - u32 uninitialized_var(addr); |
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| 40 | + u32 addr; |
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54 | 41 | |
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55 | 42 | switch (addrtype) { |
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56 | 43 | case B43_DMA_ADDR_LOW: |
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.. | .. |
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431 | 418 | u16 ring_mem_size = (ring->type == B43_DMA_64BIT) ? |
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432 | 419 | B43_DMA64_RINGMEMSIZE : B43_DMA32_RINGMEMSIZE; |
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433 | 420 | |
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434 | | - ring->descbase = dma_zalloc_coherent(ring->dev->dev->dma_dev, |
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435 | | - ring_mem_size, &(ring->dmabase), |
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436 | | - GFP_KERNEL); |
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| 421 | + ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev, |
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| 422 | + ring_mem_size, &(ring->dmabase), |
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| 423 | + GFP_KERNEL); |
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437 | 424 | if (!ring->descbase) |
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438 | 425 | return -ENOMEM; |
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439 | 426 | |
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.. | .. |
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810 | 797 | } |
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811 | 798 | } |
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812 | 799 | |
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813 | | -static u64 supported_dma_mask(struct b43_wldev *dev) |
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| 800 | +static enum b43_dmatype b43_engine_type(struct b43_wldev *dev) |
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814 | 801 | { |
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815 | 802 | u32 tmp; |
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816 | 803 | u16 mmio_base; |
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.. | .. |
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820 | 807 | case B43_BUS_BCMA: |
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821 | 808 | tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST); |
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822 | 809 | if (tmp & BCMA_IOST_DMA64) |
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823 | | - return DMA_BIT_MASK(64); |
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| 810 | + return B43_DMA_64BIT; |
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824 | 811 | break; |
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825 | 812 | #endif |
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826 | 813 | #ifdef CONFIG_B43_SSB |
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827 | 814 | case B43_BUS_SSB: |
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828 | 815 | tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH); |
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829 | 816 | if (tmp & SSB_TMSHIGH_DMA64) |
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830 | | - return DMA_BIT_MASK(64); |
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| 817 | + return B43_DMA_64BIT; |
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831 | 818 | break; |
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832 | 819 | #endif |
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833 | 820 | } |
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.. | .. |
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836 | 823 | b43_write32(dev, mmio_base + B43_DMA32_TXCTL, B43_DMA32_TXADDREXT_MASK); |
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837 | 824 | tmp = b43_read32(dev, mmio_base + B43_DMA32_TXCTL); |
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838 | 825 | if (tmp & B43_DMA32_TXADDREXT_MASK) |
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839 | | - return DMA_BIT_MASK(32); |
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840 | | - |
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841 | | - return DMA_BIT_MASK(30); |
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842 | | -} |
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843 | | - |
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844 | | -static enum b43_dmatype dma_mask_to_engine_type(u64 dmamask) |
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845 | | -{ |
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846 | | - if (dmamask == DMA_BIT_MASK(30)) |
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847 | | - return B43_DMA_30BIT; |
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848 | | - if (dmamask == DMA_BIT_MASK(32)) |
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849 | 826 | return B43_DMA_32BIT; |
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850 | | - if (dmamask == DMA_BIT_MASK(64)) |
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851 | | - return B43_DMA_64BIT; |
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852 | | - B43_WARN_ON(1); |
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853 | 827 | return B43_DMA_30BIT; |
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854 | 828 | } |
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855 | 829 | |
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.. | .. |
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1056 | 1030 | destroy_ring(dma, tx_ring_mcast); |
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1057 | 1031 | } |
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1058 | 1032 | |
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1059 | | -static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask) |
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1060 | | -{ |
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1061 | | - u64 orig_mask = mask; |
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1062 | | - bool fallback = false; |
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1063 | | - int err; |
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1064 | | - |
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1065 | | - /* Try to set the DMA mask. If it fails, try falling back to a |
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1066 | | - * lower mask, as we can always also support a lower one. */ |
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1067 | | - while (1) { |
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1068 | | - err = dma_set_mask_and_coherent(dev->dev->dma_dev, mask); |
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1069 | | - if (!err) |
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1070 | | - break; |
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1071 | | - if (mask == DMA_BIT_MASK(64)) { |
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1072 | | - mask = DMA_BIT_MASK(32); |
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1073 | | - fallback = true; |
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1074 | | - continue; |
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1075 | | - } |
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1076 | | - if (mask == DMA_BIT_MASK(32)) { |
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1077 | | - mask = DMA_BIT_MASK(30); |
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1078 | | - fallback = true; |
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1079 | | - continue; |
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1080 | | - } |
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1081 | | - b43err(dev->wl, "The machine/kernel does not support " |
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1082 | | - "the required %u-bit DMA mask\n", |
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1083 | | - (unsigned int)dma_mask_to_engine_type(orig_mask)); |
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1084 | | - return -EOPNOTSUPP; |
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1085 | | - } |
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1086 | | - if (fallback) { |
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1087 | | - b43info(dev->wl, "DMA mask fallback from %u-bit to %u-bit\n", |
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1088 | | - (unsigned int)dma_mask_to_engine_type(orig_mask), |
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1089 | | - (unsigned int)dma_mask_to_engine_type(mask)); |
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1090 | | - } |
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1091 | | - |
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1092 | | - return 0; |
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1093 | | -} |
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1094 | | - |
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1095 | 1033 | /* Some hardware with 64-bit DMA seems to be bugged and looks for translation |
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1096 | 1034 | * bit in low address word instead of high one. |
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1097 | 1035 | */ |
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.. | .. |
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1114 | 1052 | int b43_dma_init(struct b43_wldev *dev) |
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1115 | 1053 | { |
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1116 | 1054 | struct b43_dma *dma = &dev->dma; |
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| 1055 | + enum b43_dmatype type = b43_engine_type(dev); |
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1117 | 1056 | int err; |
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1118 | | - u64 dmamask; |
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1119 | | - enum b43_dmatype type; |
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1120 | 1057 | |
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1121 | | - dmamask = supported_dma_mask(dev); |
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1122 | | - type = dma_mask_to_engine_type(dmamask); |
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1123 | | - err = b43_dma_set_mask(dev, dmamask); |
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1124 | | - if (err) |
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| 1058 | + err = dma_set_mask_and_coherent(dev->dev->dma_dev, DMA_BIT_MASK(type)); |
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| 1059 | + if (err) { |
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| 1060 | + b43err(dev->wl, "The machine/kernel does not support " |
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| 1061 | + "the required %u-bit DMA mask\n", type); |
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1125 | 1062 | return err; |
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| 1063 | + } |
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1126 | 1064 | |
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1127 | 1065 | switch (dev->dev->bus_type) { |
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1128 | 1066 | #ifdef CONFIG_B43_BCMA |
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.. | .. |
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1379 | 1317 | switch (queue_prio) { |
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1380 | 1318 | default: |
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1381 | 1319 | B43_WARN_ON(1); |
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1382 | | - /* fallthrough */ |
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| 1320 | + fallthrough; |
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1383 | 1321 | case 0: |
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1384 | 1322 | ring = dev->dma.tx_ring_AC_VO; |
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1385 | 1323 | break; |
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.. | .. |
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1432 | 1370 | goto out; |
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1433 | 1371 | } |
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1434 | 1372 | |
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1435 | | - if (unlikely(WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME))) { |
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| 1373 | + if (WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME)) { |
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1436 | 1374 | /* If we get here, we have a real error with the queue |
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1437 | 1375 | * full, but queues not stopped. */ |
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1438 | 1376 | b43err(dev->wl, "DMA queue overflow\n"); |
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.. | .. |
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1462 | 1400 | /* This TX ring is full. */ |
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1463 | 1401 | unsigned int skb_mapping = skb_get_queue_mapping(skb); |
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1464 | 1402 | ieee80211_stop_queue(dev->wl->hw, skb_mapping); |
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1465 | | - dev->wl->tx_queue_stopped[skb_mapping] = 1; |
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| 1403 | + dev->wl->tx_queue_stopped[skb_mapping] = true; |
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1466 | 1404 | ring->stopped = true; |
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1467 | 1405 | if (b43_debug(dev, B43_DBG_DMAVERBOSE)) { |
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1468 | 1406 | b43dbg(dev->wl, "Stopped TX ring %d\n", ring->index); |
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.. | .. |
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1628 | 1566 | } |
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1629 | 1567 | |
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1630 | 1568 | if (dev->wl->tx_queue_stopped[ring->queue_prio]) { |
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1631 | | - dev->wl->tx_queue_stopped[ring->queue_prio] = 0; |
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| 1569 | + dev->wl->tx_queue_stopped[ring->queue_prio] = false; |
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1632 | 1570 | } else { |
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1633 | 1571 | /* If the driver queue is running wake the corresponding |
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1634 | 1572 | * mac80211 queue. */ |
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.. | .. |
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1826 | 1764 | enum b43_dmatype type; |
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1827 | 1765 | u16 mmio_base; |
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1828 | 1766 | |
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1829 | | - type = dma_mask_to_engine_type(supported_dma_mask(dev)); |
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| 1767 | + type = b43_engine_type(dev); |
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1830 | 1768 | |
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1831 | 1769 | mmio_base = b43_dmacontroller_base(type, engine_index); |
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1832 | 1770 | direct_fifo_rx(dev, type, mmio_base, enable); |
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