forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-31 f70575805708cabdedea7498aaa3f710fde4d920
kernel/drivers/net/wireless/broadcom/b43/dma.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23
34 Broadcom B43 wireless driver
....@@ -10,20 +11,6 @@
1011 Copyright (C) 2002 David S. Miller
1112 Copyright (C) Pekka Pietikainen
1213
13
- This program is free software; you can redistribute it and/or modify
14
- it under the terms of the GNU General Public License as published by
15
- the Free Software Foundation; either version 2 of the License, or
16
- (at your option) any later version.
17
-
18
- This program is distributed in the hope that it will be useful,
19
- but WITHOUT ANY WARRANTY; without even the implied warranty of
20
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21
- GNU General Public License for more details.
22
-
23
- You should have received a copy of the GNU General Public License
24
- along with this program; see the file COPYING. If not, write to
25
- the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
26
- Boston, MA 02110-1301, USA.
2714
2815 */
2916
....@@ -50,7 +37,7 @@
5037 static u32 b43_dma_address(struct b43_dma *dma, dma_addr_t dmaaddr,
5138 enum b43_addrtype addrtype)
5239 {
53
- u32 uninitialized_var(addr);
40
+ u32 addr;
5441
5542 switch (addrtype) {
5643 case B43_DMA_ADDR_LOW:
....@@ -431,9 +418,9 @@
431418 u16 ring_mem_size = (ring->type == B43_DMA_64BIT) ?
432419 B43_DMA64_RINGMEMSIZE : B43_DMA32_RINGMEMSIZE;
433420
434
- ring->descbase = dma_zalloc_coherent(ring->dev->dev->dma_dev,
435
- ring_mem_size, &(ring->dmabase),
436
- GFP_KERNEL);
421
+ ring->descbase = dma_alloc_coherent(ring->dev->dev->dma_dev,
422
+ ring_mem_size, &(ring->dmabase),
423
+ GFP_KERNEL);
437424 if (!ring->descbase)
438425 return -ENOMEM;
439426
....@@ -810,7 +797,7 @@
810797 }
811798 }
812799
813
-static u64 supported_dma_mask(struct b43_wldev *dev)
800
+static enum b43_dmatype b43_engine_type(struct b43_wldev *dev)
814801 {
815802 u32 tmp;
816803 u16 mmio_base;
....@@ -820,14 +807,14 @@
820807 case B43_BUS_BCMA:
821808 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST);
822809 if (tmp & BCMA_IOST_DMA64)
823
- return DMA_BIT_MASK(64);
810
+ return B43_DMA_64BIT;
824811 break;
825812 #endif
826813 #ifdef CONFIG_B43_SSB
827814 case B43_BUS_SSB:
828815 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
829816 if (tmp & SSB_TMSHIGH_DMA64)
830
- return DMA_BIT_MASK(64);
817
+ return B43_DMA_64BIT;
831818 break;
832819 #endif
833820 }
....@@ -836,20 +823,7 @@
836823 b43_write32(dev, mmio_base + B43_DMA32_TXCTL, B43_DMA32_TXADDREXT_MASK);
837824 tmp = b43_read32(dev, mmio_base + B43_DMA32_TXCTL);
838825 if (tmp & B43_DMA32_TXADDREXT_MASK)
839
- return DMA_BIT_MASK(32);
840
-
841
- return DMA_BIT_MASK(30);
842
-}
843
-
844
-static enum b43_dmatype dma_mask_to_engine_type(u64 dmamask)
845
-{
846
- if (dmamask == DMA_BIT_MASK(30))
847
- return B43_DMA_30BIT;
848
- if (dmamask == DMA_BIT_MASK(32))
849826 return B43_DMA_32BIT;
850
- if (dmamask == DMA_BIT_MASK(64))
851
- return B43_DMA_64BIT;
852
- B43_WARN_ON(1);
853827 return B43_DMA_30BIT;
854828 }
855829
....@@ -1056,42 +1030,6 @@
10561030 destroy_ring(dma, tx_ring_mcast);
10571031 }
10581032
1059
-static int b43_dma_set_mask(struct b43_wldev *dev, u64 mask)
1060
-{
1061
- u64 orig_mask = mask;
1062
- bool fallback = false;
1063
- int err;
1064
-
1065
- /* Try to set the DMA mask. If it fails, try falling back to a
1066
- * lower mask, as we can always also support a lower one. */
1067
- while (1) {
1068
- err = dma_set_mask_and_coherent(dev->dev->dma_dev, mask);
1069
- if (!err)
1070
- break;
1071
- if (mask == DMA_BIT_MASK(64)) {
1072
- mask = DMA_BIT_MASK(32);
1073
- fallback = true;
1074
- continue;
1075
- }
1076
- if (mask == DMA_BIT_MASK(32)) {
1077
- mask = DMA_BIT_MASK(30);
1078
- fallback = true;
1079
- continue;
1080
- }
1081
- b43err(dev->wl, "The machine/kernel does not support "
1082
- "the required %u-bit DMA mask\n",
1083
- (unsigned int)dma_mask_to_engine_type(orig_mask));
1084
- return -EOPNOTSUPP;
1085
- }
1086
- if (fallback) {
1087
- b43info(dev->wl, "DMA mask fallback from %u-bit to %u-bit\n",
1088
- (unsigned int)dma_mask_to_engine_type(orig_mask),
1089
- (unsigned int)dma_mask_to_engine_type(mask));
1090
- }
1091
-
1092
- return 0;
1093
-}
1094
-
10951033 /* Some hardware with 64-bit DMA seems to be bugged and looks for translation
10961034 * bit in low address word instead of high one.
10971035 */
....@@ -1114,15 +1052,15 @@
11141052 int b43_dma_init(struct b43_wldev *dev)
11151053 {
11161054 struct b43_dma *dma = &dev->dma;
1055
+ enum b43_dmatype type = b43_engine_type(dev);
11171056 int err;
1118
- u64 dmamask;
1119
- enum b43_dmatype type;
11201057
1121
- dmamask = supported_dma_mask(dev);
1122
- type = dma_mask_to_engine_type(dmamask);
1123
- err = b43_dma_set_mask(dev, dmamask);
1124
- if (err)
1058
+ err = dma_set_mask_and_coherent(dev->dev->dma_dev, DMA_BIT_MASK(type));
1059
+ if (err) {
1060
+ b43err(dev->wl, "The machine/kernel does not support "
1061
+ "the required %u-bit DMA mask\n", type);
11251062 return err;
1063
+ }
11261064
11271065 switch (dev->dev->bus_type) {
11281066 #ifdef CONFIG_B43_BCMA
....@@ -1379,7 +1317,7 @@
13791317 switch (queue_prio) {
13801318 default:
13811319 B43_WARN_ON(1);
1382
- /* fallthrough */
1320
+ fallthrough;
13831321 case 0:
13841322 ring = dev->dma.tx_ring_AC_VO;
13851323 break;
....@@ -1432,7 +1370,7 @@
14321370 goto out;
14331371 }
14341372
1435
- if (unlikely(WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME))) {
1373
+ if (WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME)) {
14361374 /* If we get here, we have a real error with the queue
14371375 * full, but queues not stopped. */
14381376 b43err(dev->wl, "DMA queue overflow\n");
....@@ -1462,7 +1400,7 @@
14621400 /* This TX ring is full. */
14631401 unsigned int skb_mapping = skb_get_queue_mapping(skb);
14641402 ieee80211_stop_queue(dev->wl->hw, skb_mapping);
1465
- dev->wl->tx_queue_stopped[skb_mapping] = 1;
1403
+ dev->wl->tx_queue_stopped[skb_mapping] = true;
14661404 ring->stopped = true;
14671405 if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
14681406 b43dbg(dev->wl, "Stopped TX ring %d\n", ring->index);
....@@ -1628,7 +1566,7 @@
16281566 }
16291567
16301568 if (dev->wl->tx_queue_stopped[ring->queue_prio]) {
1631
- dev->wl->tx_queue_stopped[ring->queue_prio] = 0;
1569
+ dev->wl->tx_queue_stopped[ring->queue_prio] = false;
16321570 } else {
16331571 /* If the driver queue is running wake the corresponding
16341572 * mac80211 queue. */
....@@ -1826,7 +1764,7 @@
18261764 enum b43_dmatype type;
18271765 u16 mmio_base;
18281766
1829
- type = dma_mask_to_engine_type(supported_dma_mask(dev));
1767
+ type = b43_engine_type(dev);
18301768
18311769 mmio_base = b43_dmacontroller_base(type, engine_index);
18321770 direct_fifo_rx(dev, type, mmio_base, enable);