.. | .. |
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897 | 897 | {0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480}, |
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898 | 898 | }; |
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899 | 899 | |
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900 | | -static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = { |
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901 | | - /* Addr allmodes */ |
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902 | | - {0x00004040, 0x9248fd00}, |
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903 | | - {0x00004040, 0x24924924}, |
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904 | | - {0x00004040, 0xa8000019}, |
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905 | | - {0x00004040, 0x13160820}, |
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906 | | - {0x00004040, 0xe5980560}, |
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907 | | - {0x00004040, 0xc01dcffc}, |
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908 | | - {0x00004040, 0x1aaabe41}, |
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909 | | - {0x00004040, 0xbe105554}, |
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910 | | - {0x00004040, 0x00043007}, |
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911 | | - {0x00004044, 0x00000000}, |
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912 | | -}; |
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913 | | - |
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914 | 900 | static const u32 ar9280PciePhy_clkreq_always_on_L1_9280[][2] = { |
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915 | 901 | /* Addr allmodes */ |
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916 | 902 | {0x00004040, 0x9248fd00}, |
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